hi6220-hikey.dts 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * dts file for Hisilicon HiKey Development Board
  4. *
  5. * Copyright (C) 2015, Hisilicon Ltd.
  6. *
  7. */
  8. /dts-v1/;
  9. #include "hi6220.dtsi"
  10. #include "hikey-pinctrl.dtsi"
  11. #include <dt-bindings/gpio/gpio.h>
  12. / {
  13. model = "HiKey Development Board";
  14. compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
  15. aliases {
  16. serial0 = &uart0; /* On board UART0 */
  17. serial1 = &uart1; /* BT UART */
  18. serial2 = &uart2; /* LS Expansion UART0 */
  19. serial3 = &uart3; /* LS Expansion UART1 */
  20. };
  21. chosen {
  22. stdout-path = "serial3:115200n8";
  23. };
  24. /*
  25. * Reserve below regions from memory node:
  26. *
  27. * 0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using
  28. * 0x05f0,1000 - 0x05f0,1fff: Reboot reason
  29. * 0x06df,f000 - 0x06df,ffff: Mailbox message data
  30. * 0x0740,f000 - 0x0740,ffff: MCU firmware section
  31. * 0x21f0,0000 - 0x21ff,ffff: pstore/ramoops buffer
  32. * 0x3e00,0000 - 0x3fff,ffff: OP-TEE
  33. */
  34. memory@0 {
  35. device_type = "memory";
  36. reg = <0x00000000 0x00000000 0x00000000 0x05e00000>,
  37. <0x00000000 0x05f00000 0x00000000 0x00001000>,
  38. <0x00000000 0x05f02000 0x00000000 0x00efd000>,
  39. <0x00000000 0x06e00000 0x00000000 0x0060f000>,
  40. <0x00000000 0x07410000 0x00000000 0x1aaf0000>,
  41. <0x00000000 0x22000000 0x00000000 0x1c000000>;
  42. };
  43. reserved-memory {
  44. #address-cells = <2>;
  45. #size-cells = <2>;
  46. ranges;
  47. ramoops@21f00000 {
  48. compatible = "ramoops";
  49. reg = <0x0 0x21f00000 0x0 0x00100000>;
  50. record-size = <0x00020000>;
  51. console-size = <0x00020000>;
  52. ftrace-size = <0x00020000>;
  53. };
  54. /* global autoconfigured region for contiguous allocations */
  55. linux,cma {
  56. compatible = "shared-dma-pool";
  57. reusable;
  58. size = <0x00000000 0x08000000>;
  59. linux,cma-default;
  60. };
  61. };
  62. reboot-mode-syscon@5f01000 {
  63. compatible = "syscon", "simple-mfd";
  64. reg = <0x0 0x05f01000 0x0 0x00001000>;
  65. reboot-mode {
  66. compatible = "syscon-reboot-mode";
  67. offset = <0x0>;
  68. mode-normal = <0x77665501>;
  69. mode-bootloader = <0x77665500>;
  70. mode-recovery = <0x77665502>;
  71. };
  72. };
  73. reg_sys_5v: regulator@0 {
  74. compatible = "regulator-fixed";
  75. regulator-name = "SYS_5V";
  76. regulator-min-microvolt = <5000000>;
  77. regulator-max-microvolt = <5000000>;
  78. regulator-boot-on;
  79. regulator-always-on;
  80. };
  81. reg_vdd_3v3: regulator@1 {
  82. compatible = "regulator-fixed";
  83. regulator-name = "VDD_3V3";
  84. regulator-min-microvolt = <3300000>;
  85. regulator-max-microvolt = <3300000>;
  86. regulator-boot-on;
  87. regulator-always-on;
  88. vin-supply = <&reg_sys_5v>;
  89. };
  90. reg_5v_hub: regulator@2 {
  91. compatible = "regulator-fixed";
  92. regulator-name = "5V_HUB";
  93. regulator-min-microvolt = <5000000>;
  94. regulator-max-microvolt = <5000000>;
  95. regulator-boot-on;
  96. gpio = <&gpio0 7 0>;
  97. regulator-always-on;
  98. vin-supply = <&reg_sys_5v>;
  99. };
  100. wl1835_pwrseq: wl1835-pwrseq {
  101. compatible = "mmc-pwrseq-simple";
  102. /* WLAN_EN GPIO */
  103. reset-gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
  104. clocks = <&pmic>;
  105. clock-names = "ext_clock";
  106. post-power-on-delay-ms = <10>;
  107. power-off-delay-us = <10>;
  108. };
  109. soc {
  110. spi0: spi@f7106000 {
  111. status = "ok";
  112. };
  113. i2c0: i2c@f7100000 {
  114. status = "ok";
  115. };
  116. i2c1: i2c@f7101000 {
  117. status = "ok";
  118. };
  119. uart1: uart@f7111000 {
  120. assigned-clocks = <&sys_ctrl HI6220_UART1_SRC>;
  121. assigned-clock-rates = <150000000>;
  122. status = "ok";
  123. bluetooth {
  124. compatible = "ti,wl1835-st";
  125. enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
  126. clocks = <&pmic>;
  127. clock-names = "ext_clock";
  128. };
  129. };
  130. uart2: uart@f7112000 {
  131. status = "ok";
  132. };
  133. uart3: uart@f7113000 {
  134. status = "ok";
  135. };
  136. /*
  137. * Legend: proper name = the GPIO line is used as GPIO
  138. * NC = not connected (not routed from the SoC)
  139. * "[PER]" = pin is muxed for peripheral (not GPIO)
  140. * "" = no idea, schematic doesn't say, could be
  141. * unrouted (not connected to any external pin)
  142. * LSEC = Low Speed External Connector
  143. * HSEC = High Speed External Connector
  144. *
  145. * Pin assignments taken from LeMaker and CircuitCo Schematics
  146. * Rev A1.
  147. *
  148. * For the lines routed to the external connectors the
  149. * lines are named after the 96Boards CE Specification 1.0,
  150. * Appendix "Expansion Connector Signal Description".
  151. *
  152. * When the 96Board naming of a line and the schematic name of
  153. * the same line are in conflict, the 96Board specification
  154. * takes precedence, which means that the external UART on the
  155. * LSEC is named UART0 while the schematic and SoC names this
  156. * UART2. This is only for the informational lines i.e. "[FOO]",
  157. * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only
  158. * ones actually used for GPIO.
  159. */
  160. gpio0: gpio@f8011000 {
  161. gpio-line-names = "PWR_HOLD", "DSI_SEL",
  162. "USB_HUB_RESET_N", "USB_SEL", "HDMI_PD", "WL_REG_ON",
  163. "PWRON_DET", "5V_HUB_EN";
  164. };
  165. gpio1: gpio@f8012000 {
  166. gpio-line-names = "SD_DET", "HDMI_INT", "PMU_IRQ_N",
  167. "WL_HOST_WAKE", "NC", "NC", "NC", "BT_REG_ON";
  168. };
  169. gpio2: gpio@f8013000 {
  170. gpio-line-names =
  171. "GPIO-A", /* LSEC Pin 23: GPIO2_0 */
  172. "GPIO-B", /* LSEC Pin 24: GPIO2_1 */
  173. "GPIO-C", /* LSEC Pin 25: GPIO2_2 */
  174. "GPIO-D", /* LSEC Pin 26: GPIO2_3 */
  175. "GPIO-E", /* LSEC Pin 27: GPIO2_4 */
  176. "USB_ID_DET", "USB_VBUS_DET",
  177. "GPIO-H"; /* LSEC Pin 30: GPIO2_7 */
  178. };
  179. gpio3: gpio@f8014000 {
  180. gpio-line-names = "GPIO3_0", "NC", "NC", "", "NC", "",
  181. "WLAN_ACTIVE", "NC", "NC";
  182. };
  183. gpio4: gpio@f7020000 {
  184. gpio-line-names = "USER_LED1", "USER_LED2", "USER_LED3",
  185. "USER_LED4", "SD_SEL", "NC", "NC", "BT_ACTIVE";
  186. };
  187. gpio5: gpio@f7021000 {
  188. gpio-line-names = "NC", "NC",
  189. "[UART1_RxD]", /* LSEC Pin 11: UART3_RX */
  190. "[UART1_TxD]", /* LSEC Pin 13: UART3_TX */
  191. "[AUX_SSI1]", "NC",
  192. "[PCM_CLK]", /* LSEC Pin 18: MODEM_PCM_XCLK */
  193. "[PCM_FS]"; /* LSEC Pin 16: MODEM_PCM_XFS */
  194. };
  195. gpio6: gpio@f7022000 {
  196. gpio-line-names =
  197. "[SPI0_DIN]", /* Pin 10: SPI0_DI */
  198. "[SPI0_DOUT]", /* Pin 14: SPI0_DO */
  199. "[SPI0_CS]", /* Pin 12: SPI0_CS_N */
  200. "[SPI0_SCLK]", /* Pin 8: SPI0_SCLK */
  201. "NC", "NC", "NC",
  202. "GPIO-G"; /* Pin 29: GPIO6_7_DSI_TE0 */
  203. };
  204. gpio7: gpio@f7023000 {
  205. gpio-line-names = "NC", "NC", "NC", "NC",
  206. "[PCM_DI]", /* Pin 22: MODEM_PCM_DI */
  207. "[PCM_DO]", /* Pin 20: MODEM_PCM_DO */
  208. "NC", "NC";
  209. };
  210. gpio8: gpio@f7024000 {
  211. gpio-line-names = "NC", "[CEC_CLK_19_2MHZ]", "NC",
  212. "", "", "", "", "", "";
  213. };
  214. gpio9: gpio@f7025000 {
  215. gpio-line-names = "",
  216. "GPIO-J", /* LSEC Pin 32: ISP_PWDN0_GPIO9_1 */
  217. "GPIO-L", /* LSEC Pin 34: ISP_PWDN1_GPIO9_2 */
  218. "NC", "NC", "NC", "NC", "[ISP_CCLK0]";
  219. };
  220. gpio10: gpio@f7026000 {
  221. gpio-line-names = "BOOT_SEL",
  222. "[ISP_CCLK1]",
  223. "GPIO-I", /* LSEC Pin 31: ISP_RSTB0_GPIO10_2 */
  224. "GPIO-K", /* LSEC Pin 33: ISP_RSTB1_GPIO10_3 */
  225. "NC", "NC",
  226. "[I2C2_SDA]", /* HSEC Pin 34: ISP0_SDA */
  227. "[I2C2_SCL]"; /* HSEC Pin 32: ISP0_SCL */
  228. };
  229. gpio11: gpio@f7027000 {
  230. gpio-line-names =
  231. "[I2C3_SDA]", /* HSEC Pin 38: ISP1_SDA */
  232. "[I2C3_SCL]", /* HSEC Pin 36: ISP1_SCL */
  233. "", "NC", "NC", "NC", "", "";
  234. };
  235. gpio12: gpio@f7028000 {
  236. gpio-line-names = "[BT_PCM_XFS]", "[BT_PCM_DI]",
  237. "[BT_PCM_DO]",
  238. "NC", "NC", "NC", "NC",
  239. "GPIO-F"; /* LSEC Pin 28: BL_PWM_GPIO12_7 */
  240. };
  241. gpio13: gpio@f7029000 {
  242. gpio-line-names = "[UART0_RX]", "[UART0_TX]",
  243. "[BT_UART1_CTS]", "[BT_UART1_RTS]",
  244. "[BT_UART1_RX]", "[BT_UART1_TX]",
  245. "[UART0_CTS]", /* LSEC Pin 3: UART2_CTS_N */
  246. "[UART0_RTS]"; /* LSEC Pin 9: UART2_RTS_N */
  247. };
  248. gpio14: gpio@f702a000 {
  249. gpio-line-names =
  250. "[UART0_RxD]", /* LSEC Pin 7: UART2_RX */
  251. "[UART0_TxD]", /* LSEC Pin 5: UART2_TX */
  252. "[I2C0_SCL]", /* LSEC Pin 15: I2C0_SCL */
  253. "[I2C0_SDA]", /* LSEC Pin 17: I2C0_SDA */
  254. "[I2C1_SCL]", /* LSEC Pin 19: I2C1_SCL */
  255. "[I2C1_SDA]", /* LSEC Pin 21: I2C1_SDA */
  256. "[I2C2_SCL]", "[I2C2_SDA]";
  257. };
  258. gpio15: gpio@f702b000 {
  259. gpio-line-names = "", "", "", "", "", "", "NC", "";
  260. };
  261. /* GPIO blocks 16 thru 19 do not appear to be routed to pins */
  262. dwmmc_0: dwmmc0@f723d000 {
  263. cap-mmc-highspeed;
  264. non-removable;
  265. bus-width = <0x8>;
  266. vmmc-supply = <&ldo19>;
  267. };
  268. dwmmc_1: dwmmc1@f723e000 {
  269. card-detect-delay = <200>;
  270. cap-sd-highspeed;
  271. sd-uhs-sdr12;
  272. sd-uhs-sdr25;
  273. sd-uhs-sdr50;
  274. vqmmc-supply = <&ldo7>;
  275. vmmc-supply = <&ldo10>;
  276. bus-width = <0x4>;
  277. disable-wp;
  278. cd-gpios = <&gpio1 0 1>;
  279. };
  280. dwmmc_2: dwmmc2@f723f000 {
  281. bus-width = <0x4>;
  282. non-removable;
  283. cap-power-off-card;
  284. vmmc-supply = <&reg_vdd_3v3>;
  285. mmc-pwrseq = <&wl1835_pwrseq>;
  286. #address-cells = <0x1>;
  287. #size-cells = <0x0>;
  288. wlcore: wlcore@2 {
  289. compatible = "ti,wl1835";
  290. reg = <2>; /* sdio func num */
  291. /* WL_IRQ, WL_HOST_WAKE_GPIO1_3 */
  292. interrupt-parent = <&gpio1>;
  293. interrupts = <3 IRQ_TYPE_EDGE_RISING>;
  294. };
  295. };
  296. };
  297. leds {
  298. compatible = "gpio-leds";
  299. user_led4 {
  300. label = "user_led4";
  301. gpios = <&gpio4 0 0>; /* <&gpio_user_led_1>; */
  302. linux,default-trigger = "heartbeat";
  303. };
  304. user_led3 {
  305. label = "user_led3";
  306. gpios = <&gpio4 1 0>; /* <&gpio_user_led_2>; */
  307. linux,default-trigger = "mmc0";
  308. };
  309. user_led2 {
  310. label = "user_led2";
  311. gpios = <&gpio4 2 0>; /* <&gpio_user_led_3>; */
  312. linux,default-trigger = "mmc1";
  313. };
  314. user_led1 {
  315. label = "user_led1";
  316. gpios = <&gpio4 3 0>; /* <&gpio_user_led_4>; */
  317. panic-indicator;
  318. linux,default-trigger = "cpu0";
  319. };
  320. wlan_active_led {
  321. label = "wifi_active";
  322. gpios = <&gpio3 5 0>; /* <&gpio_wlan_active_led>; */
  323. linux,default-trigger = "phy0tx";
  324. default-state = "off";
  325. };
  326. bt_active_led {
  327. label = "bt_active";
  328. gpios = <&gpio4 7 0>; /* <&gpio_bt_active_led>; */
  329. linux,default-trigger = "hci0rx";
  330. default-state = "off";
  331. };
  332. };
  333. pmic: pmic@f8000000 {
  334. compatible = "hisilicon,hi655x-pmic";
  335. reg = <0x0 0xf8000000 0x0 0x1000>;
  336. #clock-cells = <0>;
  337. interrupt-controller;
  338. #interrupt-cells = <2>;
  339. pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
  340. regulators {
  341. ldo2: LDO2 {
  342. regulator-name = "LDO2_2V8";
  343. regulator-min-microvolt = <2500000>;
  344. regulator-max-microvolt = <3200000>;
  345. regulator-enable-ramp-delay = <120>;
  346. };
  347. ldo7: LDO7 {
  348. regulator-name = "LDO7_SDIO";
  349. regulator-min-microvolt = <1800000>;
  350. regulator-max-microvolt = <3300000>;
  351. regulator-enable-ramp-delay = <120>;
  352. };
  353. ldo10: LDO10 {
  354. regulator-name = "LDO10_2V85";
  355. regulator-min-microvolt = <1800000>;
  356. regulator-max-microvolt = <3000000>;
  357. regulator-enable-ramp-delay = <360>;
  358. };
  359. ldo13: LDO13 {
  360. regulator-name = "LDO13_1V8";
  361. regulator-min-microvolt = <1600000>;
  362. regulator-max-microvolt = <1950000>;
  363. regulator-enable-ramp-delay = <120>;
  364. };
  365. ldo14: LDO14 {
  366. regulator-name = "LDO14_2V8";
  367. regulator-min-microvolt = <2500000>;
  368. regulator-max-microvolt = <3200000>;
  369. regulator-enable-ramp-delay = <120>;
  370. };
  371. ldo15: LDO15 {
  372. regulator-name = "LDO15_1V8";
  373. regulator-min-microvolt = <1600000>;
  374. regulator-max-microvolt = <1950000>;
  375. regulator-boot-on;
  376. regulator-always-on;
  377. regulator-enable-ramp-delay = <120>;
  378. };
  379. ldo17: LDO17 {
  380. regulator-name = "LDO17_2V5";
  381. regulator-min-microvolt = <2500000>;
  382. regulator-max-microvolt = <3200000>;
  383. regulator-enable-ramp-delay = <120>;
  384. };
  385. ldo19: LDO19 {
  386. regulator-name = "LDO19_3V0";
  387. regulator-min-microvolt = <1800000>;
  388. regulator-max-microvolt = <3000000>;
  389. regulator-enable-ramp-delay = <360>;
  390. };
  391. ldo21: LDO21 {
  392. regulator-name = "LDO21_1V8";
  393. regulator-min-microvolt = <1650000>;
  394. regulator-max-microvolt = <2000000>;
  395. regulator-always-on;
  396. regulator-enable-ramp-delay = <120>;
  397. };
  398. ldo22: LDO22 {
  399. regulator-name = "LDO22_1V2";
  400. regulator-min-microvolt = <900000>;
  401. regulator-max-microvolt = <1200000>;
  402. regulator-boot-on;
  403. regulator-always-on;
  404. regulator-enable-ramp-delay = <120>;
  405. };
  406. };
  407. };
  408. firmware {
  409. optee {
  410. compatible = "linaro,optee-tz";
  411. method = "smc";
  412. };
  413. };
  414. sound_card {
  415. compatible = "audio-graph-card";
  416. dais = <&i2s0_port0>;
  417. };
  418. };
  419. &uart2 {
  420. label = "LS-UART0";
  421. };
  422. &uart3 {
  423. label = "LS-UART1";
  424. };
  425. &ade {
  426. status = "ok";
  427. };
  428. &dsi {
  429. status = "ok";
  430. ports {
  431. /* 1 for output port */
  432. port@1 {
  433. reg = <1>;
  434. dsi_out0: endpoint@0 {
  435. remote-endpoint = <&adv7533_in>;
  436. };
  437. };
  438. };
  439. };
  440. &i2c2 {
  441. #address-cells = <1>;
  442. #size-cells = <0>;
  443. status = "ok";
  444. adv7533: adv7533@39 {
  445. compatible = "adi,adv7533";
  446. reg = <0x39>;
  447. interrupt-parent = <&gpio1>;
  448. interrupts = <1 2>;
  449. pd-gpio = <&gpio0 4 0>;
  450. adi,dsi-lanes = <4>;
  451. #sound-dai-cells = <0>;
  452. ports {
  453. #address-cells = <1>;
  454. #size-cells = <0>;
  455. port@0 {
  456. adv7533_in: endpoint {
  457. remote-endpoint = <&dsi_out0>;
  458. };
  459. };
  460. port@2 {
  461. reg = <2>;
  462. codec_endpoint: endpoint {
  463. remote-endpoint = <&i2s0_cpu_endpoint>;
  464. };
  465. };
  466. };
  467. };
  468. };
  469. &i2s0 {
  470. ports {
  471. i2s0_port0: port@0 {
  472. i2s0_cpu_endpoint: endpoint {
  473. remote-endpoint = <&codec_endpoint>;
  474. dai-format = "i2s";
  475. };
  476. };
  477. };
  478. };