fsl-ls1043a-qds.dts 2.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149
  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Device Tree Include file for Freescale Layerscape-1043A family SoC.
  4. *
  5. * Copyright 2014-2015 Freescale Semiconductor, Inc.
  6. *
  7. * Mingkai Hu <Mingkai.hu@freescale.com>
  8. */
  9. /dts-v1/;
  10. #include "fsl-ls1043a.dtsi"
  11. / {
  12. model = "LS1043A QDS Board";
  13. compatible = "fsl,ls1043a-qds", "fsl,ls1043a";
  14. aliases {
  15. gpio0 = &gpio1;
  16. gpio1 = &gpio2;
  17. gpio2 = &gpio3;
  18. gpio3 = &gpio4;
  19. serial0 = &duart0;
  20. serial1 = &duart1;
  21. serial2 = &duart2;
  22. serial3 = &duart3;
  23. };
  24. chosen {
  25. stdout-path = "serial0:115200n8";
  26. };
  27. };
  28. &duart0 {
  29. status = "okay";
  30. };
  31. &duart1 {
  32. status = "okay";
  33. };
  34. &ifc {
  35. #address-cells = <2>;
  36. #size-cells = <1>;
  37. /* NOR, NAND Flashes and FPGA on board */
  38. ranges = <0x0 0x0 0x0 0x60000000 0x08000000
  39. 0x1 0x0 0x0 0x7e800000 0x00010000
  40. 0x2 0x0 0x0 0x7fb00000 0x00000100>;
  41. status = "okay";
  42. nor@0,0 {
  43. compatible = "cfi-flash";
  44. reg = <0x0 0x0 0x8000000>;
  45. bank-width = <2>;
  46. device-width = <1>;
  47. };
  48. nand@1,0 {
  49. compatible = "fsl,ifc-nand";
  50. reg = <0x1 0x0 0x10000>;
  51. };
  52. fpga: board-control@2,0 {
  53. compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis";
  54. reg = <0x2 0x0 0x0000100>;
  55. };
  56. };
  57. &i2c0 {
  58. status = "okay";
  59. pca9547@77 {
  60. compatible = "nxp,pca9547";
  61. reg = <0x77>;
  62. #address-cells = <1>;
  63. #size-cells = <0>;
  64. i2c@0 {
  65. #address-cells = <1>;
  66. #size-cells = <0>;
  67. reg = <0x0>;
  68. rtc@68 {
  69. compatible = "dallas,ds3232";
  70. reg = <0x68>;
  71. /* IRQ10_B */
  72. interrupts = <0 150 0x4>;
  73. };
  74. };
  75. i2c@2 {
  76. #address-cells = <1>;
  77. #size-cells = <0>;
  78. reg = <0x2>;
  79. ina220@40 {
  80. compatible = "ti,ina220";
  81. reg = <0x40>;
  82. shunt-resistor = <1000>;
  83. };
  84. ina220@41 {
  85. compatible = "ti,ina220";
  86. reg = <0x41>;
  87. shunt-resistor = <1000>;
  88. };
  89. };
  90. i2c@3 {
  91. #address-cells = <1>;
  92. #size-cells = <0>;
  93. reg = <0x3>;
  94. eeprom@56 {
  95. compatible = "atmel,24c512";
  96. reg = <0x56>;
  97. };
  98. eeprom@57 {
  99. compatible = "atmel,24c512";
  100. reg = <0x57>;
  101. };
  102. temp-sensor@4c {
  103. compatible = "adi,adt7461a";
  104. reg = <0x4c>;
  105. };
  106. };
  107. };
  108. };
  109. &lpuart0 {
  110. status = "okay";
  111. };
  112. &qspi {
  113. bus-num = <0>;
  114. status = "okay";
  115. qflash0: s25fl128s@0 {
  116. compatible = "spansion,m25p80";
  117. #address-cells = <1>;
  118. #size-cells = <1>;
  119. spi-max-frequency = <20000000>;
  120. reg = <0>;
  121. };
  122. };
  123. #include "fsl-ls1043-post.dtsi"