devs.c 28 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // Copyright (c) 2011 Samsung Electronics Co., Ltd.
  4. // http://www.samsung.com
  5. //
  6. // Base SAMSUNG platform device definitions
  7. #include <linux/kernel.h>
  8. #include <linux/types.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/list.h>
  11. #include <linux/timer.h>
  12. #include <linux/init.h>
  13. #include <linux/serial_core.h>
  14. #include <linux/serial_s3c.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/io.h>
  17. #include <linux/slab.h>
  18. #include <linux/string.h>
  19. #include <linux/dma-mapping.h>
  20. #include <linux/fb.h>
  21. #include <linux/gfp.h>
  22. #include <linux/mtd/mtd.h>
  23. #include <linux/mtd/onenand.h>
  24. #include <linux/mtd/partitions.h>
  25. #include <linux/mmc/host.h>
  26. #include <linux/ioport.h>
  27. #include <linux/sizes.h>
  28. #include <linux/platform_data/s3c-hsudc.h>
  29. #include <linux/platform_data/s3c-hsotg.h>
  30. #include <linux/platform_data/dma-s3c24xx.h>
  31. #include <linux/platform_data/media/s5p_hdmi.h>
  32. #include <asm/irq.h>
  33. #include <asm/mach/arch.h>
  34. #include <asm/mach/map.h>
  35. #include <asm/mach/irq.h>
  36. #include <mach/dma.h>
  37. #include <mach/irqs.h>
  38. #include <mach/map.h>
  39. #include <plat/cpu.h>
  40. #include <plat/devs.h>
  41. #include <plat/adc.h>
  42. #include <linux/platform_data/ata-samsung_cf.h>
  43. #include <plat/fb.h>
  44. #include <plat/fb-s3c2410.h>
  45. #include <linux/platform_data/hwmon-s3c.h>
  46. #include <linux/platform_data/i2c-s3c2410.h>
  47. #include <plat/keypad.h>
  48. #include <linux/platform_data/mmc-s3cmci.h>
  49. #include <linux/platform_data/mtd-nand-s3c2410.h>
  50. #include <plat/pwm-core.h>
  51. #include <plat/sdhci.h>
  52. #include <linux/platform_data/touchscreen-s3c2410.h>
  53. #include <linux/platform_data/usb-s3c2410_udc.h>
  54. #include <linux/platform_data/usb-ohci-s3c2410.h>
  55. #include <plat/usb-phy.h>
  56. #include <plat/regs-spi.h>
  57. #include <linux/platform_data/asoc-s3c.h>
  58. #include <linux/platform_data/spi-s3c64xx.h>
  59. #define samsung_device_dma_mask (*((u64[]) { DMA_BIT_MASK(32) }))
  60. /* AC97 */
  61. #ifdef CONFIG_CPU_S3C2440
  62. static struct resource s3c_ac97_resource[] = {
  63. [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
  64. [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
  65. };
  66. struct platform_device s3c_device_ac97 = {
  67. .name = "samsung-ac97",
  68. .id = -1,
  69. .num_resources = ARRAY_SIZE(s3c_ac97_resource),
  70. .resource = s3c_ac97_resource,
  71. .dev = {
  72. .dma_mask = &samsung_device_dma_mask,
  73. .coherent_dma_mask = DMA_BIT_MASK(32),
  74. }
  75. };
  76. #endif /* CONFIG_CPU_S3C2440 */
  77. /* ADC */
  78. #ifdef CONFIG_PLAT_S3C24XX
  79. static struct resource s3c_adc_resource[] = {
  80. [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  81. [1] = DEFINE_RES_IRQ(IRQ_TC),
  82. [2] = DEFINE_RES_IRQ(IRQ_ADC),
  83. };
  84. struct platform_device s3c_device_adc = {
  85. .name = "s3c24xx-adc",
  86. .id = -1,
  87. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  88. .resource = s3c_adc_resource,
  89. };
  90. #endif /* CONFIG_PLAT_S3C24XX */
  91. #if defined(CONFIG_SAMSUNG_DEV_ADC)
  92. static struct resource s3c_adc_resource[] = {
  93. [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
  94. [1] = DEFINE_RES_IRQ(IRQ_ADC),
  95. [2] = DEFINE_RES_IRQ(IRQ_TC),
  96. };
  97. struct platform_device s3c_device_adc = {
  98. .name = "exynos-adc",
  99. .id = -1,
  100. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  101. .resource = s3c_adc_resource,
  102. };
  103. #endif /* CONFIG_SAMSUNG_DEV_ADC */
  104. /* Camif Controller */
  105. #ifdef CONFIG_CPU_S3C2440
  106. static struct resource s3c_camif_resource[] = {
  107. [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
  108. [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
  109. [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
  110. };
  111. struct platform_device s3c_device_camif = {
  112. .name = "s3c2440-camif",
  113. .id = -1,
  114. .num_resources = ARRAY_SIZE(s3c_camif_resource),
  115. .resource = s3c_camif_resource,
  116. .dev = {
  117. .dma_mask = &samsung_device_dma_mask,
  118. .coherent_dma_mask = DMA_BIT_MASK(32),
  119. }
  120. };
  121. #endif /* CONFIG_CPU_S3C2440 */
  122. /* FB */
  123. #ifdef CONFIG_S3C_DEV_FB
  124. static struct resource s3c_fb_resource[] = {
  125. [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
  126. [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
  127. [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
  128. [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
  129. };
  130. struct platform_device s3c_device_fb = {
  131. .name = "s3c-fb",
  132. .id = -1,
  133. .num_resources = ARRAY_SIZE(s3c_fb_resource),
  134. .resource = s3c_fb_resource,
  135. .dev = {
  136. .dma_mask = &samsung_device_dma_mask,
  137. .coherent_dma_mask = DMA_BIT_MASK(32),
  138. },
  139. };
  140. void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
  141. {
  142. s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
  143. &s3c_device_fb);
  144. }
  145. #endif /* CONFIG_S3C_DEV_FB */
  146. /* HWMON */
  147. #ifdef CONFIG_S3C_DEV_HWMON
  148. struct platform_device s3c_device_hwmon = {
  149. .name = "s3c-hwmon",
  150. .id = -1,
  151. .dev.parent = &s3c_device_adc.dev,
  152. };
  153. void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
  154. {
  155. s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
  156. &s3c_device_hwmon);
  157. }
  158. #endif /* CONFIG_S3C_DEV_HWMON */
  159. /* HSMMC */
  160. #ifdef CONFIG_S3C_DEV_HSMMC
  161. static struct resource s3c_hsmmc_resource[] = {
  162. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
  163. [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
  164. };
  165. struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
  166. .max_width = 4,
  167. .host_caps = (MMC_CAP_4_BIT_DATA |
  168. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  169. };
  170. struct platform_device s3c_device_hsmmc0 = {
  171. .name = "s3c-sdhci",
  172. .id = 0,
  173. .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
  174. .resource = s3c_hsmmc_resource,
  175. .dev = {
  176. .dma_mask = &samsung_device_dma_mask,
  177. .coherent_dma_mask = DMA_BIT_MASK(32),
  178. .platform_data = &s3c_hsmmc0_def_platdata,
  179. },
  180. };
  181. void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
  182. {
  183. s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
  184. }
  185. #endif /* CONFIG_S3C_DEV_HSMMC */
  186. #ifdef CONFIG_S3C_DEV_HSMMC1
  187. static struct resource s3c_hsmmc1_resource[] = {
  188. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
  189. [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
  190. };
  191. struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
  192. .max_width = 4,
  193. .host_caps = (MMC_CAP_4_BIT_DATA |
  194. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  195. };
  196. struct platform_device s3c_device_hsmmc1 = {
  197. .name = "s3c-sdhci",
  198. .id = 1,
  199. .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
  200. .resource = s3c_hsmmc1_resource,
  201. .dev = {
  202. .dma_mask = &samsung_device_dma_mask,
  203. .coherent_dma_mask = DMA_BIT_MASK(32),
  204. .platform_data = &s3c_hsmmc1_def_platdata,
  205. },
  206. };
  207. void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
  208. {
  209. s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
  210. }
  211. #endif /* CONFIG_S3C_DEV_HSMMC1 */
  212. /* HSMMC2 */
  213. #ifdef CONFIG_S3C_DEV_HSMMC2
  214. static struct resource s3c_hsmmc2_resource[] = {
  215. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
  216. [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
  217. };
  218. struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
  219. .max_width = 4,
  220. .host_caps = (MMC_CAP_4_BIT_DATA |
  221. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  222. };
  223. struct platform_device s3c_device_hsmmc2 = {
  224. .name = "s3c-sdhci",
  225. .id = 2,
  226. .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
  227. .resource = s3c_hsmmc2_resource,
  228. .dev = {
  229. .dma_mask = &samsung_device_dma_mask,
  230. .coherent_dma_mask = DMA_BIT_MASK(32),
  231. .platform_data = &s3c_hsmmc2_def_platdata,
  232. },
  233. };
  234. void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
  235. {
  236. s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
  237. }
  238. #endif /* CONFIG_S3C_DEV_HSMMC2 */
  239. #ifdef CONFIG_S3C_DEV_HSMMC3
  240. static struct resource s3c_hsmmc3_resource[] = {
  241. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
  242. [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
  243. };
  244. struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
  245. .max_width = 4,
  246. .host_caps = (MMC_CAP_4_BIT_DATA |
  247. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  248. };
  249. struct platform_device s3c_device_hsmmc3 = {
  250. .name = "s3c-sdhci",
  251. .id = 3,
  252. .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
  253. .resource = s3c_hsmmc3_resource,
  254. .dev = {
  255. .dma_mask = &samsung_device_dma_mask,
  256. .coherent_dma_mask = DMA_BIT_MASK(32),
  257. .platform_data = &s3c_hsmmc3_def_platdata,
  258. },
  259. };
  260. void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
  261. {
  262. s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
  263. }
  264. #endif /* CONFIG_S3C_DEV_HSMMC3 */
  265. /* I2C */
  266. static struct resource s3c_i2c0_resource[] = {
  267. [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
  268. [1] = DEFINE_RES_IRQ(IRQ_IIC),
  269. };
  270. struct platform_device s3c_device_i2c0 = {
  271. .name = "s3c2410-i2c",
  272. .id = 0,
  273. .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
  274. .resource = s3c_i2c0_resource,
  275. };
  276. struct s3c2410_platform_i2c default_i2c_data __initdata = {
  277. .flags = 0,
  278. .slave_addr = 0x10,
  279. .frequency = 100*1000,
  280. .sda_delay = 100,
  281. };
  282. void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
  283. {
  284. struct s3c2410_platform_i2c *npd;
  285. if (!pd) {
  286. pd = &default_i2c_data;
  287. pd->bus_num = 0;
  288. }
  289. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c0);
  290. if (!npd->cfg_gpio)
  291. npd->cfg_gpio = s3c_i2c0_cfg_gpio;
  292. }
  293. #ifdef CONFIG_S3C_DEV_I2C1
  294. static struct resource s3c_i2c1_resource[] = {
  295. [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
  296. [1] = DEFINE_RES_IRQ(IRQ_IIC1),
  297. };
  298. struct platform_device s3c_device_i2c1 = {
  299. .name = "s3c2410-i2c",
  300. .id = 1,
  301. .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
  302. .resource = s3c_i2c1_resource,
  303. };
  304. void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
  305. {
  306. struct s3c2410_platform_i2c *npd;
  307. if (!pd) {
  308. pd = &default_i2c_data;
  309. pd->bus_num = 1;
  310. }
  311. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c1);
  312. if (!npd->cfg_gpio)
  313. npd->cfg_gpio = s3c_i2c1_cfg_gpio;
  314. }
  315. #endif /* CONFIG_S3C_DEV_I2C1 */
  316. #ifdef CONFIG_S3C_DEV_I2C2
  317. static struct resource s3c_i2c2_resource[] = {
  318. [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
  319. [1] = DEFINE_RES_IRQ(IRQ_IIC2),
  320. };
  321. struct platform_device s3c_device_i2c2 = {
  322. .name = "s3c2410-i2c",
  323. .id = 2,
  324. .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
  325. .resource = s3c_i2c2_resource,
  326. };
  327. void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
  328. {
  329. struct s3c2410_platform_i2c *npd;
  330. if (!pd) {
  331. pd = &default_i2c_data;
  332. pd->bus_num = 2;
  333. }
  334. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c2);
  335. if (!npd->cfg_gpio)
  336. npd->cfg_gpio = s3c_i2c2_cfg_gpio;
  337. }
  338. #endif /* CONFIG_S3C_DEV_I2C2 */
  339. #ifdef CONFIG_S3C_DEV_I2C3
  340. static struct resource s3c_i2c3_resource[] = {
  341. [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
  342. [1] = DEFINE_RES_IRQ(IRQ_IIC3),
  343. };
  344. struct platform_device s3c_device_i2c3 = {
  345. .name = "s3c2440-i2c",
  346. .id = 3,
  347. .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
  348. .resource = s3c_i2c3_resource,
  349. };
  350. void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
  351. {
  352. struct s3c2410_platform_i2c *npd;
  353. if (!pd) {
  354. pd = &default_i2c_data;
  355. pd->bus_num = 3;
  356. }
  357. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c3);
  358. if (!npd->cfg_gpio)
  359. npd->cfg_gpio = s3c_i2c3_cfg_gpio;
  360. }
  361. #endif /*CONFIG_S3C_DEV_I2C3 */
  362. #ifdef CONFIG_S3C_DEV_I2C4
  363. static struct resource s3c_i2c4_resource[] = {
  364. [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
  365. [1] = DEFINE_RES_IRQ(IRQ_IIC4),
  366. };
  367. struct platform_device s3c_device_i2c4 = {
  368. .name = "s3c2440-i2c",
  369. .id = 4,
  370. .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
  371. .resource = s3c_i2c4_resource,
  372. };
  373. void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
  374. {
  375. struct s3c2410_platform_i2c *npd;
  376. if (!pd) {
  377. pd = &default_i2c_data;
  378. pd->bus_num = 4;
  379. }
  380. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c4);
  381. if (!npd->cfg_gpio)
  382. npd->cfg_gpio = s3c_i2c4_cfg_gpio;
  383. }
  384. #endif /*CONFIG_S3C_DEV_I2C4 */
  385. #ifdef CONFIG_S3C_DEV_I2C5
  386. static struct resource s3c_i2c5_resource[] = {
  387. [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
  388. [1] = DEFINE_RES_IRQ(IRQ_IIC5),
  389. };
  390. struct platform_device s3c_device_i2c5 = {
  391. .name = "s3c2440-i2c",
  392. .id = 5,
  393. .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
  394. .resource = s3c_i2c5_resource,
  395. };
  396. void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
  397. {
  398. struct s3c2410_platform_i2c *npd;
  399. if (!pd) {
  400. pd = &default_i2c_data;
  401. pd->bus_num = 5;
  402. }
  403. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c5);
  404. if (!npd->cfg_gpio)
  405. npd->cfg_gpio = s3c_i2c5_cfg_gpio;
  406. }
  407. #endif /*CONFIG_S3C_DEV_I2C5 */
  408. #ifdef CONFIG_S3C_DEV_I2C6
  409. static struct resource s3c_i2c6_resource[] = {
  410. [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
  411. [1] = DEFINE_RES_IRQ(IRQ_IIC6),
  412. };
  413. struct platform_device s3c_device_i2c6 = {
  414. .name = "s3c2440-i2c",
  415. .id = 6,
  416. .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
  417. .resource = s3c_i2c6_resource,
  418. };
  419. void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
  420. {
  421. struct s3c2410_platform_i2c *npd;
  422. if (!pd) {
  423. pd = &default_i2c_data;
  424. pd->bus_num = 6;
  425. }
  426. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c6);
  427. if (!npd->cfg_gpio)
  428. npd->cfg_gpio = s3c_i2c6_cfg_gpio;
  429. }
  430. #endif /* CONFIG_S3C_DEV_I2C6 */
  431. #ifdef CONFIG_S3C_DEV_I2C7
  432. static struct resource s3c_i2c7_resource[] = {
  433. [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
  434. [1] = DEFINE_RES_IRQ(IRQ_IIC7),
  435. };
  436. struct platform_device s3c_device_i2c7 = {
  437. .name = "s3c2440-i2c",
  438. .id = 7,
  439. .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
  440. .resource = s3c_i2c7_resource,
  441. };
  442. void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
  443. {
  444. struct s3c2410_platform_i2c *npd;
  445. if (!pd) {
  446. pd = &default_i2c_data;
  447. pd->bus_num = 7;
  448. }
  449. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c7);
  450. if (!npd->cfg_gpio)
  451. npd->cfg_gpio = s3c_i2c7_cfg_gpio;
  452. }
  453. #endif /* CONFIG_S3C_DEV_I2C7 */
  454. /* I2S */
  455. #ifdef CONFIG_PLAT_S3C24XX
  456. static struct resource s3c_iis_resource[] = {
  457. [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
  458. };
  459. struct platform_device s3c_device_iis = {
  460. .name = "s3c24xx-iis",
  461. .id = -1,
  462. .num_resources = ARRAY_SIZE(s3c_iis_resource),
  463. .resource = s3c_iis_resource,
  464. .dev = {
  465. .dma_mask = &samsung_device_dma_mask,
  466. .coherent_dma_mask = DMA_BIT_MASK(32),
  467. }
  468. };
  469. #endif /* CONFIG_PLAT_S3C24XX */
  470. /* IDE CFCON */
  471. #ifdef CONFIG_SAMSUNG_DEV_IDE
  472. static struct resource s3c_cfcon_resource[] = {
  473. [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
  474. [1] = DEFINE_RES_IRQ(IRQ_CFCON),
  475. };
  476. struct platform_device s3c_device_cfcon = {
  477. .id = 0,
  478. .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
  479. .resource = s3c_cfcon_resource,
  480. };
  481. void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
  482. {
  483. s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
  484. &s3c_device_cfcon);
  485. }
  486. #endif /* CONFIG_SAMSUNG_DEV_IDE */
  487. /* KEYPAD */
  488. #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
  489. static struct resource samsung_keypad_resources[] = {
  490. [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
  491. [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
  492. };
  493. struct platform_device samsung_device_keypad = {
  494. .name = "samsung-keypad",
  495. .id = -1,
  496. .num_resources = ARRAY_SIZE(samsung_keypad_resources),
  497. .resource = samsung_keypad_resources,
  498. };
  499. void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
  500. {
  501. struct samsung_keypad_platdata *npd;
  502. npd = s3c_set_platdata(pd, sizeof(*npd), &samsung_device_keypad);
  503. if (!npd->cfg_gpio)
  504. npd->cfg_gpio = samsung_keypad_cfg_gpio;
  505. }
  506. #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
  507. /* LCD Controller */
  508. #ifdef CONFIG_PLAT_S3C24XX
  509. static struct resource s3c_lcd_resource[] = {
  510. [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
  511. [1] = DEFINE_RES_IRQ(IRQ_LCD),
  512. };
  513. struct platform_device s3c_device_lcd = {
  514. .name = "s3c2410-lcd",
  515. .id = -1,
  516. .num_resources = ARRAY_SIZE(s3c_lcd_resource),
  517. .resource = s3c_lcd_resource,
  518. .dev = {
  519. .dma_mask = &samsung_device_dma_mask,
  520. .coherent_dma_mask = DMA_BIT_MASK(32),
  521. }
  522. };
  523. void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
  524. {
  525. struct s3c2410fb_mach_info *npd;
  526. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
  527. if (npd) {
  528. npd->displays = kmemdup(pd->displays,
  529. sizeof(struct s3c2410fb_display) * npd->num_displays,
  530. GFP_KERNEL);
  531. if (!npd->displays)
  532. printk(KERN_ERR "no memory for LCD display data\n");
  533. } else {
  534. printk(KERN_ERR "no memory for LCD platform data\n");
  535. }
  536. }
  537. #endif /* CONFIG_PLAT_S3C24XX */
  538. /* NAND */
  539. #ifdef CONFIG_S3C_DEV_NAND
  540. static struct resource s3c_nand_resource[] = {
  541. [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
  542. };
  543. struct platform_device s3c_device_nand = {
  544. .name = "s3c2410-nand",
  545. .id = -1,
  546. .num_resources = ARRAY_SIZE(s3c_nand_resource),
  547. .resource = s3c_nand_resource,
  548. };
  549. /*
  550. * s3c_nand_copy_set() - copy nand set data
  551. * @set: The new structure, directly copied from the old.
  552. *
  553. * Copy all the fields from the NAND set field from what is probably __initdata
  554. * to new kernel memory. The code returns 0 if the copy happened correctly or
  555. * an error code for the calling function to display.
  556. *
  557. * Note, we currently do not try and look to see if we've already copied the
  558. * data in a previous set.
  559. */
  560. static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
  561. {
  562. void *ptr;
  563. int size;
  564. size = sizeof(struct mtd_partition) * set->nr_partitions;
  565. if (size) {
  566. ptr = kmemdup(set->partitions, size, GFP_KERNEL);
  567. set->partitions = ptr;
  568. if (!ptr)
  569. return -ENOMEM;
  570. }
  571. if (set->nr_map && set->nr_chips) {
  572. size = sizeof(int) * set->nr_chips;
  573. ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
  574. set->nr_map = ptr;
  575. if (!ptr)
  576. return -ENOMEM;
  577. }
  578. return 0;
  579. }
  580. void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
  581. {
  582. struct s3c2410_platform_nand *npd;
  583. int size;
  584. int ret;
  585. /* note, if we get a failure in allocation, we simply drop out of the
  586. * function. If there is so little memory available at initialisation
  587. * time then there is little chance the system is going to run.
  588. */
  589. npd = s3c_set_platdata(nand, sizeof(*npd), &s3c_device_nand);
  590. if (!npd)
  591. return;
  592. /* now see if we need to copy any of the nand set data */
  593. size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
  594. if (size) {
  595. struct s3c2410_nand_set *from = npd->sets;
  596. struct s3c2410_nand_set *to;
  597. int i;
  598. to = kmemdup(from, size, GFP_KERNEL);
  599. npd->sets = to; /* set, even if we failed */
  600. if (!to) {
  601. printk(KERN_ERR "%s: no memory for sets\n", __func__);
  602. return;
  603. }
  604. for (i = 0; i < npd->nr_sets; i++) {
  605. ret = s3c_nand_copy_set(to);
  606. if (ret) {
  607. printk(KERN_ERR "%s: failed to copy set %d\n",
  608. __func__, i);
  609. return;
  610. }
  611. to++;
  612. }
  613. }
  614. }
  615. #endif /* CONFIG_S3C_DEV_NAND */
  616. /* ONENAND */
  617. #ifdef CONFIG_S3C_DEV_ONENAND
  618. static struct resource s3c_onenand_resources[] = {
  619. [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
  620. [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
  621. [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
  622. };
  623. struct platform_device s3c_device_onenand = {
  624. .name = "samsung-onenand",
  625. .id = 0,
  626. .num_resources = ARRAY_SIZE(s3c_onenand_resources),
  627. .resource = s3c_onenand_resources,
  628. };
  629. #endif /* CONFIG_S3C_DEV_ONENAND */
  630. #ifdef CONFIG_S3C64XX_DEV_ONENAND1
  631. static struct resource s3c64xx_onenand1_resources[] = {
  632. [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
  633. [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
  634. [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
  635. };
  636. struct platform_device s3c64xx_device_onenand1 = {
  637. .name = "samsung-onenand",
  638. .id = 1,
  639. .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
  640. .resource = s3c64xx_onenand1_resources,
  641. };
  642. void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
  643. {
  644. s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
  645. &s3c64xx_device_onenand1);
  646. }
  647. #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
  648. /* PWM Timer */
  649. #ifdef CONFIG_SAMSUNG_DEV_PWM
  650. static struct resource samsung_pwm_resource[] = {
  651. DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
  652. };
  653. struct platform_device samsung_device_pwm = {
  654. .name = "samsung-pwm",
  655. .id = -1,
  656. .num_resources = ARRAY_SIZE(samsung_pwm_resource),
  657. .resource = samsung_pwm_resource,
  658. };
  659. void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd)
  660. {
  661. samsung_device_pwm.dev.platform_data = pd;
  662. }
  663. #endif /* CONFIG_SAMSUNG_DEV_PWM */
  664. /* RTC */
  665. #ifdef CONFIG_PLAT_S3C24XX
  666. static struct resource s3c_rtc_resource[] = {
  667. [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
  668. [1] = DEFINE_RES_IRQ(IRQ_RTC),
  669. [2] = DEFINE_RES_IRQ(IRQ_TICK),
  670. };
  671. struct platform_device s3c_device_rtc = {
  672. .name = "s3c2410-rtc",
  673. .id = -1,
  674. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  675. .resource = s3c_rtc_resource,
  676. };
  677. #endif /* CONFIG_PLAT_S3C24XX */
  678. #ifdef CONFIG_S3C_DEV_RTC
  679. static struct resource s3c_rtc_resource[] = {
  680. [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
  681. [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
  682. [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
  683. };
  684. struct platform_device s3c_device_rtc = {
  685. .name = "s3c64xx-rtc",
  686. .id = -1,
  687. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  688. .resource = s3c_rtc_resource,
  689. };
  690. #endif /* CONFIG_S3C_DEV_RTC */
  691. /* SDI */
  692. #ifdef CONFIG_PLAT_S3C24XX
  693. static struct resource s3c_sdi_resource[] = {
  694. [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
  695. [1] = DEFINE_RES_IRQ(IRQ_SDI),
  696. };
  697. struct platform_device s3c_device_sdi = {
  698. .name = "s3c2410-sdi",
  699. .id = -1,
  700. .num_resources = ARRAY_SIZE(s3c_sdi_resource),
  701. .resource = s3c_sdi_resource,
  702. };
  703. void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
  704. {
  705. s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
  706. &s3c_device_sdi);
  707. }
  708. #endif /* CONFIG_PLAT_S3C24XX */
  709. /* SPI */
  710. #ifdef CONFIG_PLAT_S3C24XX
  711. static struct resource s3c_spi0_resource[] = {
  712. [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
  713. [1] = DEFINE_RES_IRQ(IRQ_SPI0),
  714. };
  715. struct platform_device s3c_device_spi0 = {
  716. .name = "s3c2410-spi",
  717. .id = 0,
  718. .num_resources = ARRAY_SIZE(s3c_spi0_resource),
  719. .resource = s3c_spi0_resource,
  720. .dev = {
  721. .dma_mask = &samsung_device_dma_mask,
  722. .coherent_dma_mask = DMA_BIT_MASK(32),
  723. }
  724. };
  725. static struct resource s3c_spi1_resource[] = {
  726. [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
  727. [1] = DEFINE_RES_IRQ(IRQ_SPI1),
  728. };
  729. struct platform_device s3c_device_spi1 = {
  730. .name = "s3c2410-spi",
  731. .id = 1,
  732. .num_resources = ARRAY_SIZE(s3c_spi1_resource),
  733. .resource = s3c_spi1_resource,
  734. .dev = {
  735. .dma_mask = &samsung_device_dma_mask,
  736. .coherent_dma_mask = DMA_BIT_MASK(32),
  737. }
  738. };
  739. #endif /* CONFIG_PLAT_S3C24XX */
  740. /* Touchscreen */
  741. #ifdef CONFIG_PLAT_S3C24XX
  742. static struct resource s3c_ts_resource[] = {
  743. [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  744. [1] = DEFINE_RES_IRQ(IRQ_TC),
  745. };
  746. struct platform_device s3c_device_ts = {
  747. .name = "s3c2410-ts",
  748. .id = -1,
  749. .dev.parent = &s3c_device_adc.dev,
  750. .num_resources = ARRAY_SIZE(s3c_ts_resource),
  751. .resource = s3c_ts_resource,
  752. };
  753. void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
  754. {
  755. s3c_set_platdata(hard_s3c2410ts_info,
  756. sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
  757. }
  758. #endif /* CONFIG_PLAT_S3C24XX */
  759. #ifdef CONFIG_SAMSUNG_DEV_TS
  760. static struct s3c2410_ts_mach_info default_ts_data __initdata = {
  761. .delay = 10000,
  762. .presc = 49,
  763. .oversampling_shift = 2,
  764. };
  765. void __init s3c64xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
  766. {
  767. if (!pd)
  768. pd = &default_ts_data;
  769. s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
  770. &s3c_device_adc);
  771. }
  772. #endif /* CONFIG_SAMSUNG_DEV_TS */
  773. /* USB */
  774. #ifdef CONFIG_S3C_DEV_USB_HOST
  775. static struct resource s3c_usb_resource[] = {
  776. [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
  777. [1] = DEFINE_RES_IRQ(IRQ_USBH),
  778. };
  779. struct platform_device s3c_device_ohci = {
  780. .name = "s3c2410-ohci",
  781. .id = -1,
  782. .num_resources = ARRAY_SIZE(s3c_usb_resource),
  783. .resource = s3c_usb_resource,
  784. .dev = {
  785. .dma_mask = &samsung_device_dma_mask,
  786. .coherent_dma_mask = DMA_BIT_MASK(32),
  787. }
  788. };
  789. /*
  790. * s3c_ohci_set_platdata - initialise OHCI device platform data
  791. * @info: The platform data.
  792. *
  793. * This call copies the @info passed in and sets the device .platform_data
  794. * field to that copy. The @info is copied so that the original can be marked
  795. * __initdata.
  796. */
  797. void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
  798. {
  799. s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
  800. &s3c_device_ohci);
  801. }
  802. #endif /* CONFIG_S3C_DEV_USB_HOST */
  803. /* USB Device (Gadget) */
  804. #ifdef CONFIG_PLAT_S3C24XX
  805. static struct resource s3c_usbgadget_resource[] = {
  806. [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
  807. [1] = DEFINE_RES_IRQ(IRQ_USBD),
  808. };
  809. struct platform_device s3c_device_usbgadget = {
  810. .name = "s3c2410-usbgadget",
  811. .id = -1,
  812. .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
  813. .resource = s3c_usbgadget_resource,
  814. };
  815. void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
  816. {
  817. s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
  818. }
  819. #endif /* CONFIG_PLAT_S3C24XX */
  820. /* USB HSOTG */
  821. #ifdef CONFIG_S3C_DEV_USB_HSOTG
  822. static struct resource s3c_usb_hsotg_resources[] = {
  823. [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
  824. [1] = DEFINE_RES_IRQ(IRQ_OTG),
  825. };
  826. struct platform_device s3c_device_usb_hsotg = {
  827. .name = "s3c-hsotg",
  828. .id = -1,
  829. .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
  830. .resource = s3c_usb_hsotg_resources,
  831. .dev = {
  832. .dma_mask = &samsung_device_dma_mask,
  833. .coherent_dma_mask = DMA_BIT_MASK(32),
  834. },
  835. };
  836. void __init dwc2_hsotg_set_platdata(struct dwc2_hsotg_plat *pd)
  837. {
  838. struct dwc2_hsotg_plat *npd;
  839. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_usb_hsotg);
  840. if (!npd->phy_init)
  841. npd->phy_init = s5p_usb_phy_init;
  842. if (!npd->phy_exit)
  843. npd->phy_exit = s5p_usb_phy_exit;
  844. }
  845. #endif /* CONFIG_S3C_DEV_USB_HSOTG */
  846. /* USB High Spped 2.0 Device (Gadget) */
  847. #ifdef CONFIG_PLAT_S3C24XX
  848. static struct resource s3c_hsudc_resource[] = {
  849. [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
  850. [1] = DEFINE_RES_IRQ(IRQ_USBD),
  851. };
  852. struct platform_device s3c_device_usb_hsudc = {
  853. .name = "s3c-hsudc",
  854. .id = -1,
  855. .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
  856. .resource = s3c_hsudc_resource,
  857. .dev = {
  858. .dma_mask = &samsung_device_dma_mask,
  859. .coherent_dma_mask = DMA_BIT_MASK(32),
  860. },
  861. };
  862. void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
  863. {
  864. s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
  865. }
  866. #endif /* CONFIG_PLAT_S3C24XX */
  867. /* WDT */
  868. #ifdef CONFIG_S3C_DEV_WDT
  869. static struct resource s3c_wdt_resource[] = {
  870. [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
  871. [1] = DEFINE_RES_IRQ(IRQ_WDT),
  872. };
  873. struct platform_device s3c_device_wdt = {
  874. .name = "s3c2410-wdt",
  875. .id = -1,
  876. .num_resources = ARRAY_SIZE(s3c_wdt_resource),
  877. .resource = s3c_wdt_resource,
  878. };
  879. #endif /* CONFIG_S3C_DEV_WDT */
  880. #ifdef CONFIG_S3C64XX_DEV_SPI0
  881. static struct resource s3c64xx_spi0_resource[] = {
  882. [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
  883. [1] = DEFINE_RES_IRQ(IRQ_SPI0),
  884. };
  885. struct platform_device s3c64xx_device_spi0 = {
  886. .name = "s3c6410-spi",
  887. .id = 0,
  888. .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
  889. .resource = s3c64xx_spi0_resource,
  890. .dev = {
  891. .dma_mask = &samsung_device_dma_mask,
  892. .coherent_dma_mask = DMA_BIT_MASK(32),
  893. },
  894. };
  895. void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
  896. int num_cs)
  897. {
  898. struct s3c64xx_spi_info pd;
  899. /* Reject invalid configuration */
  900. if (!num_cs || src_clk_nr < 0) {
  901. pr_err("%s: Invalid SPI configuration\n", __func__);
  902. return;
  903. }
  904. pd.num_cs = num_cs;
  905. pd.src_clk_nr = src_clk_nr;
  906. pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
  907. s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
  908. }
  909. #endif /* CONFIG_S3C64XX_DEV_SPI0 */
  910. #ifdef CONFIG_S3C64XX_DEV_SPI1
  911. static struct resource s3c64xx_spi1_resource[] = {
  912. [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
  913. [1] = DEFINE_RES_IRQ(IRQ_SPI1),
  914. };
  915. struct platform_device s3c64xx_device_spi1 = {
  916. .name = "s3c6410-spi",
  917. .id = 1,
  918. .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
  919. .resource = s3c64xx_spi1_resource,
  920. .dev = {
  921. .dma_mask = &samsung_device_dma_mask,
  922. .coherent_dma_mask = DMA_BIT_MASK(32),
  923. },
  924. };
  925. void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
  926. int num_cs)
  927. {
  928. struct s3c64xx_spi_info pd;
  929. /* Reject invalid configuration */
  930. if (!num_cs || src_clk_nr < 0) {
  931. pr_err("%s: Invalid SPI configuration\n", __func__);
  932. return;
  933. }
  934. pd.num_cs = num_cs;
  935. pd.src_clk_nr = src_clk_nr;
  936. pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
  937. s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
  938. }
  939. #endif /* CONFIG_S3C64XX_DEV_SPI1 */
  940. #ifdef CONFIG_S3C64XX_DEV_SPI2
  941. static struct resource s3c64xx_spi2_resource[] = {
  942. [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
  943. [1] = DEFINE_RES_IRQ(IRQ_SPI2),
  944. };
  945. struct platform_device s3c64xx_device_spi2 = {
  946. .name = "s3c6410-spi",
  947. .id = 2,
  948. .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
  949. .resource = s3c64xx_spi2_resource,
  950. .dev = {
  951. .dma_mask = &samsung_device_dma_mask,
  952. .coherent_dma_mask = DMA_BIT_MASK(32),
  953. },
  954. };
  955. void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
  956. int num_cs)
  957. {
  958. struct s3c64xx_spi_info pd;
  959. /* Reject invalid configuration */
  960. if (!num_cs || src_clk_nr < 0) {
  961. pr_err("%s: Invalid SPI configuration\n", __func__);
  962. return;
  963. }
  964. pd.num_cs = num_cs;
  965. pd.src_clk_nr = src_clk_nr;
  966. pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
  967. s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
  968. }
  969. #endif /* CONFIG_S3C64XX_DEV_SPI2 */