reset.c 2.2 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License version 2 as
  4. * published by the Free Software Foundation.
  5. */
  6. #include <linux/kernel.h>
  7. #include <linux/module.h>
  8. #include <linux/delay.h>
  9. #include <linux/gpio.h>
  10. #include <linux/io.h>
  11. #include <asm/proc-fns.h>
  12. #include <asm/system_misc.h>
  13. #include <mach/regs-ost.h>
  14. #include <mach/reset.h>
  15. #include <mach/smemc.h>
  16. unsigned int reset_status;
  17. EXPORT_SYMBOL(reset_status);
  18. static void do_hw_reset(void);
  19. static int reset_gpio = -1;
  20. int init_gpio_reset(int gpio, int output, int level)
  21. {
  22. int rc;
  23. rc = gpio_request(gpio, "reset generator");
  24. if (rc) {
  25. printk(KERN_ERR "Can't request reset_gpio\n");
  26. goto out;
  27. }
  28. if (output)
  29. rc = gpio_direction_output(gpio, level);
  30. else
  31. rc = gpio_direction_input(gpio);
  32. if (rc) {
  33. printk(KERN_ERR "Can't configure reset_gpio\n");
  34. gpio_free(gpio);
  35. goto out;
  36. }
  37. out:
  38. if (!rc)
  39. reset_gpio = gpio;
  40. return rc;
  41. }
  42. /*
  43. * Trigger GPIO reset.
  44. * This covers various types of logic connecting gpio pin
  45. * to RESET pins (nRESET or GPIO_RESET):
  46. */
  47. static void do_gpio_reset(void)
  48. {
  49. BUG_ON(reset_gpio == -1);
  50. /* drive it low */
  51. gpio_direction_output(reset_gpio, 0);
  52. mdelay(2);
  53. /* rising edge or drive high */
  54. gpio_set_value(reset_gpio, 1);
  55. mdelay(2);
  56. /* falling edge */
  57. gpio_set_value(reset_gpio, 0);
  58. /* give it some time */
  59. mdelay(10);
  60. WARN_ON(1);
  61. /* fallback */
  62. do_hw_reset();
  63. }
  64. static void do_hw_reset(void)
  65. {
  66. /* Initialize the watchdog and let it fire */
  67. writel_relaxed(OWER_WME, OWER);
  68. writel_relaxed(OSSR_M3, OSSR);
  69. /* ... in 100 ms */
  70. writel_relaxed(readl_relaxed(OSCR) + 368640, OSMR3);
  71. /*
  72. * SDRAM hangs on watchdog reset on Marvell PXA270 (erratum 71)
  73. * we put SDRAM into self-refresh to prevent that
  74. */
  75. while (1)
  76. writel_relaxed(MDREFR_SLFRSH, MDREFR);
  77. }
  78. void pxa_restart(enum reboot_mode mode, const char *cmd)
  79. {
  80. local_irq_disable();
  81. local_fiq_disable();
  82. clear_reset_status(RESET_STATUS_ALL);
  83. switch (mode) {
  84. case REBOOT_SOFT:
  85. /* Jump into ROM at address 0 */
  86. soft_restart(0);
  87. break;
  88. case REBOOT_GPIO:
  89. do_gpio_reset();
  90. break;
  91. case REBOOT_HARD:
  92. default:
  93. do_hw_reset();
  94. break;
  95. }
  96. }