pxa27x.c 8.6 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/pxa27x.c
  3. *
  4. * Author: Nicolas Pitre
  5. * Created: Nov 05, 2002
  6. * Copyright: MontaVista Software Inc.
  7. *
  8. * Code specific to PXA27x aka Bulverde.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/dmaengine.h>
  15. #include <linux/dma/pxa-dma.h>
  16. #include <linux/gpio.h>
  17. #include <linux/gpio-pxa.h>
  18. #include <linux/module.h>
  19. #include <linux/kernel.h>
  20. #include <linux/init.h>
  21. #include <linux/irqchip.h>
  22. #include <linux/suspend.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/syscore_ops.h>
  25. #include <linux/io.h>
  26. #include <linux/irq.h>
  27. #include <linux/platform_data/i2c-pxa.h>
  28. #include <linux/platform_data/mmp_dma.h>
  29. #include <asm/mach/map.h>
  30. #include <mach/hardware.h>
  31. #include <asm/irq.h>
  32. #include <asm/suspend.h>
  33. #include <mach/irqs.h>
  34. #include "pxa27x.h"
  35. #include <mach/reset.h>
  36. #include <linux/platform_data/usb-ohci-pxa27x.h>
  37. #include "pm.h"
  38. #include <mach/dma.h>
  39. #include <mach/smemc.h>
  40. #include "generic.h"
  41. #include "devices.h"
  42. #include <linux/clk-provider.h>
  43. #include <linux/clkdev.h>
  44. void pxa27x_clear_otgph(void)
  45. {
  46. if (cpu_is_pxa27x() && (PSSR & PSSR_OTGPH))
  47. PSSR |= PSSR_OTGPH;
  48. }
  49. EXPORT_SYMBOL(pxa27x_clear_otgph);
  50. static unsigned long ac97_reset_config[] = {
  51. GPIO113_AC97_nRESET_GPIO_HIGH,
  52. GPIO113_AC97_nRESET,
  53. GPIO95_AC97_nRESET_GPIO_HIGH,
  54. GPIO95_AC97_nRESET,
  55. };
  56. void pxa27x_configure_ac97reset(int reset_gpio, bool to_gpio)
  57. {
  58. /*
  59. * This helper function is used to work around a bug in the pxa27x's
  60. * ac97 controller during a warm reset. The configuration of the
  61. * reset_gpio is changed as follows:
  62. * to_gpio == true: configured to generic output gpio and driven high
  63. * to_gpio == false: configured to ac97 controller alt fn AC97_nRESET
  64. */
  65. if (reset_gpio == 113)
  66. pxa2xx_mfp_config(to_gpio ? &ac97_reset_config[0] :
  67. &ac97_reset_config[1], 1);
  68. if (reset_gpio == 95)
  69. pxa2xx_mfp_config(to_gpio ? &ac97_reset_config[2] :
  70. &ac97_reset_config[3], 1);
  71. }
  72. EXPORT_SYMBOL_GPL(pxa27x_configure_ac97reset);
  73. #ifdef CONFIG_PM
  74. #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
  75. #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
  76. /*
  77. * allow platforms to override default PWRMODE setting used for PM_SUSPEND_MEM
  78. */
  79. static unsigned int pwrmode = PWRMODE_SLEEP;
  80. int pxa27x_set_pwrmode(unsigned int mode)
  81. {
  82. switch (mode) {
  83. case PWRMODE_SLEEP:
  84. case PWRMODE_DEEPSLEEP:
  85. pwrmode = mode;
  86. return 0;
  87. }
  88. return -EINVAL;
  89. }
  90. /*
  91. * List of global PXA peripheral registers to preserve.
  92. * More ones like CP and general purpose register values are preserved
  93. * with the stack pointer in sleep.S.
  94. */
  95. enum {
  96. SLEEP_SAVE_PSTR,
  97. SLEEP_SAVE_MDREFR,
  98. SLEEP_SAVE_PCFR,
  99. SLEEP_SAVE_COUNT
  100. };
  101. void pxa27x_cpu_pm_save(unsigned long *sleep_save)
  102. {
  103. sleep_save[SLEEP_SAVE_MDREFR] = __raw_readl(MDREFR);
  104. SAVE(PCFR);
  105. SAVE(PSTR);
  106. }
  107. void pxa27x_cpu_pm_restore(unsigned long *sleep_save)
  108. {
  109. __raw_writel(sleep_save[SLEEP_SAVE_MDREFR], MDREFR);
  110. RESTORE(PCFR);
  111. PSSR = PSSR_RDH | PSSR_PH;
  112. RESTORE(PSTR);
  113. }
  114. void pxa27x_cpu_pm_enter(suspend_state_t state)
  115. {
  116. extern void pxa_cpu_standby(void);
  117. #ifndef CONFIG_IWMMXT
  118. u64 acc0;
  119. asm volatile(".arch_extension xscale\n\t"
  120. "mra %Q0, %R0, acc0" : "=r" (acc0));
  121. #endif
  122. /* ensure voltage-change sequencer not initiated, which hangs */
  123. PCFR &= ~PCFR_FVC;
  124. /* Clear edge-detect status register. */
  125. PEDR = 0xDF12FE1B;
  126. /* Clear reset status */
  127. RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
  128. switch (state) {
  129. case PM_SUSPEND_STANDBY:
  130. pxa_cpu_standby();
  131. break;
  132. case PM_SUSPEND_MEM:
  133. cpu_suspend(pwrmode, pxa27x_finish_suspend);
  134. #ifndef CONFIG_IWMMXT
  135. asm volatile(".arch_extension xscale\n\t"
  136. "mar acc0, %Q0, %R0" : "=r" (acc0));
  137. #endif
  138. break;
  139. }
  140. }
  141. static int pxa27x_cpu_pm_valid(suspend_state_t state)
  142. {
  143. return state == PM_SUSPEND_MEM || state == PM_SUSPEND_STANDBY;
  144. }
  145. static int pxa27x_cpu_pm_prepare(void)
  146. {
  147. /* set resume return address */
  148. PSPR = __pa_symbol(cpu_resume);
  149. return 0;
  150. }
  151. static void pxa27x_cpu_pm_finish(void)
  152. {
  153. /* ensure not to come back here if it wasn't intended */
  154. PSPR = 0;
  155. }
  156. static struct pxa_cpu_pm_fns pxa27x_cpu_pm_fns = {
  157. .save_count = SLEEP_SAVE_COUNT,
  158. .save = pxa27x_cpu_pm_save,
  159. .restore = pxa27x_cpu_pm_restore,
  160. .valid = pxa27x_cpu_pm_valid,
  161. .enter = pxa27x_cpu_pm_enter,
  162. .prepare = pxa27x_cpu_pm_prepare,
  163. .finish = pxa27x_cpu_pm_finish,
  164. };
  165. static void __init pxa27x_init_pm(void)
  166. {
  167. pxa_cpu_pm_fns = &pxa27x_cpu_pm_fns;
  168. }
  169. #else
  170. static inline void pxa27x_init_pm(void) {}
  171. #endif
  172. /* PXA27x: Various gpios can issue wakeup events. This logic only
  173. * handles the simple cases, not the WEMUX2 and WEMUX3 options
  174. */
  175. static int pxa27x_set_wake(struct irq_data *d, unsigned int on)
  176. {
  177. int gpio = pxa_irq_to_gpio(d->irq);
  178. uint32_t mask;
  179. if (gpio >= 0 && gpio < 128)
  180. return gpio_set_wake(gpio, on);
  181. if (d->irq == IRQ_KEYPAD)
  182. return keypad_set_wake(on);
  183. switch (d->irq) {
  184. case IRQ_RTCAlrm:
  185. mask = PWER_RTC;
  186. break;
  187. case IRQ_USB:
  188. mask = 1u << 26;
  189. break;
  190. default:
  191. return -EINVAL;
  192. }
  193. if (on)
  194. PWER |= mask;
  195. else
  196. PWER &=~mask;
  197. return 0;
  198. }
  199. void __init pxa27x_init_irq(void)
  200. {
  201. pxa_init_irq(34, pxa27x_set_wake);
  202. }
  203. static int __init
  204. pxa27x_dt_init_irq(struct device_node *node, struct device_node *parent)
  205. {
  206. pxa_dt_irq_init(pxa27x_set_wake);
  207. set_handle_irq(ichp_handle_irq);
  208. return 0;
  209. }
  210. IRQCHIP_DECLARE(pxa27x_intc, "marvell,pxa-intc", pxa27x_dt_init_irq);
  211. static struct map_desc pxa27x_io_desc[] __initdata = {
  212. { /* Mem Ctl */
  213. .virtual = (unsigned long)SMEMC_VIRT,
  214. .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE),
  215. .length = SMEMC_SIZE,
  216. .type = MT_DEVICE
  217. }, { /* UNCACHED_PHYS_0 */
  218. .virtual = UNCACHED_PHYS_0,
  219. .pfn = __phys_to_pfn(0x00000000),
  220. .length = UNCACHED_PHYS_0_SIZE,
  221. .type = MT_DEVICE
  222. },
  223. };
  224. void __init pxa27x_map_io(void)
  225. {
  226. pxa_map_io();
  227. iotable_init(ARRAY_AND_SIZE(pxa27x_io_desc));
  228. pxa27x_get_clk_frequency_khz(1);
  229. }
  230. /*
  231. * device registration specific to PXA27x.
  232. */
  233. void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
  234. {
  235. local_irq_disable();
  236. PCFR |= PCFR_PI2CEN;
  237. local_irq_enable();
  238. pxa_register_device(&pxa27x_device_i2c_power, info);
  239. }
  240. static struct pxa_gpio_platform_data pxa27x_gpio_info __initdata = {
  241. .irq_base = PXA_GPIO_TO_IRQ(0),
  242. .gpio_set_wake = gpio_set_wake,
  243. };
  244. static struct platform_device *devices[] __initdata = {
  245. &pxa27x_device_udc,
  246. &pxa_device_pmu,
  247. &pxa_device_i2s,
  248. &pxa_device_asoc_ssp1,
  249. &pxa_device_asoc_ssp2,
  250. &pxa_device_asoc_ssp3,
  251. &pxa_device_asoc_platform,
  252. &pxa_device_rtc,
  253. &pxa27x_device_ssp1,
  254. &pxa27x_device_ssp2,
  255. &pxa27x_device_ssp3,
  256. &pxa27x_device_pwm0,
  257. &pxa27x_device_pwm1,
  258. };
  259. static const struct dma_slave_map pxa27x_slave_map[] = {
  260. /* PXA25x, PXA27x and PXA3xx common entries */
  261. { "pxa2xx-ac97", "pcm_pcm_mic_mono", PDMA_FILTER_PARAM(LOWEST, 8) },
  262. { "pxa2xx-ac97", "pcm_pcm_aux_mono_in", PDMA_FILTER_PARAM(LOWEST, 9) },
  263. { "pxa2xx-ac97", "pcm_pcm_aux_mono_out",
  264. PDMA_FILTER_PARAM(LOWEST, 10) },
  265. { "pxa2xx-ac97", "pcm_pcm_stereo_in", PDMA_FILTER_PARAM(LOWEST, 11) },
  266. { "pxa2xx-ac97", "pcm_pcm_stereo_out", PDMA_FILTER_PARAM(LOWEST, 12) },
  267. { "pxa-ssp-dai.0", "rx", PDMA_FILTER_PARAM(LOWEST, 13) },
  268. { "pxa-ssp-dai.0", "tx", PDMA_FILTER_PARAM(LOWEST, 14) },
  269. { "pxa-ssp-dai.1", "rx", PDMA_FILTER_PARAM(LOWEST, 15) },
  270. { "pxa-ssp-dai.1", "tx", PDMA_FILTER_PARAM(LOWEST, 16) },
  271. { "pxa2xx-ir", "rx", PDMA_FILTER_PARAM(LOWEST, 17) },
  272. { "pxa2xx-ir", "tx", PDMA_FILTER_PARAM(LOWEST, 18) },
  273. { "pxa2xx-mci.0", "rx", PDMA_FILTER_PARAM(LOWEST, 21) },
  274. { "pxa2xx-mci.0", "tx", PDMA_FILTER_PARAM(LOWEST, 22) },
  275. { "pxa-ssp-dai.2", "rx", PDMA_FILTER_PARAM(LOWEST, 66) },
  276. { "pxa-ssp-dai.2", "tx", PDMA_FILTER_PARAM(LOWEST, 67) },
  277. /* PXA27x specific map */
  278. { "pxa2xx-i2s", "rx", PDMA_FILTER_PARAM(LOWEST, 2) },
  279. { "pxa2xx-i2s", "tx", PDMA_FILTER_PARAM(LOWEST, 3) },
  280. { "pxa27x-camera.0", "CI_Y", PDMA_FILTER_PARAM(HIGHEST, 68) },
  281. { "pxa27x-camera.0", "CI_U", PDMA_FILTER_PARAM(HIGHEST, 69) },
  282. { "pxa27x-camera.0", "CI_V", PDMA_FILTER_PARAM(HIGHEST, 70) },
  283. };
  284. static struct mmp_dma_platdata pxa27x_dma_pdata = {
  285. .dma_channels = 32,
  286. .nb_requestors = 75,
  287. .slave_map = pxa27x_slave_map,
  288. .slave_map_cnt = ARRAY_SIZE(pxa27x_slave_map),
  289. };
  290. static int __init pxa27x_init(void)
  291. {
  292. int ret = 0;
  293. if (cpu_is_pxa27x()) {
  294. reset_status = RCSR;
  295. pxa27x_init_pm();
  296. register_syscore_ops(&pxa_irq_syscore_ops);
  297. register_syscore_ops(&pxa2xx_mfp_syscore_ops);
  298. if (!of_have_populated_dt()) {
  299. pxa_register_device(&pxa27x_device_gpio,
  300. &pxa27x_gpio_info);
  301. pxa2xx_set_dmac_info(&pxa27x_dma_pdata);
  302. ret = platform_add_devices(devices,
  303. ARRAY_SIZE(devices));
  304. }
  305. }
  306. return ret;
  307. }
  308. postcore_initcall(pxa27x_init);