pxa25x.c 6.3 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/pxa25x.c
  3. *
  4. * Author: Nicolas Pitre
  5. * Created: Jun 15, 2001
  6. * Copyright: MontaVista Software Inc.
  7. *
  8. * Code specific to PXA21x/25x/26x variants.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. * Since this file should be linked before any other machine specific file,
  15. * the __initcall() here will be executed first. This serves as default
  16. * initialization stuff for PXA machines which can be overridden later if
  17. * need be.
  18. */
  19. #include <linux/dmaengine.h>
  20. #include <linux/dma/pxa-dma.h>
  21. #include <linux/gpio.h>
  22. #include <linux/gpio-pxa.h>
  23. #include <linux/module.h>
  24. #include <linux/kernel.h>
  25. #include <linux/init.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/suspend.h>
  28. #include <linux/syscore_ops.h>
  29. #include <linux/irq.h>
  30. #include <linux/irqchip.h>
  31. #include <linux/platform_data/mmp_dma.h>
  32. #include <asm/mach/map.h>
  33. #include <asm/suspend.h>
  34. #include <mach/hardware.h>
  35. #include <mach/irqs.h>
  36. #include "pxa25x.h"
  37. #include <mach/reset.h>
  38. #include "pm.h"
  39. #include <mach/dma.h>
  40. #include <mach/smemc.h>
  41. #include "generic.h"
  42. #include "devices.h"
  43. /*
  44. * Various clock factors driven by the CCCR register.
  45. */
  46. #ifdef CONFIG_PM
  47. #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
  48. #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
  49. /*
  50. * List of global PXA peripheral registers to preserve.
  51. * More ones like CP and general purpose register values are preserved
  52. * with the stack pointer in sleep.S.
  53. */
  54. enum {
  55. SLEEP_SAVE_PSTR,
  56. SLEEP_SAVE_COUNT
  57. };
  58. static void pxa25x_cpu_pm_save(unsigned long *sleep_save)
  59. {
  60. SAVE(PSTR);
  61. }
  62. static void pxa25x_cpu_pm_restore(unsigned long *sleep_save)
  63. {
  64. RESTORE(PSTR);
  65. }
  66. static void pxa25x_cpu_pm_enter(suspend_state_t state)
  67. {
  68. /* Clear reset status */
  69. RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
  70. switch (state) {
  71. case PM_SUSPEND_MEM:
  72. cpu_suspend(PWRMODE_SLEEP, pxa25x_finish_suspend);
  73. break;
  74. }
  75. }
  76. static int pxa25x_cpu_pm_prepare(void)
  77. {
  78. /* set resume return address */
  79. PSPR = __pa_symbol(cpu_resume);
  80. return 0;
  81. }
  82. static void pxa25x_cpu_pm_finish(void)
  83. {
  84. /* ensure not to come back here if it wasn't intended */
  85. PSPR = 0;
  86. }
  87. static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = {
  88. .save_count = SLEEP_SAVE_COUNT,
  89. .valid = suspend_valid_only_mem,
  90. .save = pxa25x_cpu_pm_save,
  91. .restore = pxa25x_cpu_pm_restore,
  92. .enter = pxa25x_cpu_pm_enter,
  93. .prepare = pxa25x_cpu_pm_prepare,
  94. .finish = pxa25x_cpu_pm_finish,
  95. };
  96. static void __init pxa25x_init_pm(void)
  97. {
  98. pxa_cpu_pm_fns = &pxa25x_cpu_pm_fns;
  99. }
  100. #else
  101. static inline void pxa25x_init_pm(void) {}
  102. #endif
  103. /* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm
  104. */
  105. static int pxa25x_set_wake(struct irq_data *d, unsigned int on)
  106. {
  107. int gpio = pxa_irq_to_gpio(d->irq);
  108. uint32_t mask = 0;
  109. if (gpio >= 0 && gpio < 85)
  110. return gpio_set_wake(gpio, on);
  111. if (d->irq == IRQ_RTCAlrm) {
  112. mask = PWER_RTC;
  113. goto set_pwer;
  114. }
  115. return -EINVAL;
  116. set_pwer:
  117. if (on)
  118. PWER |= mask;
  119. else
  120. PWER &=~mask;
  121. return 0;
  122. }
  123. void __init pxa25x_init_irq(void)
  124. {
  125. pxa_init_irq(32, pxa25x_set_wake);
  126. }
  127. #ifdef CONFIG_CPU_PXA26x
  128. void __init pxa26x_init_irq(void)
  129. {
  130. pxa_init_irq(32, pxa25x_set_wake);
  131. }
  132. #endif
  133. static int __init __init
  134. pxa25x_dt_init_irq(struct device_node *node, struct device_node *parent)
  135. {
  136. pxa_dt_irq_init(pxa25x_set_wake);
  137. set_handle_irq(icip_handle_irq);
  138. return 0;
  139. }
  140. IRQCHIP_DECLARE(pxa25x_intc, "marvell,pxa-intc", pxa25x_dt_init_irq);
  141. static struct map_desc pxa25x_io_desc[] __initdata = {
  142. { /* Mem Ctl */
  143. .virtual = (unsigned long)SMEMC_VIRT,
  144. .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE),
  145. .length = SMEMC_SIZE,
  146. .type = MT_DEVICE
  147. }, { /* UNCACHED_PHYS_0 */
  148. .virtual = UNCACHED_PHYS_0,
  149. .pfn = __phys_to_pfn(0x00000000),
  150. .length = UNCACHED_PHYS_0_SIZE,
  151. .type = MT_DEVICE
  152. },
  153. };
  154. void __init pxa25x_map_io(void)
  155. {
  156. pxa_map_io();
  157. iotable_init(ARRAY_AND_SIZE(pxa25x_io_desc));
  158. pxa25x_get_clk_frequency_khz(1);
  159. }
  160. static struct pxa_gpio_platform_data pxa25x_gpio_info __initdata = {
  161. .irq_base = PXA_GPIO_TO_IRQ(0),
  162. .gpio_set_wake = gpio_set_wake,
  163. };
  164. static struct platform_device *pxa25x_devices[] __initdata = {
  165. &pxa25x_device_udc,
  166. &pxa_device_pmu,
  167. &pxa_device_i2s,
  168. &sa1100_device_rtc,
  169. &pxa25x_device_ssp,
  170. &pxa25x_device_nssp,
  171. &pxa25x_device_assp,
  172. &pxa25x_device_pwm0,
  173. &pxa25x_device_pwm1,
  174. &pxa_device_asoc_platform,
  175. };
  176. static const struct dma_slave_map pxa25x_slave_map[] = {
  177. /* PXA25x, PXA27x and PXA3xx common entries */
  178. { "pxa2xx-ac97", "pcm_pcm_mic_mono", PDMA_FILTER_PARAM(LOWEST, 8) },
  179. { "pxa2xx-ac97", "pcm_pcm_aux_mono_in", PDMA_FILTER_PARAM(LOWEST, 9) },
  180. { "pxa2xx-ac97", "pcm_pcm_aux_mono_out",
  181. PDMA_FILTER_PARAM(LOWEST, 10) },
  182. { "pxa2xx-ac97", "pcm_pcm_stereo_in", PDMA_FILTER_PARAM(LOWEST, 11) },
  183. { "pxa2xx-ac97", "pcm_pcm_stereo_out", PDMA_FILTER_PARAM(LOWEST, 12) },
  184. { "pxa-ssp-dai.1", "rx", PDMA_FILTER_PARAM(LOWEST, 13) },
  185. { "pxa-ssp-dai.1", "tx", PDMA_FILTER_PARAM(LOWEST, 14) },
  186. { "pxa-ssp-dai.2", "rx", PDMA_FILTER_PARAM(LOWEST, 15) },
  187. { "pxa-ssp-dai.2", "tx", PDMA_FILTER_PARAM(LOWEST, 16) },
  188. { "pxa2xx-ir", "rx", PDMA_FILTER_PARAM(LOWEST, 17) },
  189. { "pxa2xx-ir", "tx", PDMA_FILTER_PARAM(LOWEST, 18) },
  190. { "pxa2xx-mci.0", "rx", PDMA_FILTER_PARAM(LOWEST, 21) },
  191. { "pxa2xx-mci.0", "tx", PDMA_FILTER_PARAM(LOWEST, 22) },
  192. /* PXA25x specific map */
  193. { "pxa25x-ssp.0", "rx", PDMA_FILTER_PARAM(LOWEST, 13) },
  194. { "pxa25x-ssp.0", "tx", PDMA_FILTER_PARAM(LOWEST, 14) },
  195. { "pxa25x-nssp.1", "rx", PDMA_FILTER_PARAM(LOWEST, 15) },
  196. { "pxa25x-nssp.1", "tx", PDMA_FILTER_PARAM(LOWEST, 16) },
  197. { "pxa25x-nssp.2", "rx", PDMA_FILTER_PARAM(LOWEST, 23) },
  198. { "pxa25x-nssp.2", "tx", PDMA_FILTER_PARAM(LOWEST, 24) },
  199. };
  200. static struct mmp_dma_platdata pxa25x_dma_pdata = {
  201. .dma_channels = 16,
  202. .nb_requestors = 40,
  203. .slave_map = pxa25x_slave_map,
  204. .slave_map_cnt = ARRAY_SIZE(pxa25x_slave_map),
  205. };
  206. static int __init pxa25x_init(void)
  207. {
  208. int ret = 0;
  209. if (cpu_is_pxa25x()) {
  210. reset_status = RCSR;
  211. pxa25x_init_pm();
  212. register_syscore_ops(&pxa_irq_syscore_ops);
  213. register_syscore_ops(&pxa2xx_mfp_syscore_ops);
  214. if (!of_have_populated_dt()) {
  215. pxa2xx_set_dmac_info(&pxa25x_dma_pdata);
  216. pxa_register_device(&pxa25x_device_gpio, &pxa25x_gpio_info);
  217. ret = platform_add_devices(pxa25x_devices,
  218. ARRAY_SIZE(pxa25x_devices));
  219. }
  220. }
  221. return ret;
  222. }
  223. postcore_initcall(pxa25x_init);