devices.c 23 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113
  1. // SPDX-License-Identifier: GPL-2.0
  2. #include <linux/module.h>
  3. #include <linux/kernel.h>
  4. #include <linux/init.h>
  5. #include <linux/platform_device.h>
  6. #include <linux/clkdev.h>
  7. #include <linux/dma-mapping.h>
  8. #include <linux/dmaengine.h>
  9. #include <linux/spi/pxa2xx_spi.h>
  10. #include <linux/platform_data/i2c-pxa.h>
  11. #include "udc.h"
  12. #include <linux/platform_data/usb-pxa3xx-ulpi.h>
  13. #include <linux/platform_data/video-pxafb.h>
  14. #include <linux/platform_data/mmc-pxamci.h>
  15. #include <linux/platform_data/irda-pxaficp.h>
  16. #include <mach/irqs.h>
  17. #include <linux/platform_data/usb-ohci-pxa27x.h>
  18. #include <linux/platform_data/keypad-pxa27x.h>
  19. #include <linux/platform_data/media/camera-pxa.h>
  20. #include <mach/audio.h>
  21. #include <mach/hardware.h>
  22. #include <linux/platform_data/mmp_dma.h>
  23. #include <linux/platform_data/mtd-nand-pxa3xx.h>
  24. #include "devices.h"
  25. #include "generic.h"
  26. void __init pxa_register_device(struct platform_device *dev, void *data)
  27. {
  28. int ret;
  29. dev->dev.platform_data = data;
  30. ret = platform_device_register(dev);
  31. if (ret)
  32. dev_err(&dev->dev, "unable to register device: %d\n", ret);
  33. }
  34. static struct resource pxa_resource_pmu = {
  35. .start = IRQ_PMU,
  36. .end = IRQ_PMU,
  37. .flags = IORESOURCE_IRQ,
  38. };
  39. struct platform_device pxa_device_pmu = {
  40. .name = "xscale-pmu",
  41. .id = -1,
  42. .resource = &pxa_resource_pmu,
  43. .num_resources = 1,
  44. };
  45. static struct resource pxamci_resources[] = {
  46. [0] = {
  47. .start = 0x41100000,
  48. .end = 0x41100fff,
  49. .flags = IORESOURCE_MEM,
  50. },
  51. [1] = {
  52. .start = IRQ_MMC,
  53. .end = IRQ_MMC,
  54. .flags = IORESOURCE_IRQ,
  55. },
  56. };
  57. static u64 pxamci_dmamask = 0xffffffffUL;
  58. struct platform_device pxa_device_mci = {
  59. .name = "pxa2xx-mci",
  60. .id = 0,
  61. .dev = {
  62. .dma_mask = &pxamci_dmamask,
  63. .coherent_dma_mask = 0xffffffff,
  64. },
  65. .num_resources = ARRAY_SIZE(pxamci_resources),
  66. .resource = pxamci_resources,
  67. };
  68. void __init pxa_set_mci_info(struct pxamci_platform_data *info)
  69. {
  70. pxa_register_device(&pxa_device_mci, info);
  71. }
  72. static struct pxa2xx_udc_mach_info pxa_udc_info = {
  73. .gpio_pullup = -1,
  74. };
  75. void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
  76. {
  77. memcpy(&pxa_udc_info, info, sizeof *info);
  78. }
  79. static struct resource pxa2xx_udc_resources[] = {
  80. [0] = {
  81. .start = 0x40600000,
  82. .end = 0x4060ffff,
  83. .flags = IORESOURCE_MEM,
  84. },
  85. [1] = {
  86. .start = IRQ_USB,
  87. .end = IRQ_USB,
  88. .flags = IORESOURCE_IRQ,
  89. },
  90. };
  91. static u64 udc_dma_mask = ~(u32)0;
  92. struct platform_device pxa25x_device_udc = {
  93. .name = "pxa25x-udc",
  94. .id = -1,
  95. .resource = pxa2xx_udc_resources,
  96. .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
  97. .dev = {
  98. .platform_data = &pxa_udc_info,
  99. .dma_mask = &udc_dma_mask,
  100. }
  101. };
  102. struct platform_device pxa27x_device_udc = {
  103. .name = "pxa27x-udc",
  104. .id = -1,
  105. .resource = pxa2xx_udc_resources,
  106. .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
  107. .dev = {
  108. .platform_data = &pxa_udc_info,
  109. .dma_mask = &udc_dma_mask,
  110. }
  111. };
  112. #ifdef CONFIG_PXA3xx
  113. static struct resource pxa3xx_u2d_resources[] = {
  114. [0] = {
  115. .start = 0x54100000,
  116. .end = 0x54100fff,
  117. .flags = IORESOURCE_MEM,
  118. },
  119. [1] = {
  120. .start = IRQ_USB2,
  121. .end = IRQ_USB2,
  122. .flags = IORESOURCE_IRQ,
  123. },
  124. };
  125. struct platform_device pxa3xx_device_u2d = {
  126. .name = "pxa3xx-u2d",
  127. .id = -1,
  128. .resource = pxa3xx_u2d_resources,
  129. .num_resources = ARRAY_SIZE(pxa3xx_u2d_resources),
  130. };
  131. void __init pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info)
  132. {
  133. pxa_register_device(&pxa3xx_device_u2d, info);
  134. }
  135. #endif /* CONFIG_PXA3xx */
  136. static struct resource pxafb_resources[] = {
  137. [0] = {
  138. .start = 0x44000000,
  139. .end = 0x4400ffff,
  140. .flags = IORESOURCE_MEM,
  141. },
  142. [1] = {
  143. .start = IRQ_LCD,
  144. .end = IRQ_LCD,
  145. .flags = IORESOURCE_IRQ,
  146. },
  147. };
  148. static u64 fb_dma_mask = ~(u64)0;
  149. struct platform_device pxa_device_fb = {
  150. .name = "pxa2xx-fb",
  151. .id = -1,
  152. .dev = {
  153. .dma_mask = &fb_dma_mask,
  154. .coherent_dma_mask = 0xffffffff,
  155. },
  156. .num_resources = ARRAY_SIZE(pxafb_resources),
  157. .resource = pxafb_resources,
  158. };
  159. void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info)
  160. {
  161. pxa_device_fb.dev.parent = parent;
  162. pxa_register_device(&pxa_device_fb, info);
  163. }
  164. static struct resource pxa_resource_ffuart[] = {
  165. {
  166. .start = 0x40100000,
  167. .end = 0x40100023,
  168. .flags = IORESOURCE_MEM,
  169. }, {
  170. .start = IRQ_FFUART,
  171. .end = IRQ_FFUART,
  172. .flags = IORESOURCE_IRQ,
  173. }
  174. };
  175. struct platform_device pxa_device_ffuart = {
  176. .name = "pxa2xx-uart",
  177. .id = 0,
  178. .resource = pxa_resource_ffuart,
  179. .num_resources = ARRAY_SIZE(pxa_resource_ffuart),
  180. };
  181. void __init pxa_set_ffuart_info(void *info)
  182. {
  183. pxa_register_device(&pxa_device_ffuart, info);
  184. }
  185. static struct resource pxa_resource_btuart[] = {
  186. {
  187. .start = 0x40200000,
  188. .end = 0x40200023,
  189. .flags = IORESOURCE_MEM,
  190. }, {
  191. .start = IRQ_BTUART,
  192. .end = IRQ_BTUART,
  193. .flags = IORESOURCE_IRQ,
  194. }
  195. };
  196. struct platform_device pxa_device_btuart = {
  197. .name = "pxa2xx-uart",
  198. .id = 1,
  199. .resource = pxa_resource_btuart,
  200. .num_resources = ARRAY_SIZE(pxa_resource_btuart),
  201. };
  202. void __init pxa_set_btuart_info(void *info)
  203. {
  204. pxa_register_device(&pxa_device_btuart, info);
  205. }
  206. static struct resource pxa_resource_stuart[] = {
  207. {
  208. .start = 0x40700000,
  209. .end = 0x40700023,
  210. .flags = IORESOURCE_MEM,
  211. }, {
  212. .start = IRQ_STUART,
  213. .end = IRQ_STUART,
  214. .flags = IORESOURCE_IRQ,
  215. }
  216. };
  217. struct platform_device pxa_device_stuart = {
  218. .name = "pxa2xx-uart",
  219. .id = 2,
  220. .resource = pxa_resource_stuart,
  221. .num_resources = ARRAY_SIZE(pxa_resource_stuart),
  222. };
  223. void __init pxa_set_stuart_info(void *info)
  224. {
  225. pxa_register_device(&pxa_device_stuart, info);
  226. }
  227. static struct resource pxa_resource_hwuart[] = {
  228. {
  229. .start = 0x41600000,
  230. .end = 0x4160002F,
  231. .flags = IORESOURCE_MEM,
  232. }, {
  233. .start = IRQ_HWUART,
  234. .end = IRQ_HWUART,
  235. .flags = IORESOURCE_IRQ,
  236. }
  237. };
  238. struct platform_device pxa_device_hwuart = {
  239. .name = "pxa2xx-uart",
  240. .id = 3,
  241. .resource = pxa_resource_hwuart,
  242. .num_resources = ARRAY_SIZE(pxa_resource_hwuart),
  243. };
  244. void __init pxa_set_hwuart_info(void *info)
  245. {
  246. if (cpu_is_pxa255())
  247. pxa_register_device(&pxa_device_hwuart, info);
  248. else
  249. pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
  250. }
  251. static struct resource pxai2c_resources[] = {
  252. {
  253. .start = 0x40301680,
  254. .end = 0x403016a3,
  255. .flags = IORESOURCE_MEM,
  256. }, {
  257. .start = IRQ_I2C,
  258. .end = IRQ_I2C,
  259. .flags = IORESOURCE_IRQ,
  260. },
  261. };
  262. struct platform_device pxa_device_i2c = {
  263. .name = "pxa2xx-i2c",
  264. .id = 0,
  265. .resource = pxai2c_resources,
  266. .num_resources = ARRAY_SIZE(pxai2c_resources),
  267. };
  268. void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
  269. {
  270. pxa_register_device(&pxa_device_i2c, info);
  271. }
  272. #ifdef CONFIG_PXA27x
  273. static struct resource pxa27x_resources_i2c_power[] = {
  274. {
  275. .start = 0x40f00180,
  276. .end = 0x40f001a3,
  277. .flags = IORESOURCE_MEM,
  278. }, {
  279. .start = IRQ_PWRI2C,
  280. .end = IRQ_PWRI2C,
  281. .flags = IORESOURCE_IRQ,
  282. },
  283. };
  284. struct platform_device pxa27x_device_i2c_power = {
  285. .name = "pxa2xx-i2c",
  286. .id = 1,
  287. .resource = pxa27x_resources_i2c_power,
  288. .num_resources = ARRAY_SIZE(pxa27x_resources_i2c_power),
  289. };
  290. #endif
  291. static struct resource pxai2s_resources[] = {
  292. {
  293. .start = 0x40400000,
  294. .end = 0x40400083,
  295. .flags = IORESOURCE_MEM,
  296. }, {
  297. .start = IRQ_I2S,
  298. .end = IRQ_I2S,
  299. .flags = IORESOURCE_IRQ,
  300. },
  301. };
  302. struct platform_device pxa_device_i2s = {
  303. .name = "pxa2xx-i2s",
  304. .id = -1,
  305. .resource = pxai2s_resources,
  306. .num_resources = ARRAY_SIZE(pxai2s_resources),
  307. };
  308. struct platform_device pxa_device_asoc_ssp1 = {
  309. .name = "pxa-ssp-dai",
  310. .id = 0,
  311. };
  312. struct platform_device pxa_device_asoc_ssp2= {
  313. .name = "pxa-ssp-dai",
  314. .id = 1,
  315. };
  316. struct platform_device pxa_device_asoc_ssp3 = {
  317. .name = "pxa-ssp-dai",
  318. .id = 2,
  319. };
  320. struct platform_device pxa_device_asoc_ssp4 = {
  321. .name = "pxa-ssp-dai",
  322. .id = 3,
  323. };
  324. struct platform_device pxa_device_asoc_platform = {
  325. .name = "pxa-pcm-audio",
  326. .id = -1,
  327. };
  328. static u64 pxaficp_dmamask = ~(u32)0;
  329. static struct resource pxa_ir_resources[] = {
  330. [0] = {
  331. .start = IRQ_STUART,
  332. .end = IRQ_STUART,
  333. .flags = IORESOURCE_IRQ,
  334. },
  335. [1] = {
  336. .start = IRQ_ICP,
  337. .end = IRQ_ICP,
  338. .flags = IORESOURCE_IRQ,
  339. },
  340. [3] = {
  341. .start = 0x40800000,
  342. .end = 0x4080001b,
  343. .flags = IORESOURCE_MEM,
  344. },
  345. [4] = {
  346. .start = 0x40700000,
  347. .end = 0x40700023,
  348. .flags = IORESOURCE_MEM,
  349. },
  350. };
  351. struct platform_device pxa_device_ficp = {
  352. .name = "pxa2xx-ir",
  353. .id = -1,
  354. .num_resources = ARRAY_SIZE(pxa_ir_resources),
  355. .resource = pxa_ir_resources,
  356. .dev = {
  357. .dma_mask = &pxaficp_dmamask,
  358. .coherent_dma_mask = 0xffffffff,
  359. },
  360. };
  361. void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
  362. {
  363. pxa_register_device(&pxa_device_ficp, info);
  364. }
  365. static struct resource pxa_rtc_resources[] = {
  366. [0] = {
  367. .start = 0x40900000,
  368. .end = 0x40900000 + 0x3b,
  369. .flags = IORESOURCE_MEM,
  370. },
  371. [1] = {
  372. .start = IRQ_RTC1Hz,
  373. .end = IRQ_RTC1Hz,
  374. .name = "rtc 1Hz",
  375. .flags = IORESOURCE_IRQ,
  376. },
  377. [2] = {
  378. .start = IRQ_RTCAlrm,
  379. .end = IRQ_RTCAlrm,
  380. .name = "rtc alarm",
  381. .flags = IORESOURCE_IRQ,
  382. },
  383. };
  384. struct platform_device pxa_device_rtc = {
  385. .name = "pxa-rtc",
  386. .id = -1,
  387. .num_resources = ARRAY_SIZE(pxa_rtc_resources),
  388. .resource = pxa_rtc_resources,
  389. };
  390. struct platform_device sa1100_device_rtc = {
  391. .name = "sa1100-rtc",
  392. .id = -1,
  393. .num_resources = ARRAY_SIZE(pxa_rtc_resources),
  394. .resource = pxa_rtc_resources,
  395. };
  396. static struct resource pxa_ac97_resources[] = {
  397. [0] = {
  398. .start = 0x40500000,
  399. .end = 0x40500000 + 0xfff,
  400. .flags = IORESOURCE_MEM,
  401. },
  402. [1] = {
  403. .start = IRQ_AC97,
  404. .end = IRQ_AC97,
  405. .flags = IORESOURCE_IRQ,
  406. },
  407. };
  408. static u64 pxa_ac97_dmamask = 0xffffffffUL;
  409. struct platform_device pxa_device_ac97 = {
  410. .name = "pxa2xx-ac97",
  411. .id = -1,
  412. .dev = {
  413. .dma_mask = &pxa_ac97_dmamask,
  414. .coherent_dma_mask = 0xffffffff,
  415. },
  416. .num_resources = ARRAY_SIZE(pxa_ac97_resources),
  417. .resource = pxa_ac97_resources,
  418. };
  419. void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
  420. {
  421. int ret;
  422. ret = clk_add_alias("ac97_clk", "pxa2xx-ac97:0", "AC97CLK",
  423. &pxa_device_ac97.dev);
  424. if (ret)
  425. pr_err("PXA AC97 clock1 alias error: %d\n", ret);
  426. ret = clk_add_alias("ac97_clk", "pxa2xx-ac97:1", "AC97CLK",
  427. &pxa_device_ac97.dev);
  428. if (ret)
  429. pr_err("PXA AC97 clock2 alias error: %d\n", ret);
  430. pxa_register_device(&pxa_device_ac97, ops);
  431. }
  432. #ifdef CONFIG_PXA25x
  433. static struct resource pxa25x_resource_pwm0[] = {
  434. [0] = {
  435. .start = 0x40b00000,
  436. .end = 0x40b0000f,
  437. .flags = IORESOURCE_MEM,
  438. },
  439. };
  440. struct platform_device pxa25x_device_pwm0 = {
  441. .name = "pxa25x-pwm",
  442. .id = 0,
  443. .resource = pxa25x_resource_pwm0,
  444. .num_resources = ARRAY_SIZE(pxa25x_resource_pwm0),
  445. };
  446. static struct resource pxa25x_resource_pwm1[] = {
  447. [0] = {
  448. .start = 0x40c00000,
  449. .end = 0x40c0000f,
  450. .flags = IORESOURCE_MEM,
  451. },
  452. };
  453. struct platform_device pxa25x_device_pwm1 = {
  454. .name = "pxa25x-pwm",
  455. .id = 1,
  456. .resource = pxa25x_resource_pwm1,
  457. .num_resources = ARRAY_SIZE(pxa25x_resource_pwm1),
  458. };
  459. static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
  460. static struct resource pxa25x_resource_ssp[] = {
  461. [0] = {
  462. .start = 0x41000000,
  463. .end = 0x4100001f,
  464. .flags = IORESOURCE_MEM,
  465. },
  466. [1] = {
  467. .start = IRQ_SSP,
  468. .end = IRQ_SSP,
  469. .flags = IORESOURCE_IRQ,
  470. },
  471. };
  472. struct platform_device pxa25x_device_ssp = {
  473. .name = "pxa25x-ssp",
  474. .id = 0,
  475. .dev = {
  476. .dma_mask = &pxa25x_ssp_dma_mask,
  477. .coherent_dma_mask = DMA_BIT_MASK(32),
  478. },
  479. .resource = pxa25x_resource_ssp,
  480. .num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
  481. };
  482. static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
  483. static struct resource pxa25x_resource_nssp[] = {
  484. [0] = {
  485. .start = 0x41400000,
  486. .end = 0x4140002f,
  487. .flags = IORESOURCE_MEM,
  488. },
  489. [1] = {
  490. .start = IRQ_NSSP,
  491. .end = IRQ_NSSP,
  492. .flags = IORESOURCE_IRQ,
  493. },
  494. };
  495. struct platform_device pxa25x_device_nssp = {
  496. .name = "pxa25x-nssp",
  497. .id = 1,
  498. .dev = {
  499. .dma_mask = &pxa25x_nssp_dma_mask,
  500. .coherent_dma_mask = DMA_BIT_MASK(32),
  501. },
  502. .resource = pxa25x_resource_nssp,
  503. .num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
  504. };
  505. static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
  506. static struct resource pxa25x_resource_assp[] = {
  507. [0] = {
  508. .start = 0x41500000,
  509. .end = 0x4150002f,
  510. .flags = IORESOURCE_MEM,
  511. },
  512. [1] = {
  513. .start = IRQ_ASSP,
  514. .end = IRQ_ASSP,
  515. .flags = IORESOURCE_IRQ,
  516. },
  517. };
  518. struct platform_device pxa25x_device_assp = {
  519. /* ASSP is basically equivalent to NSSP */
  520. .name = "pxa25x-nssp",
  521. .id = 2,
  522. .dev = {
  523. .dma_mask = &pxa25x_assp_dma_mask,
  524. .coherent_dma_mask = DMA_BIT_MASK(32),
  525. },
  526. .resource = pxa25x_resource_assp,
  527. .num_resources = ARRAY_SIZE(pxa25x_resource_assp),
  528. };
  529. #endif /* CONFIG_PXA25x */
  530. #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
  531. static struct resource pxa27x_resource_camera[] = {
  532. [0] = {
  533. .start = 0x50000000,
  534. .end = 0x50000fff,
  535. .flags = IORESOURCE_MEM,
  536. },
  537. [1] = {
  538. .start = IRQ_CAMERA,
  539. .end = IRQ_CAMERA,
  540. .flags = IORESOURCE_IRQ,
  541. },
  542. };
  543. static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
  544. static struct platform_device pxa27x_device_camera = {
  545. .name = "pxa27x-camera",
  546. .id = 0, /* This is used to put cameras on this interface */
  547. .dev = {
  548. .dma_mask = &pxa27x_dma_mask_camera,
  549. .coherent_dma_mask = 0xffffffff,
  550. },
  551. .num_resources = ARRAY_SIZE(pxa27x_resource_camera),
  552. .resource = pxa27x_resource_camera,
  553. };
  554. void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
  555. {
  556. pxa_register_device(&pxa27x_device_camera, info);
  557. }
  558. static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
  559. static struct resource pxa27x_resource_ohci[] = {
  560. [0] = {
  561. .start = 0x4C000000,
  562. .end = 0x4C00ff6f,
  563. .flags = IORESOURCE_MEM,
  564. },
  565. [1] = {
  566. .start = IRQ_USBH1,
  567. .end = IRQ_USBH1,
  568. .flags = IORESOURCE_IRQ,
  569. },
  570. };
  571. struct platform_device pxa27x_device_ohci = {
  572. .name = "pxa27x-ohci",
  573. .id = -1,
  574. .dev = {
  575. .dma_mask = &pxa27x_ohci_dma_mask,
  576. .coherent_dma_mask = DMA_BIT_MASK(32),
  577. },
  578. .num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
  579. .resource = pxa27x_resource_ohci,
  580. };
  581. void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
  582. {
  583. pxa_register_device(&pxa27x_device_ohci, info);
  584. }
  585. #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
  586. #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
  587. static struct resource pxa27x_resource_keypad[] = {
  588. [0] = {
  589. .start = 0x41500000,
  590. .end = 0x4150004c,
  591. .flags = IORESOURCE_MEM,
  592. },
  593. [1] = {
  594. .start = IRQ_KEYPAD,
  595. .end = IRQ_KEYPAD,
  596. .flags = IORESOURCE_IRQ,
  597. },
  598. };
  599. struct platform_device pxa27x_device_keypad = {
  600. .name = "pxa27x-keypad",
  601. .id = -1,
  602. .resource = pxa27x_resource_keypad,
  603. .num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
  604. };
  605. void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
  606. {
  607. pxa_register_device(&pxa27x_device_keypad, info);
  608. }
  609. static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
  610. static struct resource pxa27x_resource_ssp1[] = {
  611. [0] = {
  612. .start = 0x41000000,
  613. .end = 0x4100003f,
  614. .flags = IORESOURCE_MEM,
  615. },
  616. [1] = {
  617. .start = IRQ_SSP,
  618. .end = IRQ_SSP,
  619. .flags = IORESOURCE_IRQ,
  620. },
  621. };
  622. struct platform_device pxa27x_device_ssp1 = {
  623. .name = "pxa27x-ssp",
  624. .id = 0,
  625. .dev = {
  626. .dma_mask = &pxa27x_ssp1_dma_mask,
  627. .coherent_dma_mask = DMA_BIT_MASK(32),
  628. },
  629. .resource = pxa27x_resource_ssp1,
  630. .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
  631. };
  632. static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
  633. static struct resource pxa27x_resource_ssp2[] = {
  634. [0] = {
  635. .start = 0x41700000,
  636. .end = 0x4170003f,
  637. .flags = IORESOURCE_MEM,
  638. },
  639. [1] = {
  640. .start = IRQ_SSP2,
  641. .end = IRQ_SSP2,
  642. .flags = IORESOURCE_IRQ,
  643. },
  644. };
  645. struct platform_device pxa27x_device_ssp2 = {
  646. .name = "pxa27x-ssp",
  647. .id = 1,
  648. .dev = {
  649. .dma_mask = &pxa27x_ssp2_dma_mask,
  650. .coherent_dma_mask = DMA_BIT_MASK(32),
  651. },
  652. .resource = pxa27x_resource_ssp2,
  653. .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
  654. };
  655. static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
  656. static struct resource pxa27x_resource_ssp3[] = {
  657. [0] = {
  658. .start = 0x41900000,
  659. .end = 0x4190003f,
  660. .flags = IORESOURCE_MEM,
  661. },
  662. [1] = {
  663. .start = IRQ_SSP3,
  664. .end = IRQ_SSP3,
  665. .flags = IORESOURCE_IRQ,
  666. },
  667. };
  668. struct platform_device pxa27x_device_ssp3 = {
  669. .name = "pxa27x-ssp",
  670. .id = 2,
  671. .dev = {
  672. .dma_mask = &pxa27x_ssp3_dma_mask,
  673. .coherent_dma_mask = DMA_BIT_MASK(32),
  674. },
  675. .resource = pxa27x_resource_ssp3,
  676. .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
  677. };
  678. static struct resource pxa27x_resource_pwm0[] = {
  679. [0] = {
  680. .start = 0x40b00000,
  681. .end = 0x40b0001f,
  682. .flags = IORESOURCE_MEM,
  683. },
  684. };
  685. struct platform_device pxa27x_device_pwm0 = {
  686. .name = "pxa27x-pwm",
  687. .id = 0,
  688. .resource = pxa27x_resource_pwm0,
  689. .num_resources = ARRAY_SIZE(pxa27x_resource_pwm0),
  690. };
  691. static struct resource pxa27x_resource_pwm1[] = {
  692. [0] = {
  693. .start = 0x40c00000,
  694. .end = 0x40c0001f,
  695. .flags = IORESOURCE_MEM,
  696. },
  697. };
  698. struct platform_device pxa27x_device_pwm1 = {
  699. .name = "pxa27x-pwm",
  700. .id = 1,
  701. .resource = pxa27x_resource_pwm1,
  702. .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
  703. };
  704. #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
  705. #ifdef CONFIG_PXA3xx
  706. static struct resource pxa3xx_resources_mci2[] = {
  707. [0] = {
  708. .start = 0x42000000,
  709. .end = 0x42000fff,
  710. .flags = IORESOURCE_MEM,
  711. },
  712. [1] = {
  713. .start = IRQ_MMC2,
  714. .end = IRQ_MMC2,
  715. .flags = IORESOURCE_IRQ,
  716. },
  717. };
  718. struct platform_device pxa3xx_device_mci2 = {
  719. .name = "pxa2xx-mci",
  720. .id = 1,
  721. .dev = {
  722. .dma_mask = &pxamci_dmamask,
  723. .coherent_dma_mask = 0xffffffff,
  724. },
  725. .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
  726. .resource = pxa3xx_resources_mci2,
  727. };
  728. void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
  729. {
  730. pxa_register_device(&pxa3xx_device_mci2, info);
  731. }
  732. static struct resource pxa3xx_resources_mci3[] = {
  733. [0] = {
  734. .start = 0x42500000,
  735. .end = 0x42500fff,
  736. .flags = IORESOURCE_MEM,
  737. },
  738. [1] = {
  739. .start = IRQ_MMC3,
  740. .end = IRQ_MMC3,
  741. .flags = IORESOURCE_IRQ,
  742. },
  743. };
  744. struct platform_device pxa3xx_device_mci3 = {
  745. .name = "pxa2xx-mci",
  746. .id = 2,
  747. .dev = {
  748. .dma_mask = &pxamci_dmamask,
  749. .coherent_dma_mask = 0xffffffff,
  750. },
  751. .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3),
  752. .resource = pxa3xx_resources_mci3,
  753. };
  754. void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
  755. {
  756. pxa_register_device(&pxa3xx_device_mci3, info);
  757. }
  758. static struct resource pxa3xx_resources_gcu[] = {
  759. {
  760. .start = 0x54000000,
  761. .end = 0x54000fff,
  762. .flags = IORESOURCE_MEM,
  763. },
  764. {
  765. .start = IRQ_GCU,
  766. .end = IRQ_GCU,
  767. .flags = IORESOURCE_IRQ,
  768. },
  769. };
  770. static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
  771. struct platform_device pxa3xx_device_gcu = {
  772. .name = "pxa3xx-gcu",
  773. .id = -1,
  774. .num_resources = ARRAY_SIZE(pxa3xx_resources_gcu),
  775. .resource = pxa3xx_resources_gcu,
  776. .dev = {
  777. .dma_mask = &pxa3xx_gcu_dmamask,
  778. .coherent_dma_mask = 0xffffffff,
  779. },
  780. };
  781. #endif /* CONFIG_PXA3xx */
  782. #if defined(CONFIG_PXA3xx)
  783. static struct resource pxa3xx_resources_i2c_power[] = {
  784. {
  785. .start = 0x40f500c0,
  786. .end = 0x40f500d3,
  787. .flags = IORESOURCE_MEM,
  788. }, {
  789. .start = IRQ_PWRI2C,
  790. .end = IRQ_PWRI2C,
  791. .flags = IORESOURCE_IRQ,
  792. },
  793. };
  794. struct platform_device pxa3xx_device_i2c_power = {
  795. .name = "pxa3xx-pwri2c",
  796. .id = 1,
  797. .resource = pxa3xx_resources_i2c_power,
  798. .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power),
  799. };
  800. static struct resource pxa3xx_resources_nand[] = {
  801. [0] = {
  802. .start = 0x43100000,
  803. .end = 0x43100053,
  804. .flags = IORESOURCE_MEM,
  805. },
  806. [1] = {
  807. .start = IRQ_NAND,
  808. .end = IRQ_NAND,
  809. .flags = IORESOURCE_IRQ,
  810. },
  811. };
  812. static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
  813. struct platform_device pxa3xx_device_nand = {
  814. .name = "pxa3xx-nand",
  815. .id = -1,
  816. .dev = {
  817. .dma_mask = &pxa3xx_nand_dma_mask,
  818. .coherent_dma_mask = DMA_BIT_MASK(32),
  819. },
  820. .num_resources = ARRAY_SIZE(pxa3xx_resources_nand),
  821. .resource = pxa3xx_resources_nand,
  822. };
  823. void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
  824. {
  825. pxa_register_device(&pxa3xx_device_nand, info);
  826. }
  827. static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
  828. static struct resource pxa3xx_resource_ssp4[] = {
  829. [0] = {
  830. .start = 0x41a00000,
  831. .end = 0x41a0003f,
  832. .flags = IORESOURCE_MEM,
  833. },
  834. [1] = {
  835. .start = IRQ_SSP4,
  836. .end = IRQ_SSP4,
  837. .flags = IORESOURCE_IRQ,
  838. },
  839. };
  840. /*
  841. * PXA3xx SSP is basically equivalent to PXA27x.
  842. * However, we need to register the device by the correct name in order to
  843. * make the driver set the correct internal type, hence we provide specific
  844. * platform_devices for each of them.
  845. */
  846. struct platform_device pxa3xx_device_ssp1 = {
  847. .name = "pxa3xx-ssp",
  848. .id = 0,
  849. .dev = {
  850. .dma_mask = &pxa27x_ssp1_dma_mask,
  851. .coherent_dma_mask = DMA_BIT_MASK(32),
  852. },
  853. .resource = pxa27x_resource_ssp1,
  854. .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
  855. };
  856. struct platform_device pxa3xx_device_ssp2 = {
  857. .name = "pxa3xx-ssp",
  858. .id = 1,
  859. .dev = {
  860. .dma_mask = &pxa27x_ssp2_dma_mask,
  861. .coherent_dma_mask = DMA_BIT_MASK(32),
  862. },
  863. .resource = pxa27x_resource_ssp2,
  864. .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
  865. };
  866. struct platform_device pxa3xx_device_ssp3 = {
  867. .name = "pxa3xx-ssp",
  868. .id = 2,
  869. .dev = {
  870. .dma_mask = &pxa27x_ssp3_dma_mask,
  871. .coherent_dma_mask = DMA_BIT_MASK(32),
  872. },
  873. .resource = pxa27x_resource_ssp3,
  874. .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
  875. };
  876. struct platform_device pxa3xx_device_ssp4 = {
  877. .name = "pxa3xx-ssp",
  878. .id = 3,
  879. .dev = {
  880. .dma_mask = &pxa3xx_ssp4_dma_mask,
  881. .coherent_dma_mask = DMA_BIT_MASK(32),
  882. },
  883. .resource = pxa3xx_resource_ssp4,
  884. .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
  885. };
  886. #endif /* CONFIG_PXA3xx */
  887. struct resource pxa_resource_gpio[] = {
  888. {
  889. .start = 0x40e00000,
  890. .end = 0x40e0ffff,
  891. .flags = IORESOURCE_MEM,
  892. }, {
  893. .start = IRQ_GPIO0,
  894. .end = IRQ_GPIO0,
  895. .name = "gpio0",
  896. .flags = IORESOURCE_IRQ,
  897. }, {
  898. .start = IRQ_GPIO1,
  899. .end = IRQ_GPIO1,
  900. .name = "gpio1",
  901. .flags = IORESOURCE_IRQ,
  902. }, {
  903. .start = IRQ_GPIO_2_x,
  904. .end = IRQ_GPIO_2_x,
  905. .name = "gpio_mux",
  906. .flags = IORESOURCE_IRQ,
  907. },
  908. };
  909. struct platform_device pxa25x_device_gpio = {
  910. #ifdef CONFIG_CPU_PXA26x
  911. .name = "pxa26x-gpio",
  912. #else
  913. .name = "pxa25x-gpio",
  914. #endif
  915. .id = -1,
  916. .num_resources = ARRAY_SIZE(pxa_resource_gpio),
  917. .resource = pxa_resource_gpio,
  918. };
  919. struct platform_device pxa27x_device_gpio = {
  920. .name = "pxa27x-gpio",
  921. .id = -1,
  922. .num_resources = ARRAY_SIZE(pxa_resource_gpio),
  923. .resource = pxa_resource_gpio,
  924. };
  925. struct platform_device pxa3xx_device_gpio = {
  926. .name = "pxa3xx-gpio",
  927. .id = -1,
  928. .num_resources = ARRAY_SIZE(pxa_resource_gpio),
  929. .resource = pxa_resource_gpio,
  930. };
  931. struct platform_device pxa93x_device_gpio = {
  932. .name = "pxa93x-gpio",
  933. .id = -1,
  934. .num_resources = ARRAY_SIZE(pxa_resource_gpio),
  935. .resource = pxa_resource_gpio,
  936. };
  937. /* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
  938. * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
  939. void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
  940. {
  941. struct platform_device *pd;
  942. pd = platform_device_alloc("pxa2xx-spi", id);
  943. if (pd == NULL) {
  944. printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
  945. id);
  946. return;
  947. }
  948. pd->dev.platform_data = info;
  949. platform_device_add(pd);
  950. }
  951. static struct resource pxa_dma_resource[] = {
  952. [0] = {
  953. .start = 0x40000000,
  954. .end = 0x4000ffff,
  955. .flags = IORESOURCE_MEM,
  956. },
  957. [1] = {
  958. .start = IRQ_DMA,
  959. .end = IRQ_DMA,
  960. .flags = IORESOURCE_IRQ,
  961. },
  962. };
  963. static u64 pxadma_dmamask = 0xffffffffUL;
  964. static struct platform_device pxa2xx_pxa_dma = {
  965. .name = "pxa-dma",
  966. .id = 0,
  967. .dev = {
  968. .dma_mask = &pxadma_dmamask,
  969. .coherent_dma_mask = 0xffffffff,
  970. },
  971. .num_resources = ARRAY_SIZE(pxa_dma_resource),
  972. .resource = pxa_dma_resource,
  973. };
  974. void __init pxa2xx_set_dmac_info(struct mmp_dma_platdata *dma_pdata)
  975. {
  976. pxa_register_device(&pxa2xx_pxa_dma, dma_pdata);
  977. }