nxdb500.c 4.6 KB

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  1. /*
  2. * arch/arm/mach-netx/nxdb500.c
  3. *
  4. * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2
  8. * as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. #include <linux/dma-mapping.h>
  20. #include <linux/init.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/mtd/plat-ram.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/amba/bus.h>
  25. #include <linux/amba/clcd.h>
  26. #include <mach/hardware.h>
  27. #include <asm/mach-types.h>
  28. #include <asm/mach/arch.h>
  29. #include <mach/netx-regs.h>
  30. #include <linux/platform_data/eth-netx.h>
  31. #include "generic.h"
  32. #include "fb.h"
  33. static struct clcd_panel qvga = {
  34. .mode = {
  35. .name = "QVGA",
  36. .refresh = 60,
  37. .xres = 240,
  38. .yres = 320,
  39. .pixclock = 187617,
  40. .left_margin = 6,
  41. .right_margin = 26,
  42. .upper_margin = 0,
  43. .lower_margin = 6,
  44. .hsync_len = 6,
  45. .vsync_len = 1,
  46. .sync = 0,
  47. .vmode = FB_VMODE_NONINTERLACED,
  48. },
  49. .width = -1,
  50. .height = -1,
  51. .tim2 = 16,
  52. .cntl = CNTL_LCDTFT | CNTL_BGR,
  53. .bpp = 16,
  54. .grayscale = 0,
  55. };
  56. static inline int nxdb500_check(struct clcd_fb *fb, struct fb_var_screeninfo *var)
  57. {
  58. var->green.length = 5;
  59. var->green.msb_right = 0;
  60. return clcdfb_check(fb, var);
  61. }
  62. static int nxdb500_clcd_setup(struct clcd_fb *fb)
  63. {
  64. unsigned int val;
  65. fb->fb.var.green.length = 5;
  66. fb->fb.var.green.msb_right = 0;
  67. /* enable asic control */
  68. val = readl(NETX_SYSTEM_IOC_ACCESS_KEY);
  69. writel(val, NETX_SYSTEM_IOC_ACCESS_KEY);
  70. writel(3, NETX_SYSTEM_IOC_CR);
  71. val = readl(NETX_PIO_OUTPIO);
  72. writel(val | 1, NETX_PIO_OUTPIO);
  73. val = readl(NETX_PIO_OEPIO);
  74. writel(val | 1, NETX_PIO_OEPIO);
  75. return netx_clcd_setup(fb);
  76. }
  77. static struct clcd_board clcd_data = {
  78. .name = "netX",
  79. .check = nxdb500_check,
  80. .decode = clcdfb_decode,
  81. .enable = netx_clcd_enable,
  82. .setup = nxdb500_clcd_setup,
  83. .mmap = netx_clcd_mmap,
  84. .remove = netx_clcd_remove,
  85. };
  86. static struct netxeth_platform_data eth0_platform_data = {
  87. .xcno = 0,
  88. };
  89. static struct platform_device netx_eth0_device = {
  90. .name = "netx-eth",
  91. .id = 0,
  92. .num_resources = 0,
  93. .resource = NULL,
  94. .dev = {
  95. .platform_data = &eth0_platform_data,
  96. }
  97. };
  98. static struct netxeth_platform_data eth1_platform_data = {
  99. .xcno = 1,
  100. };
  101. static struct platform_device netx_eth1_device = {
  102. .name = "netx-eth",
  103. .id = 1,
  104. .num_resources = 0,
  105. .resource = NULL,
  106. .dev = {
  107. .platform_data = &eth1_platform_data,
  108. }
  109. };
  110. static struct resource netx_uart0_resources[] = {
  111. [0] = {
  112. .start = 0x00100A00,
  113. .end = 0x00100A3F,
  114. .flags = IORESOURCE_MEM,
  115. },
  116. [1] = {
  117. .start = (NETX_IRQ_UART0),
  118. .end = (NETX_IRQ_UART0),
  119. .flags = IORESOURCE_IRQ,
  120. },
  121. };
  122. static struct platform_device netx_uart0_device = {
  123. .name = "netx-uart",
  124. .id = 0,
  125. .num_resources = ARRAY_SIZE(netx_uart0_resources),
  126. .resource = netx_uart0_resources,
  127. };
  128. static struct resource netx_uart1_resources[] = {
  129. [0] = {
  130. .start = 0x00100A40,
  131. .end = 0x00100A7F,
  132. .flags = IORESOURCE_MEM,
  133. },
  134. [1] = {
  135. .start = (NETX_IRQ_UART1),
  136. .end = (NETX_IRQ_UART1),
  137. .flags = IORESOURCE_IRQ,
  138. },
  139. };
  140. static struct platform_device netx_uart1_device = {
  141. .name = "netx-uart",
  142. .id = 1,
  143. .num_resources = ARRAY_SIZE(netx_uart1_resources),
  144. .resource = netx_uart1_resources,
  145. };
  146. static struct resource netx_uart2_resources[] = {
  147. [0] = {
  148. .start = 0x00100A80,
  149. .end = 0x00100ABF,
  150. .flags = IORESOURCE_MEM,
  151. },
  152. [1] = {
  153. .start = (NETX_IRQ_UART2),
  154. .end = (NETX_IRQ_UART2),
  155. .flags = IORESOURCE_IRQ,
  156. },
  157. };
  158. static struct platform_device netx_uart2_device = {
  159. .name = "netx-uart",
  160. .id = 2,
  161. .num_resources = ARRAY_SIZE(netx_uart2_resources),
  162. .resource = netx_uart2_resources,
  163. };
  164. static struct platform_device *devices[] __initdata = {
  165. &netx_eth0_device,
  166. &netx_eth1_device,
  167. &netx_uart0_device,
  168. &netx_uart1_device,
  169. &netx_uart2_device,
  170. };
  171. static void __init nxdb500_init(void)
  172. {
  173. netx_fb_init(&clcd_data, &qvga);
  174. platform_add_devices(devices, ARRAY_SIZE(devices));
  175. }
  176. MACHINE_START(NXDB500, "Hilscher nxdb500")
  177. .atag_offset = 0x100,
  178. .map_io = netx_map_io,
  179. .init_irq = netx_init_irq,
  180. .init_time = netx_timer_init,
  181. .init_machine = nxdb500_init,
  182. .restart = netx_restart,
  183. MACHINE_END