swp_emulate.c 6.8 KB

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  1. /*
  2. * linux/arch/arm/kernel/swp_emulate.c
  3. *
  4. * Copyright (C) 2009 ARM Limited
  5. * __user_* functions adapted from include/asm/uaccess.h
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * Implements emulation of the SWP/SWPB instructions using load-exclusive and
  12. * store-exclusive for processors that have them disabled (or future ones that
  13. * might not implement them).
  14. *
  15. * Syntax of SWP{B} instruction: SWP{B}<c> <Rt>, <Rt2>, [<Rn>]
  16. * Where: Rt = destination
  17. * Rt2 = source
  18. * Rn = address
  19. */
  20. #include <linux/init.h>
  21. #include <linux/kernel.h>
  22. #include <linux/proc_fs.h>
  23. #include <linux/seq_file.h>
  24. #include <linux/sched.h>
  25. #include <linux/sched/mm.h>
  26. #include <linux/syscalls.h>
  27. #include <linux/perf_event.h>
  28. #include <asm/opcodes.h>
  29. #include <asm/system_info.h>
  30. #include <asm/traps.h>
  31. #include <linux/uaccess.h>
  32. /*
  33. * Error-checking SWP macros implemented using ldrex{b}/strex{b}
  34. */
  35. #define __user_swpX_asm(data, addr, res, temp, B) \
  36. __asm__ __volatile__( \
  37. "0: ldrex"B" %2, [%3]\n" \
  38. "1: strex"B" %0, %1, [%3]\n" \
  39. " cmp %0, #0\n" \
  40. " moveq %1, %2\n" \
  41. " movne %0, %4\n" \
  42. "2:\n" \
  43. " .section .text.fixup,\"ax\"\n" \
  44. " .align 2\n" \
  45. "3: mov %0, %5\n" \
  46. " b 2b\n" \
  47. " .previous\n" \
  48. " .section __ex_table,\"a\"\n" \
  49. " .align 3\n" \
  50. " .long 0b, 3b\n" \
  51. " .long 1b, 3b\n" \
  52. " .previous" \
  53. : "=&r" (res), "+r" (data), "=&r" (temp) \
  54. : "r" (addr), "i" (-EAGAIN), "i" (-EFAULT) \
  55. : "cc", "memory")
  56. #define __user_swp_asm(data, addr, res, temp) \
  57. __user_swpX_asm(data, addr, res, temp, "")
  58. #define __user_swpb_asm(data, addr, res, temp) \
  59. __user_swpX_asm(data, addr, res, temp, "b")
  60. /*
  61. * Macros/defines for extracting register numbers from instruction.
  62. */
  63. #define EXTRACT_REG_NUM(instruction, offset) \
  64. (((instruction) & (0xf << (offset))) >> (offset))
  65. #define RN_OFFSET 16
  66. #define RT_OFFSET 12
  67. #define RT2_OFFSET 0
  68. /*
  69. * Bit 22 of the instruction encoding distinguishes between
  70. * the SWP and SWPB variants (bit set means SWPB).
  71. */
  72. #define TYPE_SWPB (1 << 22)
  73. static unsigned long swpcounter;
  74. static unsigned long swpbcounter;
  75. static unsigned long abtcounter;
  76. static pid_t previous_pid;
  77. #ifdef CONFIG_PROC_FS
  78. static int proc_status_show(struct seq_file *m, void *v)
  79. {
  80. seq_printf(m, "Emulated SWP:\t\t%lu\n", swpcounter);
  81. seq_printf(m, "Emulated SWPB:\t\t%lu\n", swpbcounter);
  82. seq_printf(m, "Aborted SWP{B}:\t\t%lu\n", abtcounter);
  83. if (previous_pid != 0)
  84. seq_printf(m, "Last process:\t\t%d\n", previous_pid);
  85. return 0;
  86. }
  87. #endif
  88. /*
  89. * Set up process info to signal segmentation fault - called on access error.
  90. */
  91. static void set_segfault(struct pt_regs *regs, unsigned long addr)
  92. {
  93. siginfo_t info;
  94. clear_siginfo(&info);
  95. down_read(&current->mm->mmap_sem);
  96. if (find_vma(current->mm, addr) == NULL)
  97. info.si_code = SEGV_MAPERR;
  98. else
  99. info.si_code = SEGV_ACCERR;
  100. up_read(&current->mm->mmap_sem);
  101. info.si_signo = SIGSEGV;
  102. info.si_errno = 0;
  103. info.si_addr = (void *) instruction_pointer(regs);
  104. pr_debug("SWP{B} emulation: access caused memory abort!\n");
  105. arm_notify_die("Illegal memory access", regs, &info, 0, 0);
  106. abtcounter++;
  107. }
  108. static int emulate_swpX(unsigned int address, unsigned int *data,
  109. unsigned int type)
  110. {
  111. unsigned int res = 0;
  112. if ((type != TYPE_SWPB) && (address & 0x3)) {
  113. /* SWP to unaligned address not permitted */
  114. pr_debug("SWP instruction on unaligned pointer!\n");
  115. return -EFAULT;
  116. }
  117. while (1) {
  118. unsigned long temp;
  119. unsigned int __ua_flags;
  120. __ua_flags = uaccess_save_and_enable();
  121. if (type == TYPE_SWPB)
  122. __user_swpb_asm(*data, address, res, temp);
  123. else
  124. __user_swp_asm(*data, address, res, temp);
  125. uaccess_restore(__ua_flags);
  126. if (likely(res != -EAGAIN) || signal_pending(current))
  127. break;
  128. cond_resched();
  129. }
  130. if (res == 0) {
  131. if (type == TYPE_SWPB)
  132. swpbcounter++;
  133. else
  134. swpcounter++;
  135. }
  136. return res;
  137. }
  138. /*
  139. * swp_handler logs the id of calling process, dissects the instruction, sanity
  140. * checks the memory location, calls emulate_swpX for the actual operation and
  141. * deals with fixup/error handling before returning
  142. */
  143. static int swp_handler(struct pt_regs *regs, unsigned int instr)
  144. {
  145. unsigned int address, destreg, data, type;
  146. unsigned int res = 0;
  147. perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->ARM_pc);
  148. res = arm_check_condition(instr, regs->ARM_cpsr);
  149. switch (res) {
  150. case ARM_OPCODE_CONDTEST_PASS:
  151. break;
  152. case ARM_OPCODE_CONDTEST_FAIL:
  153. /* Condition failed - return to next instruction */
  154. regs->ARM_pc += 4;
  155. return 0;
  156. case ARM_OPCODE_CONDTEST_UNCOND:
  157. /* If unconditional encoding - not a SWP, undef */
  158. return -EFAULT;
  159. default:
  160. return -EINVAL;
  161. }
  162. if (current->pid != previous_pid) {
  163. pr_debug("\"%s\" (%ld) uses deprecated SWP{B} instruction\n",
  164. current->comm, (unsigned long)current->pid);
  165. previous_pid = current->pid;
  166. }
  167. address = regs->uregs[EXTRACT_REG_NUM(instr, RN_OFFSET)];
  168. data = regs->uregs[EXTRACT_REG_NUM(instr, RT2_OFFSET)];
  169. destreg = EXTRACT_REG_NUM(instr, RT_OFFSET);
  170. type = instr & TYPE_SWPB;
  171. pr_debug("addr in r%d->0x%08x, dest is r%d, source in r%d->0x%08x)\n",
  172. EXTRACT_REG_NUM(instr, RN_OFFSET), address,
  173. destreg, EXTRACT_REG_NUM(instr, RT2_OFFSET), data);
  174. /* Check access in reasonable access range for both SWP and SWPB */
  175. if (!access_ok(VERIFY_WRITE, (address & ~3), 4)) {
  176. pr_debug("SWP{B} emulation: access to %p not allowed!\n",
  177. (void *)address);
  178. res = -EFAULT;
  179. } else {
  180. res = emulate_swpX(address, &data, type);
  181. }
  182. if (res == 0) {
  183. /*
  184. * On successful emulation, revert the adjustment to the PC
  185. * made in kernel/traps.c in order to resume execution at the
  186. * instruction following the SWP{B}.
  187. */
  188. regs->ARM_pc += 4;
  189. regs->uregs[destreg] = data;
  190. } else if (res == -EFAULT) {
  191. /*
  192. * Memory errors do not mean emulation failed.
  193. * Set up signal info to return SEGV, then return OK
  194. */
  195. set_segfault(regs, address);
  196. }
  197. return 0;
  198. }
  199. /*
  200. * Only emulate SWP/SWPB executed in ARM state/User mode.
  201. * The kernel must be SWP free and SWP{B} does not exist in Thumb/ThumbEE.
  202. */
  203. static struct undef_hook swp_hook = {
  204. .instr_mask = 0x0fb00ff0,
  205. .instr_val = 0x01000090,
  206. .cpsr_mask = MODE_MASK | PSR_T_BIT | PSR_J_BIT,
  207. .cpsr_val = USR_MODE,
  208. .fn = swp_handler
  209. };
  210. /*
  211. * Register handler and create status file in /proc/cpu
  212. * Invoked as late_initcall, since not needed before init spawned.
  213. */
  214. static int __init swp_emulation_init(void)
  215. {
  216. if (cpu_architecture() < CPU_ARCH_ARMv7)
  217. return 0;
  218. #ifdef CONFIG_PROC_FS
  219. if (!proc_create_single("cpu/swp_emulation", S_IRUGO, NULL,
  220. proc_status_show))
  221. return -ENOMEM;
  222. #endif /* CONFIG_PROC_FS */
  223. pr_notice("Registering SWP/SWPB emulation handler\n");
  224. register_undef_hook(&swp_hook);
  225. return 0;
  226. }
  227. late_initcall(swp_emulation_init);