smp.c 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817
  1. /*
  2. * linux/arch/arm/kernel/smp.c
  3. *
  4. * Copyright (C) 2002 ARM Limited, All Rights Reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/delay.h>
  12. #include <linux/init.h>
  13. #include <linux/spinlock.h>
  14. #include <linux/sched/mm.h>
  15. #include <linux/sched/hotplug.h>
  16. #include <linux/sched/task_stack.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/cache.h>
  19. #include <linux/profile.h>
  20. #include <linux/errno.h>
  21. #include <linux/mm.h>
  22. #include <linux/err.h>
  23. #include <linux/cpu.h>
  24. #include <linux/seq_file.h>
  25. #include <linux/irq.h>
  26. #include <linux/nmi.h>
  27. #include <linux/percpu.h>
  28. #include <linux/clockchips.h>
  29. #include <linux/completion.h>
  30. #include <linux/cpufreq.h>
  31. #include <linux/irq_work.h>
  32. #include <linux/atomic.h>
  33. #include <asm/bugs.h>
  34. #include <asm/smp.h>
  35. #include <asm/cacheflush.h>
  36. #include <asm/cpu.h>
  37. #include <asm/cputype.h>
  38. #include <asm/exception.h>
  39. #include <asm/idmap.h>
  40. #include <asm/topology.h>
  41. #include <asm/mmu_context.h>
  42. #include <asm/pgtable.h>
  43. #include <asm/pgalloc.h>
  44. #include <asm/procinfo.h>
  45. #include <asm/processor.h>
  46. #include <asm/sections.h>
  47. #include <asm/tlbflush.h>
  48. #include <asm/ptrace.h>
  49. #include <asm/smp_plat.h>
  50. #include <asm/virt.h>
  51. #include <asm/mach/arch.h>
  52. #include <asm/mpu.h>
  53. #define CREATE_TRACE_POINTS
  54. #include <trace/events/ipi.h>
  55. /*
  56. * as from 2.5, kernels no longer have an init_tasks structure
  57. * so we need some other way of telling a new secondary core
  58. * where to place its SVC stack
  59. */
  60. struct secondary_data secondary_data;
  61. /*
  62. * control for which core is the next to come out of the secondary
  63. * boot "holding pen"
  64. */
  65. volatile int pen_release = -1;
  66. enum ipi_msg_type {
  67. IPI_WAKEUP,
  68. IPI_TIMER,
  69. IPI_RESCHEDULE,
  70. IPI_CALL_FUNC,
  71. IPI_CPU_STOP,
  72. IPI_IRQ_WORK,
  73. IPI_COMPLETION,
  74. /*
  75. * CPU_BACKTRACE is special and not included in NR_IPI
  76. * or tracable with trace_ipi_*
  77. */
  78. IPI_CPU_BACKTRACE,
  79. /*
  80. * SGI8-15 can be reserved by secure firmware, and thus may
  81. * not be usable by the kernel. Please keep the above limited
  82. * to at most 8 entries.
  83. */
  84. };
  85. static DECLARE_COMPLETION(cpu_running);
  86. static struct smp_operations smp_ops __ro_after_init;
  87. void __init smp_set_ops(const struct smp_operations *ops)
  88. {
  89. if (ops)
  90. smp_ops = *ops;
  91. };
  92. static unsigned long get_arch_pgd(pgd_t *pgd)
  93. {
  94. #ifdef CONFIG_ARM_LPAE
  95. return __phys_to_pfn(virt_to_phys(pgd));
  96. #else
  97. return virt_to_phys(pgd);
  98. #endif
  99. }
  100. #if defined(CONFIG_BIG_LITTLE) && defined(CONFIG_HARDEN_BRANCH_PREDICTOR)
  101. static int secondary_biglittle_prepare(unsigned int cpu)
  102. {
  103. if (!cpu_vtable[cpu])
  104. cpu_vtable[cpu] = kzalloc(sizeof(*cpu_vtable[cpu]), GFP_KERNEL);
  105. return cpu_vtable[cpu] ? 0 : -ENOMEM;
  106. }
  107. static void secondary_biglittle_init(void)
  108. {
  109. init_proc_vtable(lookup_processor(read_cpuid_id())->proc);
  110. }
  111. #else
  112. static int secondary_biglittle_prepare(unsigned int cpu)
  113. {
  114. return 0;
  115. }
  116. static void secondary_biglittle_init(void)
  117. {
  118. }
  119. #endif
  120. int __cpu_up(unsigned int cpu, struct task_struct *idle)
  121. {
  122. int ret;
  123. if (!smp_ops.smp_boot_secondary)
  124. return -ENOSYS;
  125. ret = secondary_biglittle_prepare(cpu);
  126. if (ret)
  127. return ret;
  128. /*
  129. * We need to tell the secondary core where to find
  130. * its stack and the page tables.
  131. */
  132. secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
  133. #ifdef CONFIG_ARM_MPU
  134. secondary_data.mpu_rgn_info = &mpu_rgn_info;
  135. #endif
  136. #ifdef CONFIG_MMU
  137. secondary_data.pgdir = virt_to_phys(idmap_pgd);
  138. secondary_data.swapper_pg_dir = get_arch_pgd(swapper_pg_dir);
  139. #endif
  140. sync_cache_w(&secondary_data);
  141. /*
  142. * Now bring the CPU into our world.
  143. */
  144. ret = smp_ops.smp_boot_secondary(cpu, idle);
  145. if (ret == 0) {
  146. /*
  147. * CPU was successfully started, wait for it
  148. * to come online or time out.
  149. */
  150. wait_for_completion_timeout(&cpu_running,
  151. msecs_to_jiffies(1000));
  152. if (!cpu_online(cpu)) {
  153. pr_crit("CPU%u: failed to come online\n", cpu);
  154. ret = -EIO;
  155. }
  156. } else {
  157. pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
  158. }
  159. memset(&secondary_data, 0, sizeof(secondary_data));
  160. return ret;
  161. }
  162. /* platform specific SMP operations */
  163. void __init smp_init_cpus(void)
  164. {
  165. if (smp_ops.smp_init_cpus)
  166. smp_ops.smp_init_cpus();
  167. }
  168. int platform_can_secondary_boot(void)
  169. {
  170. return !!smp_ops.smp_boot_secondary;
  171. }
  172. int platform_can_cpu_hotplug(void)
  173. {
  174. #ifdef CONFIG_HOTPLUG_CPU
  175. if (smp_ops.cpu_kill)
  176. return 1;
  177. #endif
  178. return 0;
  179. }
  180. #ifdef CONFIG_HOTPLUG_CPU
  181. static int platform_cpu_kill(unsigned int cpu)
  182. {
  183. if (smp_ops.cpu_kill)
  184. return smp_ops.cpu_kill(cpu);
  185. return 1;
  186. }
  187. static int platform_cpu_disable(unsigned int cpu)
  188. {
  189. if (smp_ops.cpu_disable)
  190. return smp_ops.cpu_disable(cpu);
  191. return 0;
  192. }
  193. int platform_can_hotplug_cpu(unsigned int cpu)
  194. {
  195. /* cpu_die must be specified to support hotplug */
  196. if (!smp_ops.cpu_die)
  197. return 0;
  198. if (smp_ops.cpu_can_disable)
  199. return smp_ops.cpu_can_disable(cpu);
  200. /*
  201. * By default, allow disabling all CPUs except the first one,
  202. * since this is special on a lot of platforms, e.g. because
  203. * of clock tick interrupts.
  204. */
  205. return cpu != 0;
  206. }
  207. /*
  208. * __cpu_disable runs on the processor to be shutdown.
  209. */
  210. int __cpu_disable(void)
  211. {
  212. unsigned int cpu = smp_processor_id();
  213. int ret;
  214. ret = platform_cpu_disable(cpu);
  215. if (ret)
  216. return ret;
  217. /*
  218. * Take this CPU offline. Once we clear this, we can't return,
  219. * and we must not schedule until we're ready to give up the cpu.
  220. */
  221. set_cpu_online(cpu, false);
  222. /*
  223. * OK - migrate IRQs away from this CPU
  224. */
  225. irq_migrate_all_off_this_cpu();
  226. /*
  227. * Flush user cache and TLB mappings, and then remove this CPU
  228. * from the vm mask set of all processes.
  229. *
  230. * Caches are flushed to the Level of Unification Inner Shareable
  231. * to write-back dirty lines to unified caches shared by all CPUs.
  232. */
  233. flush_cache_louis();
  234. local_flush_tlb_all();
  235. return 0;
  236. }
  237. static DECLARE_COMPLETION(cpu_died);
  238. /*
  239. * called on the thread which is asking for a CPU to be shutdown -
  240. * waits until shutdown has completed, or it is timed out.
  241. */
  242. void __cpu_die(unsigned int cpu)
  243. {
  244. if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
  245. pr_err("CPU%u: cpu didn't die\n", cpu);
  246. return;
  247. }
  248. pr_debug("CPU%u: shutdown\n", cpu);
  249. clear_tasks_mm_cpumask(cpu);
  250. /*
  251. * platform_cpu_kill() is generally expected to do the powering off
  252. * and/or cutting of clocks to the dying CPU. Optionally, this may
  253. * be done by the CPU which is dying in preference to supporting
  254. * this call, but that means there is _no_ synchronisation between
  255. * the requesting CPU and the dying CPU actually losing power.
  256. */
  257. if (!platform_cpu_kill(cpu))
  258. pr_err("CPU%u: unable to kill\n", cpu);
  259. }
  260. /*
  261. * Called from the idle thread for the CPU which has been shutdown.
  262. *
  263. * Note that we disable IRQs here, but do not re-enable them
  264. * before returning to the caller. This is also the behaviour
  265. * of the other hotplug-cpu capable cores, so presumably coming
  266. * out of idle fixes this.
  267. */
  268. void arch_cpu_idle_dead(void)
  269. {
  270. unsigned int cpu = smp_processor_id();
  271. idle_task_exit();
  272. local_irq_disable();
  273. /*
  274. * Flush the data out of the L1 cache for this CPU. This must be
  275. * before the completion to ensure that data is safely written out
  276. * before platform_cpu_kill() gets called - which may disable
  277. * *this* CPU and power down its cache.
  278. */
  279. flush_cache_louis();
  280. /*
  281. * Tell __cpu_die() that this CPU is now safe to dispose of. Once
  282. * this returns, power and/or clocks can be removed at any point
  283. * from this CPU and its cache by platform_cpu_kill().
  284. */
  285. complete(&cpu_died);
  286. /*
  287. * Ensure that the cache lines associated with that completion are
  288. * written out. This covers the case where _this_ CPU is doing the
  289. * powering down, to ensure that the completion is visible to the
  290. * CPU waiting for this one.
  291. */
  292. flush_cache_louis();
  293. /*
  294. * The actual CPU shutdown procedure is at least platform (if not
  295. * CPU) specific. This may remove power, or it may simply spin.
  296. *
  297. * Platforms are generally expected *NOT* to return from this call,
  298. * although there are some which do because they have no way to
  299. * power down the CPU. These platforms are the _only_ reason we
  300. * have a return path which uses the fragment of assembly below.
  301. *
  302. * The return path should not be used for platforms which can
  303. * power off the CPU.
  304. */
  305. if (smp_ops.cpu_die)
  306. smp_ops.cpu_die(cpu);
  307. pr_warn("CPU%u: smp_ops.cpu_die() returned, trying to resuscitate\n",
  308. cpu);
  309. /*
  310. * Do not return to the idle loop - jump back to the secondary
  311. * cpu initialisation. There's some initialisation which needs
  312. * to be repeated to undo the effects of taking the CPU offline.
  313. */
  314. __asm__("mov sp, %0\n"
  315. " mov fp, #0\n"
  316. " b secondary_start_kernel"
  317. :
  318. : "r" (task_stack_page(current) + THREAD_SIZE - 8));
  319. }
  320. #endif /* CONFIG_HOTPLUG_CPU */
  321. /*
  322. * Called by both boot and secondaries to move global data into
  323. * per-processor storage.
  324. */
  325. static void smp_store_cpu_info(unsigned int cpuid)
  326. {
  327. struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
  328. cpu_info->loops_per_jiffy = loops_per_jiffy;
  329. cpu_info->cpuid = read_cpuid_id();
  330. store_cpu_topology(cpuid);
  331. }
  332. /*
  333. * This is the secondary CPU boot entry. We're using this CPUs
  334. * idle thread stack, but a set of temporary page tables.
  335. */
  336. asmlinkage void secondary_start_kernel(void)
  337. {
  338. struct mm_struct *mm = &init_mm;
  339. unsigned int cpu;
  340. secondary_biglittle_init();
  341. /*
  342. * The identity mapping is uncached (strongly ordered), so
  343. * switch away from it before attempting any exclusive accesses.
  344. */
  345. cpu_switch_mm(mm->pgd, mm);
  346. local_flush_bp_all();
  347. enter_lazy_tlb(mm, current);
  348. local_flush_tlb_all();
  349. /*
  350. * All kernel threads share the same mm context; grab a
  351. * reference and switch to it.
  352. */
  353. cpu = smp_processor_id();
  354. mmgrab(mm);
  355. current->active_mm = mm;
  356. cpumask_set_cpu(cpu, mm_cpumask(mm));
  357. cpu_init();
  358. #ifndef CONFIG_MMU
  359. setup_vectors_base();
  360. #endif
  361. pr_debug("CPU%u: Booted secondary processor\n", cpu);
  362. preempt_disable();
  363. trace_hardirqs_off();
  364. /*
  365. * Give the platform a chance to do its own initialisation.
  366. */
  367. if (smp_ops.smp_secondary_init)
  368. smp_ops.smp_secondary_init(cpu);
  369. notify_cpu_starting(cpu);
  370. calibrate_delay();
  371. smp_store_cpu_info(cpu);
  372. /*
  373. * OK, now it's safe to let the boot CPU continue. Wait for
  374. * the CPU migration code to notice that the CPU is online
  375. * before we continue - which happens after __cpu_up returns.
  376. */
  377. set_cpu_online(cpu, true);
  378. check_other_bugs();
  379. complete(&cpu_running);
  380. local_irq_enable();
  381. local_fiq_enable();
  382. local_abt_enable();
  383. /*
  384. * OK, it's off to the idle thread for us
  385. */
  386. cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
  387. }
  388. void __init smp_cpus_done(unsigned int max_cpus)
  389. {
  390. int cpu;
  391. unsigned long bogosum = 0;
  392. for_each_online_cpu(cpu)
  393. bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy;
  394. printk(KERN_INFO "SMP: Total of %d processors activated "
  395. "(%lu.%02lu BogoMIPS).\n",
  396. num_online_cpus(),
  397. bogosum / (500000/HZ),
  398. (bogosum / (5000/HZ)) % 100);
  399. hyp_mode_check();
  400. }
  401. void __init smp_prepare_boot_cpu(void)
  402. {
  403. set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
  404. }
  405. void __init smp_prepare_cpus(unsigned int max_cpus)
  406. {
  407. unsigned int ncores = num_possible_cpus();
  408. init_cpu_topology();
  409. smp_store_cpu_info(smp_processor_id());
  410. /*
  411. * are we trying to boot more cores than exist?
  412. */
  413. if (max_cpus > ncores)
  414. max_cpus = ncores;
  415. if (ncores > 1 && max_cpus) {
  416. /*
  417. * Initialise the present map, which describes the set of CPUs
  418. * actually populated at the present time. A platform should
  419. * re-initialize the map in the platforms smp_prepare_cpus()
  420. * if present != possible (e.g. physical hotplug).
  421. */
  422. init_cpu_present(cpu_possible_mask);
  423. /*
  424. * Initialise the SCU if there are more than one CPU
  425. * and let them know where to start.
  426. */
  427. if (smp_ops.smp_prepare_cpus)
  428. smp_ops.smp_prepare_cpus(max_cpus);
  429. }
  430. }
  431. static void (*__smp_cross_call)(const struct cpumask *, unsigned int);
  432. void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
  433. {
  434. if (!__smp_cross_call)
  435. __smp_cross_call = fn;
  436. }
  437. static const char *ipi_types[NR_IPI] __tracepoint_string = {
  438. #define S(x,s) [x] = s
  439. S(IPI_WAKEUP, "CPU wakeup interrupts"),
  440. S(IPI_TIMER, "Timer broadcast interrupts"),
  441. S(IPI_RESCHEDULE, "Rescheduling interrupts"),
  442. S(IPI_CALL_FUNC, "Function call interrupts"),
  443. S(IPI_CPU_STOP, "CPU stop interrupts"),
  444. S(IPI_IRQ_WORK, "IRQ work interrupts"),
  445. S(IPI_COMPLETION, "completion interrupts"),
  446. };
  447. static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
  448. {
  449. trace_ipi_raise_rcuidle(target, ipi_types[ipinr]);
  450. __smp_cross_call(target, ipinr);
  451. }
  452. void show_ipi_list(struct seq_file *p, int prec)
  453. {
  454. unsigned int cpu, i;
  455. for (i = 0; i < NR_IPI; i++) {
  456. seq_printf(p, "%*s%u: ", prec - 1, "IPI", i);
  457. for_each_online_cpu(cpu)
  458. seq_printf(p, "%10u ",
  459. __get_irq_stat(cpu, ipi_irqs[i]));
  460. seq_printf(p, " %s\n", ipi_types[i]);
  461. }
  462. }
  463. u64 smp_irq_stat_cpu(unsigned int cpu)
  464. {
  465. u64 sum = 0;
  466. int i;
  467. for (i = 0; i < NR_IPI; i++)
  468. sum += __get_irq_stat(cpu, ipi_irqs[i]);
  469. return sum;
  470. }
  471. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  472. {
  473. smp_cross_call(mask, IPI_CALL_FUNC);
  474. }
  475. void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
  476. {
  477. smp_cross_call(mask, IPI_WAKEUP);
  478. }
  479. void arch_send_call_function_single_ipi(int cpu)
  480. {
  481. smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC);
  482. }
  483. #ifdef CONFIG_IRQ_WORK
  484. void arch_irq_work_raise(void)
  485. {
  486. if (arch_irq_work_has_interrupt())
  487. smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
  488. }
  489. #endif
  490. #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
  491. void tick_broadcast(const struct cpumask *mask)
  492. {
  493. smp_cross_call(mask, IPI_TIMER);
  494. }
  495. #endif
  496. static DEFINE_RAW_SPINLOCK(stop_lock);
  497. /*
  498. * ipi_cpu_stop - handle IPI from smp_send_stop()
  499. */
  500. static void ipi_cpu_stop(unsigned int cpu)
  501. {
  502. if (system_state <= SYSTEM_RUNNING) {
  503. raw_spin_lock(&stop_lock);
  504. pr_crit("CPU%u: stopping\n", cpu);
  505. dump_stack();
  506. raw_spin_unlock(&stop_lock);
  507. }
  508. set_cpu_online(cpu, false);
  509. local_fiq_disable();
  510. local_irq_disable();
  511. while (1) {
  512. cpu_relax();
  513. wfe();
  514. }
  515. }
  516. static DEFINE_PER_CPU(struct completion *, cpu_completion);
  517. int register_ipi_completion(struct completion *completion, int cpu)
  518. {
  519. per_cpu(cpu_completion, cpu) = completion;
  520. return IPI_COMPLETION;
  521. }
  522. static void ipi_complete(unsigned int cpu)
  523. {
  524. complete(per_cpu(cpu_completion, cpu));
  525. }
  526. /*
  527. * Main handler for inter-processor interrupts
  528. */
  529. asmlinkage void __exception_irq_entry do_IPI(int ipinr, struct pt_regs *regs)
  530. {
  531. handle_IPI(ipinr, regs);
  532. }
  533. void handle_IPI(int ipinr, struct pt_regs *regs)
  534. {
  535. unsigned int cpu = smp_processor_id();
  536. struct pt_regs *old_regs = set_irq_regs(regs);
  537. if ((unsigned)ipinr < NR_IPI) {
  538. trace_ipi_entry_rcuidle(ipi_types[ipinr]);
  539. __inc_irq_stat(cpu, ipi_irqs[ipinr]);
  540. }
  541. switch (ipinr) {
  542. case IPI_WAKEUP:
  543. break;
  544. #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
  545. case IPI_TIMER:
  546. irq_enter();
  547. tick_receive_broadcast();
  548. irq_exit();
  549. break;
  550. #endif
  551. case IPI_RESCHEDULE:
  552. scheduler_ipi();
  553. break;
  554. case IPI_CALL_FUNC:
  555. irq_enter();
  556. generic_smp_call_function_interrupt();
  557. irq_exit();
  558. break;
  559. case IPI_CPU_STOP:
  560. irq_enter();
  561. ipi_cpu_stop(cpu);
  562. irq_exit();
  563. break;
  564. #ifdef CONFIG_IRQ_WORK
  565. case IPI_IRQ_WORK:
  566. irq_enter();
  567. irq_work_run();
  568. irq_exit();
  569. break;
  570. #endif
  571. case IPI_COMPLETION:
  572. irq_enter();
  573. ipi_complete(cpu);
  574. irq_exit();
  575. break;
  576. case IPI_CPU_BACKTRACE:
  577. printk_nmi_enter();
  578. irq_enter();
  579. nmi_cpu_backtrace(regs);
  580. irq_exit();
  581. printk_nmi_exit();
  582. break;
  583. default:
  584. pr_crit("CPU%u: Unknown IPI message 0x%x\n",
  585. cpu, ipinr);
  586. break;
  587. }
  588. if ((unsigned)ipinr < NR_IPI)
  589. trace_ipi_exit_rcuidle(ipi_types[ipinr]);
  590. set_irq_regs(old_regs);
  591. }
  592. void smp_send_reschedule(int cpu)
  593. {
  594. smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
  595. }
  596. void smp_send_stop(void)
  597. {
  598. unsigned long timeout;
  599. struct cpumask mask;
  600. cpumask_copy(&mask, cpu_online_mask);
  601. cpumask_clear_cpu(smp_processor_id(), &mask);
  602. if (!cpumask_empty(&mask))
  603. smp_cross_call(&mask, IPI_CPU_STOP);
  604. /* Wait up to one second for other CPUs to stop */
  605. timeout = USEC_PER_SEC;
  606. while (num_online_cpus() > 1 && timeout--)
  607. udelay(1);
  608. if (num_online_cpus() > 1)
  609. pr_warn("SMP: failed to stop secondary CPUs\n");
  610. }
  611. /* In case panic() and panic() called at the same time on CPU1 and CPU2,
  612. * and CPU 1 calls panic_smp_self_stop() before crash_smp_send_stop()
  613. * CPU1 can't receive the ipi irqs from CPU2, CPU1 will be always online,
  614. * kdump fails. So split out the panic_smp_self_stop() and add
  615. * set_cpu_online(smp_processor_id(), false).
  616. */
  617. void panic_smp_self_stop(void)
  618. {
  619. pr_debug("CPU %u will stop doing anything useful since another CPU has paniced\n",
  620. smp_processor_id());
  621. set_cpu_online(smp_processor_id(), false);
  622. while (1)
  623. cpu_relax();
  624. }
  625. /*
  626. * not supported here
  627. */
  628. int setup_profiling_timer(unsigned int multiplier)
  629. {
  630. return -EINVAL;
  631. }
  632. #ifdef CONFIG_CPU_FREQ
  633. static DEFINE_PER_CPU(unsigned long, l_p_j_ref);
  634. static DEFINE_PER_CPU(unsigned long, l_p_j_ref_freq);
  635. static unsigned long global_l_p_j_ref;
  636. static unsigned long global_l_p_j_ref_freq;
  637. static int cpufreq_callback(struct notifier_block *nb,
  638. unsigned long val, void *data)
  639. {
  640. struct cpufreq_freqs *freq = data;
  641. int cpu = freq->cpu;
  642. if (freq->flags & CPUFREQ_CONST_LOOPS)
  643. return NOTIFY_OK;
  644. if (!per_cpu(l_p_j_ref, cpu)) {
  645. per_cpu(l_p_j_ref, cpu) =
  646. per_cpu(cpu_data, cpu).loops_per_jiffy;
  647. per_cpu(l_p_j_ref_freq, cpu) = freq->old;
  648. if (!global_l_p_j_ref) {
  649. global_l_p_j_ref = loops_per_jiffy;
  650. global_l_p_j_ref_freq = freq->old;
  651. }
  652. }
  653. if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
  654. (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) {
  655. loops_per_jiffy = cpufreq_scale(global_l_p_j_ref,
  656. global_l_p_j_ref_freq,
  657. freq->new);
  658. per_cpu(cpu_data, cpu).loops_per_jiffy =
  659. cpufreq_scale(per_cpu(l_p_j_ref, cpu),
  660. per_cpu(l_p_j_ref_freq, cpu),
  661. freq->new);
  662. }
  663. return NOTIFY_OK;
  664. }
  665. static struct notifier_block cpufreq_notifier = {
  666. .notifier_call = cpufreq_callback,
  667. };
  668. static int __init register_cpufreq_notifier(void)
  669. {
  670. return cpufreq_register_notifier(&cpufreq_notifier,
  671. CPUFREQ_TRANSITION_NOTIFIER);
  672. }
  673. core_initcall(register_cpufreq_notifier);
  674. #endif
  675. static void raise_nmi(cpumask_t *mask)
  676. {
  677. __smp_cross_call(mask, IPI_CPU_BACKTRACE);
  678. }
  679. void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)
  680. {
  681. nmi_trigger_cpumask_backtrace(mask, exclude_self, raise_nmi);
  682. }