msm.S 1.4 KB

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  1. /*
  2. *
  3. * Copyright (C) 2007 Google, Inc.
  4. * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
  5. * Author: Brian Swetland <swetland@google.com>
  6. *
  7. * This software is licensed under the terms of the GNU General Public
  8. * License version 2, as published by the Free Software Foundation, and
  9. * may be copied, distributed, and modified under those terms.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. */
  17. .macro addruart, rp, rv, tmp
  18. ldr \rp, =CONFIG_DEBUG_UART_PHYS
  19. ldr \rv, =CONFIG_DEBUG_UART_VIRT
  20. .endm
  21. .macro senduart, rd, rx
  22. ARM_BE8(rev \rd, \rd )
  23. @ Write the 1 character to UARTDM_TF
  24. str \rd, [\rx, #0x70]
  25. .endm
  26. .macro waituart, rd, rx
  27. @ check for TX_EMT in UARTDM_SR
  28. ldr \rd, [\rx, #0x08]
  29. ARM_BE8(rev \rd, \rd )
  30. tst \rd, #0x08
  31. bne 1002f
  32. @ wait for TXREADY in UARTDM_ISR
  33. 1001: ldr \rd, [\rx, #0x14]
  34. ARM_BE8(rev \rd, \rd )
  35. tst \rd, #0x80
  36. beq 1001b
  37. 1002:
  38. @ Clear TX_READY by writing to the UARTDM_CR register
  39. mov \rd, #0x300
  40. ARM_BE8(rev \rd, \rd )
  41. str \rd, [\rx, #0x10]
  42. @ Write 0x1 to NCF register
  43. mov \rd, #0x1
  44. ARM_BE8(rev \rd, \rd )
  45. str \rd, [\rx, #0x40]
  46. @ UARTDM reg. Read to induce delay
  47. ldr \rd, [\rx, #0x08]
  48. .endm
  49. .macro busyuart, rd, rx
  50. .endm