Home Explore Help
Sign In
Rydia
/
linux-phytium
Watch 1
Star 0
Fork 0
Files Issues 0 Pull Requests 0 Wiki
Tree: 6793c0e942
Branches Tags
linux-phytium
/
Documentation
/
smsc_ece1099.txt

smsc_ece1099.txt 2.5 KB
History Raw

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061 
  1. =================================================
    2. 

  2. Msc Keyboard Scan Expansion/GPIO Expansion device
    3. 

  3. =================================================
    4. 

  4. 

  5. What is smsc-ece1099?
    6. 

  6. ----------------------
    7. 

  7. 

  8. The ECE1099 is a 40-Pin 3.3V Keyboard Scan Expansion
    9. 

  9. or GPIO Expansion device. The device supports a keyboard
    10. 

  10. scan matrix of 23x8. The device is connected to a Master
    11. 

  11. via the SMSC BC-Link interface or via the SMBus.
    12. 

  12. Keypad scan Input(KSI) and Keypad Scan Output(KSO) signals
    13. 

  13. are multiplexed with GPIOs.
    14. 

  14. 

  15. Interrupt generation
    16. 

  16. --------------------
    17. 

  17. 

  18. Interrupts can be generated by an edge detection on a GPIO
    19. 

  19. pin or an edge detection on one of the bus interface pins.
    20. 

  20. Interrupts can also be detected on the keyboard scan interface.
    21. 

  21. The bus interrupt pin (BC_INT# or SMBUS_INT#) is asserted if
    22. 

  22. any bit in one of the Interrupt Status registers is 1 and
    23. 

  23. the corresponding Interrupt Mask bit is also 1.
    24. 

  24. 

  25. In order for software to determine which device is the source
    26. 

  26. of an interrupt, it should first read the Group Interrupt Status Register
    27. 

  27. to determine which Status register group is a source for the interrupt.
    28. 

  28. Software should read both the Status register and the associated Mask register,
    29. 

  29. then AND the two values together. Bits that are 1 in the result of the AND
    30. 

  30. are active interrupts. Software clears an interrupt by writing a 1 to the
    31. 

  31. corresponding bit in the Status register.
    32. 

  32. 

  33. Communication Protocol
    34. 

  34. ----------------------
    35. 

  35. 

  36. - SMbus slave Interface
    37. 

  37. 	The host processor communicates with the ECE1099 device
    38. 

  38. 	through a series of read/write registers via the SMBus
    39. 

  39. 	interface. SMBus is a serial communication protocol between
    40. 

  40. 	a computer host and its peripheral devices. The SMBus data
    41. 

  41. 	rate is 10KHz minimum to 400 KHz maximum
    42. 

  42. 

  43. - Slave Bus Interface
    44. 

  44. 	The ECE1099 device SMBus implementation is a subset of the
    45. 

  45. 	SMBus interface to the host. The device is a slave-only SMBus device.
    46. 

  46. 	The implementation in the device is a subset of SMBus since it
    47. 

  47. 	only supports four protocols.
    48. 

  48. 

  49. 	The Write Byte, Read Byte, Send Byte, and Receive Byte protocols are the
    50. 

  50. 	only valid SMBus protocols for the device.
    51. 

  51. 

  52. - BC-LinkTM Interface
    53. 

  53. 	The BC-Link is a proprietary bus that allows communication
    54. 

  54. 	between a Master device and a Companion device. The Master
    55. 

  55. 	device uses this serial bus to read and write registers
    56. 

  56. 	located on the Companion device. The bus comprises three signals,
    57. 

  57. 	BC_CLK, BC_DAT and BC_INT#. The Master device always provides the
    58. 

  58. 	clock, BC_CLK, and the Companion device is the source for an
    59. 

  59. 	independent asynchronous interrupt signal, BC_INT#. The ECE1099
    60. 

  60. 	supports BC-Link speeds up to 24MHz.
    61. 

  61.