halley2.lib 4.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114
  1. EESchema-LIBRARY Version 2.4
  2. #encoding utf-8
  3. #
  4. # Halley2
  5. #
  6. DEF Halley2 M 0 40 Y Y 4 L N
  7. F0 "M" 100 50 50 H V C CNN
  8. F1 "Halley2" 650 50 50 H V C CNN
  9. F2 "" 550 -550 50 H I C CNN
  10. F3 "" 550 -550 50 H I C CNN
  11. DRAW
  12. S 0 0 1300 -2000 1 1 0 N
  13. S 0 -1500 2900 0 2 1 0 N
  14. S 0 0 1400 -2000 3 1 0 N
  15. S 2900 -1200 0 0 4 1 0 N
  16. X RST_N 1 -100 -100 100 R 50 50 1 1 I
  17. X GND 10 -100 -1000 100 R 50 50 1 1 W
  18. X CODEC_PWMLP 11 -100 -1100 100 R 50 50 1 1 O
  19. X CODEC_PWMLN 12 -100 -1200 100 R 50 50 1 1 O
  20. X CODEC_PWMRP 13 -100 -1300 100 R 50 50 1 1 O
  21. X CODEC_PWMRN 14 -100 -1400 100 R 50 50 1 1 O
  22. X GND 15 -100 -1500 100 R 50 50 1 1 W
  23. X VBUS 16 -100 -1600 100 R 50 50 1 1 W
  24. X MAC_CRS_DV/SA7/GPB7 17 -100 -1700 100 R 50 50 1 1 T
  25. X MAC_PHY_CLK/SA6/PWM3/GPB6 18 -100 -1800 100 R 50 50 1 1 T
  26. X MAC_TXEN/SA10/GPB10 19 -100 -1900 100 R 50 50 1 1 T
  27. X CLK32K/GPB26 2 -100 -200 100 R 50 50 1 1 T
  28. X DRVVBUS/GPB25 3 -100 -300 100 R 50 50 1 1 T
  29. X OTG_ID 4 -100 -400 100 R 50 50 1 1 I
  30. X OTG_DM 5 -100 -500 100 R 50 50 1 1 B
  31. X OTG_DP 6 -100 -600 100 R 50 50 1 1 B
  32. X MICBIAS 7 -100 -700 100 R 50 50 1 1 w
  33. X AIN 8 -100 -800 100 R 50 50 1 1 I
  34. X AIP 9 -100 -900 100 R 50 50 1 1 I
  35. X MAC_RXD0/SA9/GPB9 20 100 -1600 100 U 50 50 2 1 T
  36. X MAC_RXD1/SA8/GPB8 21 200 -1600 100 U 50 50 2 1 T
  37. X MAC_MDC/SA13/GPB13 22 300 -1600 100 U 50 50 2 1 T
  38. X MAX_TXD1/SA11/GPB11 23 400 -1600 100 U 50 50 2 1 T
  39. X MAC_TXD0/SA12/GPB12 24 500 -1600 100 U 50 50 2 1 T
  40. X MAC_REF_CLK/SA15/GPB15 25 600 -1600 100 U 50 50 2 1 T
  41. X MAC_MDIO/SA14/GPB14 26 700 -1600 100 U 50 50 2 1 T
  42. X SLCD_RD/RD/GPB16 27 800 -1600 100 U 50 50 2 1 T
  43. X SLCD_D1/SD1/SMB1_SDA/GPA1 28 900 -1600 100 U 50 50 2 1 T
  44. X SLCD_D0/SD0/SMB1_CLK/GPA0 29 1000 -1600 100 U 50 50 2 1 T
  45. X SLCD_CE/CS1/GPB18 30 1100 -1600 100 U 50 50 2 1 T
  46. X SLCD_D3/SD3/UART_TXD/GPA3 31 1200 -1600 100 U 50 50 2 1 T
  47. X SLCD_D2/SD2/UART2_RXD/GPA2 32 1300 -1600 100 U 50 50 2 1 T
  48. X DC5V 33 1400 -1600 100 U 50 50 2 1 W
  49. X DC5V 34 1500 -1600 100 U 50 50 2 1 W
  50. X GND 35 1600 -1600 100 U 50 50 2 1 W
  51. X GND 36 1700 -1600 100 U 50 50 2 1 W
  52. X SLCD_D4/SD4/UART1_RXD/GPA14 37 1800 -1600 100 U 50 50 2 1 T
  53. X SLCD_D6/SD6/GPA6 38 1900 -1600 100 U 50 50 2 1 T
  54. X SLCD_WR/WE/GPB17 39 2000 -1600 100 U 50 50 2 1 T
  55. X SLCD_DC/WAIT/GPB20 40 2100 -1600 100 U 50 50 2 1 T
  56. X SLCD_D5/SD5/UART1_TXD/GPA5 41 2200 -1600 100 U 50 50 2 1 T
  57. X SLCD_D7/SD7/GPA7 42 2300 -1600 100 U 50 50 2 1 T
  58. X SLCD_D8/SD8/CIM_PCLK/GPA8 43 2400 -1600 100 U 50 50 2 1 T
  59. X SLCD_D9/SD9/CIM_HSYN/GPA9 44 2500 -1600 100 U 50 50 2 1 T
  60. X SLCD_D11/SD11/CIM_MCLK/GPA11 45 2600 -1600 100 U 50 50 2 1 T
  61. X SLCD_TE/CS2/GPB19 46 2700 -1600 100 U 50 50 2 1 T
  62. X SLCD_D10/SD10/CIM_VSYN/GPA10 47 2800 -1600 100 U 50 50 2 1 T
  63. X 3V3 48 1500 -1900 100 L 50 50 3 1 w
  64. X 3V3 49 1500 -1800 100 L 50 50 3 1 w
  65. X SSI0_GPC/MSC0_D3/GPA20 50 1500 -1700 100 L 50 50 3 1 T
  66. X SSI0_CE1/MSC0_D2/GPA21 51 1500 -1600 100 L 50 50 3 1 T
  67. X SSI0_DT/MSC0_D1/GPA22 52 1500 -1500 100 L 50 50 3 1 T
  68. X SSI0_DR/MSC0_D0/GPA23 53 1500 -1400 100 L 50 50 3 1 T
  69. X SSI0_CLK/MSC0_CLK/GPA24 54 1500 -1300 100 L 50 50 3 1 T
  70. X SSI0_CE0/MSC0_CMD/GPA25 55 1500 -1200 100 L 50 50 3 1 T
  71. X SLCD_D12/SD12/CIM_D7/GPA12 56 1500 -1100 100 L 50 50 3 1 T
  72. X SLCD_D13/SD13/CIM_D6/GPA13 57 1500 -1000 100 L 50 50 3 1 T
  73. X SLCD_D15/SD15/CIM_D4/GPA15 58 1500 -900 100 L 50 50 3 1 T
  74. X SLCD_D14/SD14/CIM_D5/GPA14 59 1500 -800 100 L 50 50 3 1 T
  75. X CIM_D3/MSC0_D7/GPA16 60 1500 -700 100 L 50 50 3 1 T
  76. X CIM_D1/MSC0_D4/GPA18 61 1500 -600 100 L 50 50 3 1 T
  77. X CIM_D0/MSC0_D5/GPA19 62 1500 -500 100 L 50 50 3 1 T
  78. X CIM_D2/MSC0_D6/GPA17 63 1500 -400 100 L 50 50 3 1 T
  79. X MAC_RST_N/GPC23 64 1500 -300 100 L 50 50 3 1 T
  80. X WKUP/GPB31 65 1500 -200 100 L 50 50 3 1 B
  81. X GND 66 1500 -100 100 L 50 50 3 1 W
  82. X RF_IN 67 100 -1300 100 U 50 50 4 1 P
  83. X GND 68 200 -1300 100 U 50 50 4 1 W
  84. X BOOT_SEL0/GPB28 69 300 -1300 100 U 50 50 4 1 I
  85. X TRST_N 70 400 -1300 100 U 50 50 4 1 I
  86. X DMIC1_IN/SA5/GPB5 71 500 -1300 100 U 50 50 4 1 T
  87. X TDI/UART2_RXD 72 600 -1300 100 U 50 50 4 1 I
  88. X TDO/UART2_TXD 73 700 -1300 100 U 50 50 4 1 O
  89. X SCC_DATA/SMB0_SDA/GPB24 74 800 -1300 100 U 50 50 4 1 T
  90. X SCC_CLK/SMB0_SCK/GPB23 75 900 -1300 100 U 50 50 4 1 T
  91. X PWM2/SMB1_SDA/GPC27 76 1000 -1300 100 U 50 50 4 1 T
  92. X PWM1/SMB1_SCK/GPC26 77 1100 -1300 100 U 50 50 4 1 T
  93. X PWM0/GPC25 78 1200 -1300 100 U 50 50 4 1 T
  94. X TCK 79 1300 -1300 100 U 50 50 4 1 I
  95. X PWM4/GPC24 80 1400 -1300 100 U 50 50 4 1 T
  96. X TMS 81 1500 -1300 100 U 50 50 4 1 I
  97. X UART1_CTS/UART2_TXD/GPD4 82 1600 -1300 100 U 50 50 4 1 T
  98. X UART1_RTS/UART2_RXD/GPD5 83 1700 -1300 100 U 50 50 4 1 T
  99. X UART1_RXD/SSI0_DT/GPD2 84 1800 -1300 100 U 50 50 4 1 T
  100. X UART1_TXD/SSI0_DR/GPD3 85 1900 -1300 100 U 50 50 4 1 T
  101. X SMB2_SCK/SSI0_SCK/GPD0 86 2000 -1300 100 U 50 50 4 1 T
  102. X SMB2_SDA/SSI0_CE0/GPD1 87 2100 -1300 100 U 50 50 4 1 T
  103. X I2S_BCLK/SA1/GPB1 88 2200 -1300 100 U 50 50 4 1 T
  104. X I2C_MCLK/SA0/GPB0 89 2300 -1300 100 U 50 50 4 1 T
  105. X I2S_DI/SA3/GPB3 90 2400 -1300 100 U 50 50 4 1 T
  106. X I2S_LRCLK/SA2/GPB4 91 2500 -1300 100 U 50 50 4 1 T
  107. X I2S_D)/SA4/GPB4 92 2600 -1300 100 U 50 50 4 1 T
  108. X DMIC0_IN/GPB22 93 2700 -1300 100 U 50 50 4 1 T
  109. X DMIC_CLK/GPB21 94 2800 -1300 100 U 50 50 4 1 T
  110. ENDDRAW
  111. ENDDEF
  112. #
  113. #End Library