README 348 B

12345678
  1. ADMS is a code generator for the Verilog-AMS language
  2. ADMS is a code generator that converts electrical compact
  3. device models specified in high-level description language into
  4. ready-to-compile C code for the API of spice simulators. Based on
  5. transformations specified in XML language, ADMS transforms Verilog-AMS
  6. code into other target languages.