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- # HOW TO EDIT THIS FILE:
- # The "handy ruler" below makes it easier to edit a package description.
- # Line up the first '|' above the ':' following the base package name, and
- # the '|' on the right side marks the last column you can put a character in.
- # You must make exactly 11 lines for the formatting to be correct. It's also
- # customary to leave one space after the ':' except on otherwise blank lines.
- |-----handy-ruler------------------------------------------------------|
- verilog: verilog (Icarus Verilog Complier)
- verilog:
- verilog: Icarus Verilog is a Verilog simulation and synthesis tool. It operates
- verilog: as a compiler, compling source code writen in Verilog (IEEE-1364) into
- verilog: some target.
- verilog:
- verilog: http://www.icarus.com/eda/verilog/
- verilog:
- verilog:
- verilog:
- verilog:
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