dma-sh7760.c 10 KB

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  1. /*
  2. * SH7760 ("camelot") DMABRG audio DMA unit support
  3. *
  4. * Copyright (C) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
  5. * licensed under the terms outlined in the file COPYING at the root
  6. * of the linux kernel sources.
  7. *
  8. * The SH7760 DMABRG provides 4 dma channels (2x rec, 2x play), which
  9. * trigger an interrupt when one half of the programmed transfer size
  10. * has been xmitted.
  11. *
  12. * FIXME: little-endian only for now
  13. */
  14. #include <linux/module.h>
  15. #include <linux/gfp.h>
  16. #include <linux/init.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/dma-mapping.h>
  19. #include <sound/core.h>
  20. #include <sound/pcm.h>
  21. #include <sound/pcm_params.h>
  22. #include <sound/soc.h>
  23. #include <asm/dmabrg.h>
  24. /* registers and bits */
  25. #define BRGATXSAR 0x00
  26. #define BRGARXDAR 0x04
  27. #define BRGATXTCR 0x08
  28. #define BRGARXTCR 0x0C
  29. #define BRGACR 0x10
  30. #define BRGATXTCNT 0x14
  31. #define BRGARXTCNT 0x18
  32. #define ACR_RAR (1 << 18)
  33. #define ACR_RDS (1 << 17)
  34. #define ACR_RDE (1 << 16)
  35. #define ACR_TAR (1 << 2)
  36. #define ACR_TDS (1 << 1)
  37. #define ACR_TDE (1 << 0)
  38. /* receiver/transmitter data alignment */
  39. #define ACR_RAM_NONE (0 << 24)
  40. #define ACR_RAM_4BYTE (1 << 24)
  41. #define ACR_RAM_2WORD (2 << 24)
  42. #define ACR_TAM_NONE (0 << 8)
  43. #define ACR_TAM_4BYTE (1 << 8)
  44. #define ACR_TAM_2WORD (2 << 8)
  45. struct camelot_pcm {
  46. unsigned long mmio; /* DMABRG audio channel control reg MMIO */
  47. unsigned int txid; /* ID of first DMABRG IRQ for this unit */
  48. struct snd_pcm_substream *tx_ss;
  49. unsigned long tx_period_size;
  50. unsigned int tx_period;
  51. struct snd_pcm_substream *rx_ss;
  52. unsigned long rx_period_size;
  53. unsigned int rx_period;
  54. } cam_pcm_data[2] = {
  55. {
  56. .mmio = 0xFE3C0040,
  57. .txid = DMABRGIRQ_A0TXF,
  58. },
  59. {
  60. .mmio = 0xFE3C0060,
  61. .txid = DMABRGIRQ_A1TXF,
  62. },
  63. };
  64. #define BRGREG(x) (*(unsigned long *)(cam->mmio + (x)))
  65. /*
  66. * set a minimum of 16kb per period, to avoid interrupt-"storm" and
  67. * resulting skipping. In general, the bigger the minimum size, the
  68. * better for overall system performance. (The SH7760 is a puny CPU
  69. * with a slow SDRAM interface and poor internal bus bandwidth,
  70. * *especially* when the LCDC is active). The minimum for the DMAC
  71. * is 8 bytes; 16kbytes are enough to get skip-free playback of a
  72. * 44kHz/16bit/stereo MP3 on a lightly loaded system, and maintain
  73. * reasonable responsiveness in MPlayer.
  74. */
  75. #define DMABRG_PERIOD_MIN 16 * 1024
  76. #define DMABRG_PERIOD_MAX 0x03fffffc
  77. #define DMABRG_PREALLOC_BUFFER 32 * 1024
  78. #define DMABRG_PREALLOC_BUFFER_MAX 32 * 1024
  79. /* support everything the SSI supports */
  80. #define DMABRG_RATES \
  81. SNDRV_PCM_RATE_8000_192000
  82. #define DMABRG_FMTS \
  83. (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 | \
  84. SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE | \
  85. SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_U20_3LE | \
  86. SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_U24_3LE | \
  87. SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_U32_LE)
  88. static struct snd_pcm_hardware camelot_pcm_hardware = {
  89. .info = (SNDRV_PCM_INFO_MMAP |
  90. SNDRV_PCM_INFO_INTERLEAVED |
  91. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  92. SNDRV_PCM_INFO_MMAP_VALID |
  93. SNDRV_PCM_INFO_BATCH),
  94. .formats = DMABRG_FMTS,
  95. .rates = DMABRG_RATES,
  96. .rate_min = 8000,
  97. .rate_max = 192000,
  98. .channels_min = 2,
  99. .channels_max = 8, /* max of the SSI */
  100. .buffer_bytes_max = DMABRG_PERIOD_MAX,
  101. .period_bytes_min = DMABRG_PERIOD_MIN,
  102. .period_bytes_max = DMABRG_PERIOD_MAX / 2,
  103. .periods_min = 2,
  104. .periods_max = 2,
  105. .fifo_size = 128,
  106. };
  107. static void camelot_txdma(void *data)
  108. {
  109. struct camelot_pcm *cam = data;
  110. cam->tx_period ^= 1;
  111. snd_pcm_period_elapsed(cam->tx_ss);
  112. }
  113. static void camelot_rxdma(void *data)
  114. {
  115. struct camelot_pcm *cam = data;
  116. cam->rx_period ^= 1;
  117. snd_pcm_period_elapsed(cam->rx_ss);
  118. }
  119. static int camelot_pcm_open(struct snd_pcm_substream *substream)
  120. {
  121. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  122. struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id];
  123. int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
  124. int ret, dmairq;
  125. snd_soc_set_runtime_hwparams(substream, &camelot_pcm_hardware);
  126. /* DMABRG buffer half/full events */
  127. dmairq = (recv) ? cam->txid + 2 : cam->txid;
  128. if (recv) {
  129. cam->rx_ss = substream;
  130. ret = dmabrg_request_irq(dmairq, camelot_rxdma, cam);
  131. if (unlikely(ret)) {
  132. pr_debug("audio unit %d irqs already taken!\n",
  133. rtd->cpu_dai->id);
  134. return -EBUSY;
  135. }
  136. (void)dmabrg_request_irq(dmairq + 1,camelot_rxdma, cam);
  137. } else {
  138. cam->tx_ss = substream;
  139. ret = dmabrg_request_irq(dmairq, camelot_txdma, cam);
  140. if (unlikely(ret)) {
  141. pr_debug("audio unit %d irqs already taken!\n",
  142. rtd->cpu_dai->id);
  143. return -EBUSY;
  144. }
  145. (void)dmabrg_request_irq(dmairq + 1, camelot_txdma, cam);
  146. }
  147. return 0;
  148. }
  149. static int camelot_pcm_close(struct snd_pcm_substream *substream)
  150. {
  151. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  152. struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id];
  153. int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
  154. int dmairq;
  155. dmairq = (recv) ? cam->txid + 2 : cam->txid;
  156. if (recv)
  157. cam->rx_ss = NULL;
  158. else
  159. cam->tx_ss = NULL;
  160. dmabrg_free_irq(dmairq + 1);
  161. dmabrg_free_irq(dmairq);
  162. return 0;
  163. }
  164. static int camelot_hw_params(struct snd_pcm_substream *substream,
  165. struct snd_pcm_hw_params *hw_params)
  166. {
  167. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  168. struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id];
  169. int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
  170. int ret;
  171. ret = snd_pcm_lib_malloc_pages(substream,
  172. params_buffer_bytes(hw_params));
  173. if (ret < 0)
  174. return ret;
  175. if (recv) {
  176. cam->rx_period_size = params_period_bytes(hw_params);
  177. cam->rx_period = 0;
  178. } else {
  179. cam->tx_period_size = params_period_bytes(hw_params);
  180. cam->tx_period = 0;
  181. }
  182. return 0;
  183. }
  184. static int camelot_hw_free(struct snd_pcm_substream *substream)
  185. {
  186. return snd_pcm_lib_free_pages(substream);
  187. }
  188. static int camelot_prepare(struct snd_pcm_substream *substream)
  189. {
  190. struct snd_pcm_runtime *runtime = substream->runtime;
  191. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  192. struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id];
  193. pr_debug("PCM data: addr 0x%08ulx len %d\n",
  194. (u32)runtime->dma_addr, runtime->dma_bytes);
  195. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  196. BRGREG(BRGATXSAR) = (unsigned long)runtime->dma_area;
  197. BRGREG(BRGATXTCR) = runtime->dma_bytes;
  198. } else {
  199. BRGREG(BRGARXDAR) = (unsigned long)runtime->dma_area;
  200. BRGREG(BRGARXTCR) = runtime->dma_bytes;
  201. }
  202. return 0;
  203. }
  204. static inline void dmabrg_play_dma_start(struct camelot_pcm *cam)
  205. {
  206. unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
  207. /* start DMABRG engine: XFER start, auto-addr-reload */
  208. BRGREG(BRGACR) = acr | ACR_TDE | ACR_TAR | ACR_TAM_2WORD;
  209. }
  210. static inline void dmabrg_play_dma_stop(struct camelot_pcm *cam)
  211. {
  212. unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
  213. /* forcibly terminate data transmission */
  214. BRGREG(BRGACR) = acr | ACR_TDS;
  215. }
  216. static inline void dmabrg_rec_dma_start(struct camelot_pcm *cam)
  217. {
  218. unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
  219. /* start DMABRG engine: recv start, auto-reload */
  220. BRGREG(BRGACR) = acr | ACR_RDE | ACR_RAR | ACR_RAM_2WORD;
  221. }
  222. static inline void dmabrg_rec_dma_stop(struct camelot_pcm *cam)
  223. {
  224. unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
  225. /* forcibly terminate data receiver */
  226. BRGREG(BRGACR) = acr | ACR_RDS;
  227. }
  228. static int camelot_trigger(struct snd_pcm_substream *substream, int cmd)
  229. {
  230. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  231. struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id];
  232. int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
  233. switch (cmd) {
  234. case SNDRV_PCM_TRIGGER_START:
  235. if (recv)
  236. dmabrg_rec_dma_start(cam);
  237. else
  238. dmabrg_play_dma_start(cam);
  239. break;
  240. case SNDRV_PCM_TRIGGER_STOP:
  241. if (recv)
  242. dmabrg_rec_dma_stop(cam);
  243. else
  244. dmabrg_play_dma_stop(cam);
  245. break;
  246. default:
  247. return -EINVAL;
  248. }
  249. return 0;
  250. }
  251. static snd_pcm_uframes_t camelot_pos(struct snd_pcm_substream *substream)
  252. {
  253. struct snd_pcm_runtime *runtime = substream->runtime;
  254. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  255. struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id];
  256. int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
  257. unsigned long pos;
  258. /* cannot use the DMABRG pointer register: under load, by the
  259. * time ALSA comes around to read the register, it is already
  260. * far ahead (or worse, already done with the fragment) of the
  261. * position at the time the IRQ was triggered, which results in
  262. * fast-playback sound in my test application (ScummVM)
  263. */
  264. if (recv)
  265. pos = cam->rx_period ? cam->rx_period_size : 0;
  266. else
  267. pos = cam->tx_period ? cam->tx_period_size : 0;
  268. return bytes_to_frames(runtime, pos);
  269. }
  270. static struct snd_pcm_ops camelot_pcm_ops = {
  271. .open = camelot_pcm_open,
  272. .close = camelot_pcm_close,
  273. .ioctl = snd_pcm_lib_ioctl,
  274. .hw_params = camelot_hw_params,
  275. .hw_free = camelot_hw_free,
  276. .prepare = camelot_prepare,
  277. .trigger = camelot_trigger,
  278. .pointer = camelot_pos,
  279. };
  280. static void camelot_pcm_free(struct snd_pcm *pcm)
  281. {
  282. snd_pcm_lib_preallocate_free_for_all(pcm);
  283. }
  284. static int camelot_pcm_new(struct snd_card *card,
  285. struct snd_soc_dai *dai,
  286. struct snd_pcm *pcm)
  287. {
  288. /* dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
  289. * in MMAP mode (i.e. aplay -M)
  290. */
  291. snd_pcm_lib_preallocate_pages_for_all(pcm,
  292. SNDRV_DMA_TYPE_CONTINUOUS,
  293. snd_dma_continuous_data(GFP_KERNEL),
  294. DMABRG_PREALLOC_BUFFER, DMABRG_PREALLOC_BUFFER_MAX);
  295. return 0;
  296. }
  297. static struct snd_soc_platform sh7760_soc_platform = {
  298. .pcm_ops = &camelot_pcm_ops,
  299. .pcm_new = camelot_pcm_new,
  300. .pcm_free = camelot_pcm_free,
  301. };
  302. static int __devinit sh7760_soc_platform_probe(struct platform_device *pdev)
  303. {
  304. return snd_soc_register_platform(&pdev->dev, &sh7760_soc_platform);
  305. }
  306. static int __devexit sh7760_soc_platform_remove(struct platform_device *pdev)
  307. {
  308. snd_soc_unregister_platform(&pdev->dev);
  309. return 0;
  310. }
  311. static struct platform_driver sh7760_pcm_driver = {
  312. .driver = {
  313. .name = "sh7760-pcm-audio",
  314. .owner = THIS_MODULE,
  315. },
  316. .probe = sh7760_soc_platform_probe,
  317. .remove = __devexit_p(sh7760_soc_platform_remove),
  318. };
  319. static int __init snd_sh7760_pcm_init(void)
  320. {
  321. return platform_driver_register(&sh7760_pcm_driver);
  322. }
  323. module_init(snd_sh7760_pcm_init);
  324. static void __exit snd_sh7760_pcm_exit(void)
  325. {
  326. platform_driver_unregister(&sh7760_pcm_driver);
  327. }
  328. module_exit(snd_sh7760_pcm_exit);
  329. MODULE_LICENSE("GPL");
  330. MODULE_DESCRIPTION("SH7760 Audio DMA (DMABRG) driver");
  331. MODULE_AUTHOR("Manuel Lauss <mano@roarinelk.homelinux.net>");