sa1100fb.c 42 KB

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  1. /*
  2. * linux/drivers/video/sa1100fb.c
  3. *
  4. * Copyright (C) 1999 Eric A. Thomas
  5. * Based on acornfb.c Copyright (C) Russell King.
  6. *
  7. * This file is subject to the terms and conditions of the GNU General Public
  8. * License. See the file COPYING in the main directory of this archive for
  9. * more details.
  10. *
  11. * StrongARM 1100 LCD Controller Frame Buffer Driver
  12. *
  13. * Please direct your questions and comments on this driver to the following
  14. * email address:
  15. *
  16. * linux-arm-kernel@lists.arm.linux.org.uk
  17. *
  18. * Clean patches should be sent to the ARM Linux Patch System. Please see the
  19. * following web page for more information:
  20. *
  21. * http://www.arm.linux.org.uk/developer/patches/info.shtml
  22. *
  23. * Thank you.
  24. *
  25. * Known problems:
  26. * - With the Neponset plugged into an Assabet, LCD powerdown
  27. * doesn't work (LCD stays powered up). Therefore we shouldn't
  28. * blank the screen.
  29. * - We don't limit the CPU clock rate nor the mode selection
  30. * according to the available SDRAM bandwidth.
  31. *
  32. * Other notes:
  33. * - Linear grayscale palettes and the kernel.
  34. * Such code does not belong in the kernel. The kernel frame buffer
  35. * drivers do not expect a linear colourmap, but a colourmap based on
  36. * the VT100 standard mapping.
  37. *
  38. * If your _userspace_ requires a linear colourmap, then the setup of
  39. * such a colourmap belongs _in userspace_, not in the kernel. Code
  40. * to set the colourmap correctly from user space has been sent to
  41. * David Neuer. It's around 8 lines of C code, plus another 4 to
  42. * detect if we are using grayscale.
  43. *
  44. * - The following must never be specified in a panel definition:
  45. * LCCR0_LtlEnd, LCCR3_PixClkDiv, LCCR3_VrtSnchL, LCCR3_HorSnchL
  46. *
  47. * - The following should be specified:
  48. * either LCCR0_Color or LCCR0_Mono
  49. * either LCCR0_Sngl or LCCR0_Dual
  50. * either LCCR0_Act or LCCR0_Pas
  51. * either LCCR3_OutEnH or LCCD3_OutEnL
  52. * either LCCR3_PixRsEdg or LCCR3_PixFlEdg
  53. * either LCCR3_ACBsDiv or LCCR3_ACBsCntOff
  54. *
  55. * Code Status:
  56. * 1999/04/01:
  57. * - Driver appears to be working for Brutus 320x200x8bpp mode. Other
  58. * resolutions are working, but only the 8bpp mode is supported.
  59. * Changes need to be made to the palette encode and decode routines
  60. * to support 4 and 16 bpp modes.
  61. * Driver is not designed to be a module. The FrameBuffer is statically
  62. * allocated since dynamic allocation of a 300k buffer cannot be
  63. * guaranteed.
  64. *
  65. * 1999/06/17:
  66. * - FrameBuffer memory is now allocated at run-time when the
  67. * driver is initialized.
  68. *
  69. * 2000/04/10: Nicolas Pitre <nico@fluxnic.net>
  70. * - Big cleanup for dynamic selection of machine type at run time.
  71. *
  72. * 2000/07/19: Jamey Hicks <jamey@crl.dec.com>
  73. * - Support for Bitsy aka Compaq iPAQ H3600 added.
  74. *
  75. * 2000/08/07: Tak-Shing Chan <tchan.rd@idthk.com>
  76. * Jeff Sutherland <jsutherland@accelent.com>
  77. * - Resolved an issue caused by a change made to the Assabet's PLD
  78. * earlier this year which broke the framebuffer driver for newer
  79. * Phase 4 Assabets. Some other parameters were changed to optimize
  80. * for the Sharp display.
  81. *
  82. * 2000/08/09: Kunihiko IMAI <imai@vasara.co.jp>
  83. * - XP860 support added
  84. *
  85. * 2000/08/19: Mark Huang <mhuang@livetoy.com>
  86. * - Allows standard options to be passed on the kernel command line
  87. * for most common passive displays.
  88. *
  89. * 2000/08/29:
  90. * - s/save_flags_cli/local_irq_save/
  91. * - remove unneeded extra save_flags_cli in sa1100fb_enable_lcd_controller
  92. *
  93. * 2000/10/10: Erik Mouw <J.A.K.Mouw@its.tudelft.nl>
  94. * - Updated LART stuff. Fixed some minor bugs.
  95. *
  96. * 2000/10/30: Murphy Chen <murphy@mail.dialogue.com.tw>
  97. * - Pangolin support added
  98. *
  99. * 2000/10/31: Roman Jordan <jor@hoeft-wessel.de>
  100. * - Huw Webpanel support added
  101. *
  102. * 2000/11/23: Eric Peng <ericpeng@coventive.com>
  103. * - Freebird add
  104. *
  105. * 2001/02/07: Jamey Hicks <jamey.hicks@compaq.com>
  106. * Cliff Brake <cbrake@accelent.com>
  107. * - Added PM callback
  108. *
  109. * 2001/05/26: <rmk@arm.linux.org.uk>
  110. * - Fix 16bpp so that (a) we use the right colours rather than some
  111. * totally random colour depending on what was in page 0, and (b)
  112. * we don't de-reference a NULL pointer.
  113. * - remove duplicated implementation of consistent_alloc()
  114. * - convert dma address types to dma_addr_t
  115. * - remove unused 'montype' stuff
  116. * - remove redundant zero inits of init_var after the initial
  117. * memset.
  118. * - remove allow_modeset (acornfb idea does not belong here)
  119. *
  120. * 2001/05/28: <rmk@arm.linux.org.uk>
  121. * - massive cleanup - move machine dependent data into structures
  122. * - I've left various #warnings in - if you see one, and know
  123. * the hardware concerned, please get in contact with me.
  124. *
  125. * 2001/05/31: <rmk@arm.linux.org.uk>
  126. * - Fix LCCR1 HSW value, fix all machine type specifications to
  127. * keep values in line. (Please check your machine type specs)
  128. *
  129. * 2001/06/10: <rmk@arm.linux.org.uk>
  130. * - Fiddle with the LCD controller from task context only; mainly
  131. * so that we can run with interrupts on, and sleep.
  132. * - Convert #warnings into #errors. No pain, no gain. ;)
  133. *
  134. * 2001/06/14: <rmk@arm.linux.org.uk>
  135. * - Make the palette BPS value for 12bpp come out correctly.
  136. * - Take notice of "greyscale" on any colour depth.
  137. * - Make truecolor visuals use the RGB channel encoding information.
  138. *
  139. * 2001/07/02: <rmk@arm.linux.org.uk>
  140. * - Fix colourmap problems.
  141. *
  142. * 2001/07/13: <abraham@2d3d.co.za>
  143. * - Added support for the ICP LCD-Kit01 on LART. This LCD is
  144. * manufactured by Prime View, model no V16C6448AB
  145. *
  146. * 2001/07/23: <rmk@arm.linux.org.uk>
  147. * - Hand merge version from handhelds.org CVS tree. See patch
  148. * notes for 595/1 for more information.
  149. * - Drop 12bpp (it's 16bpp with different colour register mappings).
  150. * - This hardware can not do direct colour. Therefore we don't
  151. * support it.
  152. *
  153. * 2001/07/27: <rmk@arm.linux.org.uk>
  154. * - Halve YRES on dual scan LCDs.
  155. *
  156. * 2001/08/22: <rmk@arm.linux.org.uk>
  157. * - Add b/w iPAQ pixclock value.
  158. *
  159. * 2001/10/12: <rmk@arm.linux.org.uk>
  160. * - Add patch 681/1 and clean up stork definitions.
  161. */
  162. #include <linux/module.h>
  163. #include <linux/kernel.h>
  164. #include <linux/sched.h>
  165. #include <linux/errno.h>
  166. #include <linux/string.h>
  167. #include <linux/interrupt.h>
  168. #include <linux/slab.h>
  169. #include <linux/mm.h>
  170. #include <linux/fb.h>
  171. #include <linux/delay.h>
  172. #include <linux/init.h>
  173. #include <linux/ioport.h>
  174. #include <linux/cpufreq.h>
  175. #include <linux/platform_device.h>
  176. #include <linux/dma-mapping.h>
  177. #include <linux/mutex.h>
  178. #include <linux/io.h>
  179. #include <mach/hardware.h>
  180. #include <asm/mach-types.h>
  181. #include <mach/assabet.h>
  182. #include <mach/shannon.h>
  183. /*
  184. * debugging?
  185. */
  186. #define DEBUG 0
  187. /*
  188. * Complain if VAR is out of range.
  189. */
  190. #define DEBUG_VAR 1
  191. #undef ASSABET_PAL_VIDEO
  192. #include "sa1100fb.h"
  193. extern void (*sa1100fb_backlight_power)(int on);
  194. extern void (*sa1100fb_lcd_power)(int on);
  195. static struct sa1100fb_rgb rgb_4 = {
  196. .red = { .offset = 0, .length = 4, },
  197. .green = { .offset = 0, .length = 4, },
  198. .blue = { .offset = 0, .length = 4, },
  199. .transp = { .offset = 0, .length = 0, },
  200. };
  201. static struct sa1100fb_rgb rgb_8 = {
  202. .red = { .offset = 0, .length = 8, },
  203. .green = { .offset = 0, .length = 8, },
  204. .blue = { .offset = 0, .length = 8, },
  205. .transp = { .offset = 0, .length = 0, },
  206. };
  207. static struct sa1100fb_rgb def_rgb_16 = {
  208. .red = { .offset = 11, .length = 5, },
  209. .green = { .offset = 5, .length = 6, },
  210. .blue = { .offset = 0, .length = 5, },
  211. .transp = { .offset = 0, .length = 0, },
  212. };
  213. #ifdef CONFIG_SA1100_ASSABET
  214. #ifndef ASSABET_PAL_VIDEO
  215. /*
  216. * The assabet uses a sharp LQ039Q2DS54 LCD module. It is actually
  217. * takes an RGB666 signal, but we provide it with an RGB565 signal
  218. * instead (def_rgb_16).
  219. */
  220. static struct sa1100fb_mach_info lq039q2ds54_info __initdata = {
  221. .pixclock = 171521, .bpp = 16,
  222. .xres = 320, .yres = 240,
  223. .hsync_len = 5, .vsync_len = 1,
  224. .left_margin = 61, .upper_margin = 3,
  225. .right_margin = 9, .lower_margin = 0,
  226. .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  227. .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
  228. .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
  229. };
  230. #else
  231. static struct sa1100fb_mach_info pal_info __initdata = {
  232. .pixclock = 67797, .bpp = 16,
  233. .xres = 640, .yres = 512,
  234. .hsync_len = 64, .vsync_len = 6,
  235. .left_margin = 125, .upper_margin = 70,
  236. .right_margin = 115, .lower_margin = 36,
  237. .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
  238. .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
  239. };
  240. #endif
  241. #endif
  242. #ifdef CONFIG_SA1100_H3600
  243. static struct sa1100fb_mach_info h3600_info __initdata = {
  244. .pixclock = 174757, .bpp = 16,
  245. .xres = 320, .yres = 240,
  246. .hsync_len = 3, .vsync_len = 3,
  247. .left_margin = 12, .upper_margin = 10,
  248. .right_margin = 17, .lower_margin = 1,
  249. .cmap_static = 1,
  250. .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
  251. .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
  252. };
  253. static struct sa1100fb_rgb h3600_rgb_16 = {
  254. .red = { .offset = 12, .length = 4, },
  255. .green = { .offset = 7, .length = 4, },
  256. .blue = { .offset = 1, .length = 4, },
  257. .transp = { .offset = 0, .length = 0, },
  258. };
  259. #endif
  260. #ifdef CONFIG_SA1100_H3100
  261. static struct sa1100fb_mach_info h3100_info __initdata = {
  262. .pixclock = 406977, .bpp = 4,
  263. .xres = 320, .yres = 240,
  264. .hsync_len = 26, .vsync_len = 41,
  265. .left_margin = 4, .upper_margin = 0,
  266. .right_margin = 4, .lower_margin = 0,
  267. .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  268. .cmap_greyscale = 1,
  269. .cmap_inverse = 1,
  270. .lccr0 = LCCR0_Mono | LCCR0_4PixMono | LCCR0_Sngl | LCCR0_Pas,
  271. .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
  272. };
  273. #endif
  274. #ifdef CONFIG_SA1100_COLLIE
  275. static struct sa1100fb_mach_info collie_info __initdata = {
  276. .pixclock = 171521, .bpp = 16,
  277. .xres = 320, .yres = 240,
  278. .hsync_len = 5, .vsync_len = 1,
  279. .left_margin = 11, .upper_margin = 2,
  280. .right_margin = 30, .lower_margin = 0,
  281. .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  282. .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
  283. .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
  284. };
  285. #endif
  286. #ifdef LART_GREY_LCD
  287. static struct sa1100fb_mach_info lart_grey_info __initdata = {
  288. .pixclock = 150000, .bpp = 4,
  289. .xres = 320, .yres = 240,
  290. .hsync_len = 1, .vsync_len = 1,
  291. .left_margin = 4, .upper_margin = 0,
  292. .right_margin = 2, .lower_margin = 0,
  293. .cmap_greyscale = 1,
  294. .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  295. .lccr0 = LCCR0_Mono | LCCR0_Sngl | LCCR0_Pas | LCCR0_4PixMono,
  296. .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
  297. };
  298. #endif
  299. #ifdef LART_COLOR_LCD
  300. static struct sa1100fb_mach_info lart_color_info __initdata = {
  301. .pixclock = 150000, .bpp = 16,
  302. .xres = 320, .yres = 240,
  303. .hsync_len = 2, .vsync_len = 3,
  304. .left_margin = 69, .upper_margin = 14,
  305. .right_margin = 8, .lower_margin = 4,
  306. .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
  307. .lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512),
  308. };
  309. #endif
  310. #ifdef LART_VIDEO_OUT
  311. static struct sa1100fb_mach_info lart_video_info __initdata = {
  312. .pixclock = 39721, .bpp = 16,
  313. .xres = 640, .yres = 480,
  314. .hsync_len = 95, .vsync_len = 2,
  315. .left_margin = 40, .upper_margin = 32,
  316. .right_margin = 24, .lower_margin = 11,
  317. .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  318. .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
  319. .lccr3 = LCCR3_OutEnL | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512),
  320. };
  321. #endif
  322. #ifdef LART_KIT01_LCD
  323. static struct sa1100fb_mach_info lart_kit01_info __initdata = {
  324. .pixclock = 63291, .bpp = 16,
  325. .xres = 640, .yres = 480,
  326. .hsync_len = 64, .vsync_len = 3,
  327. .left_margin = 122, .upper_margin = 45,
  328. .right_margin = 10, .lower_margin = 10,
  329. .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
  330. .lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg
  331. };
  332. #endif
  333. #ifdef CONFIG_SA1100_SHANNON
  334. static struct sa1100fb_mach_info shannon_info __initdata = {
  335. .pixclock = 152500, .bpp = 8,
  336. .xres = 640, .yres = 480,
  337. .hsync_len = 4, .vsync_len = 3,
  338. .left_margin = 2, .upper_margin = 0,
  339. .right_margin = 1, .lower_margin = 0,
  340. .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  341. .lccr0 = LCCR0_Color | LCCR0_Dual | LCCR0_Pas,
  342. .lccr3 = LCCR3_ACBsDiv(512),
  343. };
  344. #endif
  345. static struct sa1100fb_mach_info * __init
  346. sa1100fb_get_machine_info(struct sa1100fb_info *fbi)
  347. {
  348. struct sa1100fb_mach_info *inf = NULL;
  349. /*
  350. * R G B T
  351. * default {11,5}, { 5,6}, { 0,5}, { 0,0}
  352. * h3600 {12,4}, { 7,4}, { 1,4}, { 0,0}
  353. * freebird { 8,4}, { 4,4}, { 0,4}, {12,4}
  354. */
  355. #ifdef CONFIG_SA1100_ASSABET
  356. if (machine_is_assabet()) {
  357. #ifndef ASSABET_PAL_VIDEO
  358. inf = &lq039q2ds54_info;
  359. #else
  360. inf = &pal_info;
  361. #endif
  362. }
  363. #endif
  364. #ifdef CONFIG_SA1100_H3100
  365. if (machine_is_h3100()) {
  366. inf = &h3100_info;
  367. }
  368. #endif
  369. #ifdef CONFIG_SA1100_H3600
  370. if (machine_is_h3600()) {
  371. inf = &h3600_info;
  372. fbi->rgb[RGB_16] = &h3600_rgb_16;
  373. }
  374. #endif
  375. #ifdef CONFIG_SA1100_COLLIE
  376. if (machine_is_collie()) {
  377. inf = &collie_info;
  378. }
  379. #endif
  380. #ifdef CONFIG_SA1100_LART
  381. if (machine_is_lart()) {
  382. #ifdef LART_GREY_LCD
  383. inf = &lart_grey_info;
  384. #endif
  385. #ifdef LART_COLOR_LCD
  386. inf = &lart_color_info;
  387. #endif
  388. #ifdef LART_VIDEO_OUT
  389. inf = &lart_video_info;
  390. #endif
  391. #ifdef LART_KIT01_LCD
  392. inf = &lart_kit01_info;
  393. #endif
  394. }
  395. #endif
  396. #ifdef CONFIG_SA1100_SHANNON
  397. if (machine_is_shannon()) {
  398. inf = &shannon_info;
  399. }
  400. #endif
  401. return inf;
  402. }
  403. static int sa1100fb_activate_var(struct fb_var_screeninfo *var, struct sa1100fb_info *);
  404. static void set_ctrlr_state(struct sa1100fb_info *fbi, u_int state);
  405. static inline void sa1100fb_schedule_work(struct sa1100fb_info *fbi, u_int state)
  406. {
  407. unsigned long flags;
  408. local_irq_save(flags);
  409. /*
  410. * We need to handle two requests being made at the same time.
  411. * There are two important cases:
  412. * 1. When we are changing VT (C_REENABLE) while unblanking (C_ENABLE)
  413. * We must perform the unblanking, which will do our REENABLE for us.
  414. * 2. When we are blanking, but immediately unblank before we have
  415. * blanked. We do the "REENABLE" thing here as well, just to be sure.
  416. */
  417. if (fbi->task_state == C_ENABLE && state == C_REENABLE)
  418. state = (u_int) -1;
  419. if (fbi->task_state == C_DISABLE && state == C_ENABLE)
  420. state = C_REENABLE;
  421. if (state != (u_int)-1) {
  422. fbi->task_state = state;
  423. schedule_work(&fbi->task);
  424. }
  425. local_irq_restore(flags);
  426. }
  427. static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
  428. {
  429. chan &= 0xffff;
  430. chan >>= 16 - bf->length;
  431. return chan << bf->offset;
  432. }
  433. /*
  434. * Convert bits-per-pixel to a hardware palette PBS value.
  435. */
  436. static inline u_int palette_pbs(struct fb_var_screeninfo *var)
  437. {
  438. int ret = 0;
  439. switch (var->bits_per_pixel) {
  440. case 4: ret = 0 << 12; break;
  441. case 8: ret = 1 << 12; break;
  442. case 16: ret = 2 << 12; break;
  443. }
  444. return ret;
  445. }
  446. static int
  447. sa1100fb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue,
  448. u_int trans, struct fb_info *info)
  449. {
  450. struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
  451. u_int val, ret = 1;
  452. if (regno < fbi->palette_size) {
  453. val = ((red >> 4) & 0xf00);
  454. val |= ((green >> 8) & 0x0f0);
  455. val |= ((blue >> 12) & 0x00f);
  456. if (regno == 0)
  457. val |= palette_pbs(&fbi->fb.var);
  458. fbi->palette_cpu[regno] = val;
  459. ret = 0;
  460. }
  461. return ret;
  462. }
  463. static int
  464. sa1100fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
  465. u_int trans, struct fb_info *info)
  466. {
  467. struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
  468. unsigned int val;
  469. int ret = 1;
  470. /*
  471. * If inverse mode was selected, invert all the colours
  472. * rather than the register number. The register number
  473. * is what you poke into the framebuffer to produce the
  474. * colour you requested.
  475. */
  476. if (fbi->cmap_inverse) {
  477. red = 0xffff - red;
  478. green = 0xffff - green;
  479. blue = 0xffff - blue;
  480. }
  481. /*
  482. * If greyscale is true, then we convert the RGB value
  483. * to greyscale no mater what visual we are using.
  484. */
  485. if (fbi->fb.var.grayscale)
  486. red = green = blue = (19595 * red + 38470 * green +
  487. 7471 * blue) >> 16;
  488. switch (fbi->fb.fix.visual) {
  489. case FB_VISUAL_TRUECOLOR:
  490. /*
  491. * 12 or 16-bit True Colour. We encode the RGB value
  492. * according to the RGB bitfield information.
  493. */
  494. if (regno < 16) {
  495. u32 *pal = fbi->fb.pseudo_palette;
  496. val = chan_to_field(red, &fbi->fb.var.red);
  497. val |= chan_to_field(green, &fbi->fb.var.green);
  498. val |= chan_to_field(blue, &fbi->fb.var.blue);
  499. pal[regno] = val;
  500. ret = 0;
  501. }
  502. break;
  503. case FB_VISUAL_STATIC_PSEUDOCOLOR:
  504. case FB_VISUAL_PSEUDOCOLOR:
  505. ret = sa1100fb_setpalettereg(regno, red, green, blue, trans, info);
  506. break;
  507. }
  508. return ret;
  509. }
  510. #ifdef CONFIG_CPU_FREQ
  511. /*
  512. * sa1100fb_display_dma_period()
  513. * Calculate the minimum period (in picoseconds) between two DMA
  514. * requests for the LCD controller. If we hit this, it means we're
  515. * doing nothing but LCD DMA.
  516. */
  517. static inline unsigned int sa1100fb_display_dma_period(struct fb_var_screeninfo *var)
  518. {
  519. /*
  520. * Period = pixclock * bits_per_byte * bytes_per_transfer
  521. * / memory_bits_per_pixel;
  522. */
  523. return var->pixclock * 8 * 16 / var->bits_per_pixel;
  524. }
  525. #endif
  526. /*
  527. * sa1100fb_check_var():
  528. * Round up in the following order: bits_per_pixel, xres,
  529. * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale,
  530. * bitfields, horizontal timing, vertical timing.
  531. */
  532. static int
  533. sa1100fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
  534. {
  535. struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
  536. int rgbidx;
  537. if (var->xres < MIN_XRES)
  538. var->xres = MIN_XRES;
  539. if (var->yres < MIN_YRES)
  540. var->yres = MIN_YRES;
  541. if (var->xres > fbi->max_xres)
  542. var->xres = fbi->max_xres;
  543. if (var->yres > fbi->max_yres)
  544. var->yres = fbi->max_yres;
  545. var->xres_virtual = max(var->xres_virtual, var->xres);
  546. var->yres_virtual = max(var->yres_virtual, var->yres);
  547. DPRINTK("var->bits_per_pixel=%d\n", var->bits_per_pixel);
  548. switch (var->bits_per_pixel) {
  549. case 4:
  550. rgbidx = RGB_4;
  551. break;
  552. case 8:
  553. rgbidx = RGB_8;
  554. break;
  555. case 16:
  556. rgbidx = RGB_16;
  557. break;
  558. default:
  559. return -EINVAL;
  560. }
  561. /*
  562. * Copy the RGB parameters for this display
  563. * from the machine specific parameters.
  564. */
  565. var->red = fbi->rgb[rgbidx]->red;
  566. var->green = fbi->rgb[rgbidx]->green;
  567. var->blue = fbi->rgb[rgbidx]->blue;
  568. var->transp = fbi->rgb[rgbidx]->transp;
  569. DPRINTK("RGBT length = %d:%d:%d:%d\n",
  570. var->red.length, var->green.length, var->blue.length,
  571. var->transp.length);
  572. DPRINTK("RGBT offset = %d:%d:%d:%d\n",
  573. var->red.offset, var->green.offset, var->blue.offset,
  574. var->transp.offset);
  575. #ifdef CONFIG_CPU_FREQ
  576. printk(KERN_DEBUG "dma period = %d ps, clock = %d kHz\n",
  577. sa1100fb_display_dma_period(var),
  578. cpufreq_get(smp_processor_id()));
  579. #endif
  580. return 0;
  581. }
  582. static inline void sa1100fb_set_truecolor(u_int is_true_color)
  583. {
  584. if (machine_is_assabet()) {
  585. #if 1 // phase 4 or newer Assabet's
  586. if (is_true_color)
  587. ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
  588. else
  589. ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
  590. #else
  591. // older Assabet's
  592. if (is_true_color)
  593. ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
  594. else
  595. ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
  596. #endif
  597. }
  598. }
  599. /*
  600. * sa1100fb_set_par():
  601. * Set the user defined part of the display for the specified console
  602. */
  603. static int sa1100fb_set_par(struct fb_info *info)
  604. {
  605. struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
  606. struct fb_var_screeninfo *var = &info->var;
  607. unsigned long palette_mem_size;
  608. DPRINTK("set_par\n");
  609. if (var->bits_per_pixel == 16)
  610. fbi->fb.fix.visual = FB_VISUAL_TRUECOLOR;
  611. else if (!fbi->cmap_static)
  612. fbi->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
  613. else {
  614. /*
  615. * Some people have weird ideas about wanting static
  616. * pseudocolor maps. I suspect their user space
  617. * applications are broken.
  618. */
  619. fbi->fb.fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR;
  620. }
  621. fbi->fb.fix.line_length = var->xres_virtual *
  622. var->bits_per_pixel / 8;
  623. fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16;
  624. palette_mem_size = fbi->palette_size * sizeof(u16);
  625. DPRINTK("palette_mem_size = 0x%08lx\n", (u_long) palette_mem_size);
  626. fbi->palette_cpu = (u16 *)(fbi->map_cpu + PAGE_SIZE - palette_mem_size);
  627. fbi->palette_dma = fbi->map_dma + PAGE_SIZE - palette_mem_size;
  628. /*
  629. * Set (any) board control register to handle new color depth
  630. */
  631. sa1100fb_set_truecolor(fbi->fb.fix.visual == FB_VISUAL_TRUECOLOR);
  632. sa1100fb_activate_var(var, fbi);
  633. return 0;
  634. }
  635. #if 0
  636. static int
  637. sa1100fb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
  638. struct fb_info *info)
  639. {
  640. struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
  641. /*
  642. * Make sure the user isn't doing something stupid.
  643. */
  644. if (!kspc && (fbi->fb.var.bits_per_pixel == 16 || fbi->cmap_static))
  645. return -EINVAL;
  646. return gen_set_cmap(cmap, kspc, con, info);
  647. }
  648. #endif
  649. /*
  650. * Formal definition of the VESA spec:
  651. * On
  652. * This refers to the state of the display when it is in full operation
  653. * Stand-By
  654. * This defines an optional operating state of minimal power reduction with
  655. * the shortest recovery time
  656. * Suspend
  657. * This refers to a level of power management in which substantial power
  658. * reduction is achieved by the display. The display can have a longer
  659. * recovery time from this state than from the Stand-by state
  660. * Off
  661. * This indicates that the display is consuming the lowest level of power
  662. * and is non-operational. Recovery from this state may optionally require
  663. * the user to manually power on the monitor
  664. *
  665. * Now, the fbdev driver adds an additional state, (blank), where they
  666. * turn off the video (maybe by colormap tricks), but don't mess with the
  667. * video itself: think of it semantically between on and Stand-By.
  668. *
  669. * So here's what we should do in our fbdev blank routine:
  670. *
  671. * VESA_NO_BLANKING (mode 0) Video on, front/back light on
  672. * VESA_VSYNC_SUSPEND (mode 1) Video on, front/back light off
  673. * VESA_HSYNC_SUSPEND (mode 2) Video on, front/back light off
  674. * VESA_POWERDOWN (mode 3) Video off, front/back light off
  675. *
  676. * This will match the matrox implementation.
  677. */
  678. /*
  679. * sa1100fb_blank():
  680. * Blank the display by setting all palette values to zero. Note, the
  681. * 12 and 16 bpp modes don't really use the palette, so this will not
  682. * blank the display in all modes.
  683. */
  684. static int sa1100fb_blank(int blank, struct fb_info *info)
  685. {
  686. struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
  687. int i;
  688. DPRINTK("sa1100fb_blank: blank=%d\n", blank);
  689. switch (blank) {
  690. case FB_BLANK_POWERDOWN:
  691. case FB_BLANK_VSYNC_SUSPEND:
  692. case FB_BLANK_HSYNC_SUSPEND:
  693. case FB_BLANK_NORMAL:
  694. if (fbi->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR ||
  695. fbi->fb.fix.visual == FB_VISUAL_STATIC_PSEUDOCOLOR)
  696. for (i = 0; i < fbi->palette_size; i++)
  697. sa1100fb_setpalettereg(i, 0, 0, 0, 0, info);
  698. sa1100fb_schedule_work(fbi, C_DISABLE);
  699. break;
  700. case FB_BLANK_UNBLANK:
  701. if (fbi->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR ||
  702. fbi->fb.fix.visual == FB_VISUAL_STATIC_PSEUDOCOLOR)
  703. fb_set_cmap(&fbi->fb.cmap, info);
  704. sa1100fb_schedule_work(fbi, C_ENABLE);
  705. }
  706. return 0;
  707. }
  708. static int sa1100fb_mmap(struct fb_info *info,
  709. struct vm_area_struct *vma)
  710. {
  711. struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
  712. unsigned long start, len, off = vma->vm_pgoff << PAGE_SHIFT;
  713. if (off < info->fix.smem_len) {
  714. vma->vm_pgoff += 1; /* skip over the palette */
  715. return dma_mmap_writecombine(fbi->dev, vma, fbi->map_cpu,
  716. fbi->map_dma, fbi->map_size);
  717. }
  718. start = info->fix.mmio_start;
  719. len = PAGE_ALIGN((start & ~PAGE_MASK) + info->fix.mmio_len);
  720. if ((vma->vm_end - vma->vm_start + off) > len)
  721. return -EINVAL;
  722. off += start & PAGE_MASK;
  723. vma->vm_pgoff = off >> PAGE_SHIFT;
  724. vma->vm_flags |= VM_IO;
  725. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  726. return io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT,
  727. vma->vm_end - vma->vm_start,
  728. vma->vm_page_prot);
  729. }
  730. static struct fb_ops sa1100fb_ops = {
  731. .owner = THIS_MODULE,
  732. .fb_check_var = sa1100fb_check_var,
  733. .fb_set_par = sa1100fb_set_par,
  734. // .fb_set_cmap = sa1100fb_set_cmap,
  735. .fb_setcolreg = sa1100fb_setcolreg,
  736. .fb_fillrect = cfb_fillrect,
  737. .fb_copyarea = cfb_copyarea,
  738. .fb_imageblit = cfb_imageblit,
  739. .fb_blank = sa1100fb_blank,
  740. .fb_mmap = sa1100fb_mmap,
  741. };
  742. /*
  743. * Calculate the PCD value from the clock rate (in picoseconds).
  744. * We take account of the PPCR clock setting.
  745. */
  746. static inline unsigned int get_pcd(unsigned int pixclock, unsigned int cpuclock)
  747. {
  748. unsigned int pcd = cpuclock / 100;
  749. pcd *= pixclock;
  750. pcd /= 10000000;
  751. return pcd + 1; /* make up for integer math truncations */
  752. }
  753. /*
  754. * sa1100fb_activate_var():
  755. * Configures LCD Controller based on entries in var parameter. Settings are
  756. * only written to the controller if changes were made.
  757. */
  758. static int sa1100fb_activate_var(struct fb_var_screeninfo *var, struct sa1100fb_info *fbi)
  759. {
  760. struct sa1100fb_lcd_reg new_regs;
  761. u_int half_screen_size, yres, pcd;
  762. u_long flags;
  763. DPRINTK("Configuring SA1100 LCD\n");
  764. DPRINTK("var: xres=%d hslen=%d lm=%d rm=%d\n",
  765. var->xres, var->hsync_len,
  766. var->left_margin, var->right_margin);
  767. DPRINTK("var: yres=%d vslen=%d um=%d bm=%d\n",
  768. var->yres, var->vsync_len,
  769. var->upper_margin, var->lower_margin);
  770. #if DEBUG_VAR
  771. if (var->xres < 16 || var->xres > 1024)
  772. printk(KERN_ERR "%s: invalid xres %d\n",
  773. fbi->fb.fix.id, var->xres);
  774. if (var->hsync_len < 1 || var->hsync_len > 64)
  775. printk(KERN_ERR "%s: invalid hsync_len %d\n",
  776. fbi->fb.fix.id, var->hsync_len);
  777. if (var->left_margin < 1 || var->left_margin > 255)
  778. printk(KERN_ERR "%s: invalid left_margin %d\n",
  779. fbi->fb.fix.id, var->left_margin);
  780. if (var->right_margin < 1 || var->right_margin > 255)
  781. printk(KERN_ERR "%s: invalid right_margin %d\n",
  782. fbi->fb.fix.id, var->right_margin);
  783. if (var->yres < 1 || var->yres > 1024)
  784. printk(KERN_ERR "%s: invalid yres %d\n",
  785. fbi->fb.fix.id, var->yres);
  786. if (var->vsync_len < 1 || var->vsync_len > 64)
  787. printk(KERN_ERR "%s: invalid vsync_len %d\n",
  788. fbi->fb.fix.id, var->vsync_len);
  789. if (var->upper_margin < 0 || var->upper_margin > 255)
  790. printk(KERN_ERR "%s: invalid upper_margin %d\n",
  791. fbi->fb.fix.id, var->upper_margin);
  792. if (var->lower_margin < 0 || var->lower_margin > 255)
  793. printk(KERN_ERR "%s: invalid lower_margin %d\n",
  794. fbi->fb.fix.id, var->lower_margin);
  795. #endif
  796. new_regs.lccr0 = fbi->lccr0 |
  797. LCCR0_LEN | LCCR0_LDM | LCCR0_BAM |
  798. LCCR0_ERM | LCCR0_LtlEnd | LCCR0_DMADel(0);
  799. new_regs.lccr1 =
  800. LCCR1_DisWdth(var->xres) +
  801. LCCR1_HorSnchWdth(var->hsync_len) +
  802. LCCR1_BegLnDel(var->left_margin) +
  803. LCCR1_EndLnDel(var->right_margin);
  804. /*
  805. * If we have a dual scan LCD, then we need to halve
  806. * the YRES parameter.
  807. */
  808. yres = var->yres;
  809. if (fbi->lccr0 & LCCR0_Dual)
  810. yres /= 2;
  811. new_regs.lccr2 =
  812. LCCR2_DisHght(yres) +
  813. LCCR2_VrtSnchWdth(var->vsync_len) +
  814. LCCR2_BegFrmDel(var->upper_margin) +
  815. LCCR2_EndFrmDel(var->lower_margin);
  816. pcd = get_pcd(var->pixclock, cpufreq_get(0));
  817. new_regs.lccr3 = LCCR3_PixClkDiv(pcd) | fbi->lccr3 |
  818. (var->sync & FB_SYNC_HOR_HIGH_ACT ? LCCR3_HorSnchH : LCCR3_HorSnchL) |
  819. (var->sync & FB_SYNC_VERT_HIGH_ACT ? LCCR3_VrtSnchH : LCCR3_VrtSnchL);
  820. DPRINTK("nlccr0 = 0x%08lx\n", new_regs.lccr0);
  821. DPRINTK("nlccr1 = 0x%08lx\n", new_regs.lccr1);
  822. DPRINTK("nlccr2 = 0x%08lx\n", new_regs.lccr2);
  823. DPRINTK("nlccr3 = 0x%08lx\n", new_regs.lccr3);
  824. half_screen_size = var->bits_per_pixel;
  825. half_screen_size = half_screen_size * var->xres * var->yres / 16;
  826. /* Update shadow copy atomically */
  827. local_irq_save(flags);
  828. fbi->dbar1 = fbi->palette_dma;
  829. fbi->dbar2 = fbi->screen_dma + half_screen_size;
  830. fbi->reg_lccr0 = new_regs.lccr0;
  831. fbi->reg_lccr1 = new_regs.lccr1;
  832. fbi->reg_lccr2 = new_regs.lccr2;
  833. fbi->reg_lccr3 = new_regs.lccr3;
  834. local_irq_restore(flags);
  835. /*
  836. * Only update the registers if the controller is enabled
  837. * and something has changed.
  838. */
  839. if ((LCCR0 != fbi->reg_lccr0) || (LCCR1 != fbi->reg_lccr1) ||
  840. (LCCR2 != fbi->reg_lccr2) || (LCCR3 != fbi->reg_lccr3) ||
  841. (DBAR1 != fbi->dbar1) || (DBAR2 != fbi->dbar2))
  842. sa1100fb_schedule_work(fbi, C_REENABLE);
  843. return 0;
  844. }
  845. /*
  846. * NOTE! The following functions are purely helpers for set_ctrlr_state.
  847. * Do not call them directly; set_ctrlr_state does the correct serialisation
  848. * to ensure that things happen in the right way 100% of time time.
  849. * -- rmk
  850. */
  851. static inline void __sa1100fb_backlight_power(struct sa1100fb_info *fbi, int on)
  852. {
  853. DPRINTK("backlight o%s\n", on ? "n" : "ff");
  854. if (sa1100fb_backlight_power)
  855. sa1100fb_backlight_power(on);
  856. }
  857. static inline void __sa1100fb_lcd_power(struct sa1100fb_info *fbi, int on)
  858. {
  859. DPRINTK("LCD power o%s\n", on ? "n" : "ff");
  860. if (sa1100fb_lcd_power)
  861. sa1100fb_lcd_power(on);
  862. }
  863. static void sa1100fb_setup_gpio(struct sa1100fb_info *fbi)
  864. {
  865. u_int mask = 0;
  866. /*
  867. * Enable GPIO<9:2> for LCD use if:
  868. * 1. Active display, or
  869. * 2. Color Dual Passive display
  870. *
  871. * see table 11.8 on page 11-27 in the SA1100 manual
  872. * -- Erik.
  873. *
  874. * SA1110 spec update nr. 25 says we can and should
  875. * clear LDD15 to 12 for 4 or 8bpp modes with active
  876. * panels.
  877. */
  878. if ((fbi->reg_lccr0 & LCCR0_CMS) == LCCR0_Color &&
  879. (fbi->reg_lccr0 & (LCCR0_Dual|LCCR0_Act)) != 0) {
  880. mask = GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8;
  881. if (fbi->fb.var.bits_per_pixel > 8 ||
  882. (fbi->reg_lccr0 & (LCCR0_Dual|LCCR0_Act)) == LCCR0_Dual)
  883. mask |= GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12;
  884. }
  885. if (mask) {
  886. GPDR |= mask;
  887. GAFR |= mask;
  888. }
  889. }
  890. static void sa1100fb_enable_controller(struct sa1100fb_info *fbi)
  891. {
  892. DPRINTK("Enabling LCD controller\n");
  893. /*
  894. * Make sure the mode bits are present in the first palette entry
  895. */
  896. fbi->palette_cpu[0] &= 0xcfff;
  897. fbi->palette_cpu[0] |= palette_pbs(&fbi->fb.var);
  898. /* Sequence from 11.7.10 */
  899. LCCR3 = fbi->reg_lccr3;
  900. LCCR2 = fbi->reg_lccr2;
  901. LCCR1 = fbi->reg_lccr1;
  902. LCCR0 = fbi->reg_lccr0 & ~LCCR0_LEN;
  903. DBAR1 = fbi->dbar1;
  904. DBAR2 = fbi->dbar2;
  905. LCCR0 |= LCCR0_LEN;
  906. if (machine_is_shannon()) {
  907. GPDR |= SHANNON_GPIO_DISP_EN;
  908. GPSR |= SHANNON_GPIO_DISP_EN;
  909. }
  910. DPRINTK("DBAR1 = 0x%08x\n", DBAR1);
  911. DPRINTK("DBAR2 = 0x%08x\n", DBAR2);
  912. DPRINTK("LCCR0 = 0x%08x\n", LCCR0);
  913. DPRINTK("LCCR1 = 0x%08x\n", LCCR1);
  914. DPRINTK("LCCR2 = 0x%08x\n", LCCR2);
  915. DPRINTK("LCCR3 = 0x%08x\n", LCCR3);
  916. }
  917. static void sa1100fb_disable_controller(struct sa1100fb_info *fbi)
  918. {
  919. DECLARE_WAITQUEUE(wait, current);
  920. DPRINTK("Disabling LCD controller\n");
  921. if (machine_is_shannon()) {
  922. GPCR |= SHANNON_GPIO_DISP_EN;
  923. }
  924. set_current_state(TASK_UNINTERRUPTIBLE);
  925. add_wait_queue(&fbi->ctrlr_wait, &wait);
  926. LCSR = 0xffffffff; /* Clear LCD Status Register */
  927. LCCR0 &= ~LCCR0_LDM; /* Enable LCD Disable Done Interrupt */
  928. LCCR0 &= ~LCCR0_LEN; /* Disable LCD Controller */
  929. schedule_timeout(20 * HZ / 1000);
  930. remove_wait_queue(&fbi->ctrlr_wait, &wait);
  931. }
  932. /*
  933. * sa1100fb_handle_irq: Handle 'LCD DONE' interrupts.
  934. */
  935. static irqreturn_t sa1100fb_handle_irq(int irq, void *dev_id)
  936. {
  937. struct sa1100fb_info *fbi = dev_id;
  938. unsigned int lcsr = LCSR;
  939. if (lcsr & LCSR_LDD) {
  940. LCCR0 |= LCCR0_LDM;
  941. wake_up(&fbi->ctrlr_wait);
  942. }
  943. LCSR = lcsr;
  944. return IRQ_HANDLED;
  945. }
  946. /*
  947. * This function must be called from task context only, since it will
  948. * sleep when disabling the LCD controller, or if we get two contending
  949. * processes trying to alter state.
  950. */
  951. static void set_ctrlr_state(struct sa1100fb_info *fbi, u_int state)
  952. {
  953. u_int old_state;
  954. mutex_lock(&fbi->ctrlr_lock);
  955. old_state = fbi->state;
  956. /*
  957. * Hack around fbcon initialisation.
  958. */
  959. if (old_state == C_STARTUP && state == C_REENABLE)
  960. state = C_ENABLE;
  961. switch (state) {
  962. case C_DISABLE_CLKCHANGE:
  963. /*
  964. * Disable controller for clock change. If the
  965. * controller is already disabled, then do nothing.
  966. */
  967. if (old_state != C_DISABLE && old_state != C_DISABLE_PM) {
  968. fbi->state = state;
  969. sa1100fb_disable_controller(fbi);
  970. }
  971. break;
  972. case C_DISABLE_PM:
  973. case C_DISABLE:
  974. /*
  975. * Disable controller
  976. */
  977. if (old_state != C_DISABLE) {
  978. fbi->state = state;
  979. __sa1100fb_backlight_power(fbi, 0);
  980. if (old_state != C_DISABLE_CLKCHANGE)
  981. sa1100fb_disable_controller(fbi);
  982. __sa1100fb_lcd_power(fbi, 0);
  983. }
  984. break;
  985. case C_ENABLE_CLKCHANGE:
  986. /*
  987. * Enable the controller after clock change. Only
  988. * do this if we were disabled for the clock change.
  989. */
  990. if (old_state == C_DISABLE_CLKCHANGE) {
  991. fbi->state = C_ENABLE;
  992. sa1100fb_enable_controller(fbi);
  993. }
  994. break;
  995. case C_REENABLE:
  996. /*
  997. * Re-enable the controller only if it was already
  998. * enabled. This is so we reprogram the control
  999. * registers.
  1000. */
  1001. if (old_state == C_ENABLE) {
  1002. sa1100fb_disable_controller(fbi);
  1003. sa1100fb_setup_gpio(fbi);
  1004. sa1100fb_enable_controller(fbi);
  1005. }
  1006. break;
  1007. case C_ENABLE_PM:
  1008. /*
  1009. * Re-enable the controller after PM. This is not
  1010. * perfect - think about the case where we were doing
  1011. * a clock change, and we suspended half-way through.
  1012. */
  1013. if (old_state != C_DISABLE_PM)
  1014. break;
  1015. /* fall through */
  1016. case C_ENABLE:
  1017. /*
  1018. * Power up the LCD screen, enable controller, and
  1019. * turn on the backlight.
  1020. */
  1021. if (old_state != C_ENABLE) {
  1022. fbi->state = C_ENABLE;
  1023. sa1100fb_setup_gpio(fbi);
  1024. __sa1100fb_lcd_power(fbi, 1);
  1025. sa1100fb_enable_controller(fbi);
  1026. __sa1100fb_backlight_power(fbi, 1);
  1027. }
  1028. break;
  1029. }
  1030. mutex_unlock(&fbi->ctrlr_lock);
  1031. }
  1032. /*
  1033. * Our LCD controller task (which is called when we blank or unblank)
  1034. * via keventd.
  1035. */
  1036. static void sa1100fb_task(struct work_struct *w)
  1037. {
  1038. struct sa1100fb_info *fbi = container_of(w, struct sa1100fb_info, task);
  1039. u_int state = xchg(&fbi->task_state, -1);
  1040. set_ctrlr_state(fbi, state);
  1041. }
  1042. #ifdef CONFIG_CPU_FREQ
  1043. /*
  1044. * Calculate the minimum DMA period over all displays that we own.
  1045. * This, together with the SDRAM bandwidth defines the slowest CPU
  1046. * frequency that can be selected.
  1047. */
  1048. static unsigned int sa1100fb_min_dma_period(struct sa1100fb_info *fbi)
  1049. {
  1050. #if 0
  1051. unsigned int min_period = (unsigned int)-1;
  1052. int i;
  1053. for (i = 0; i < MAX_NR_CONSOLES; i++) {
  1054. struct display *disp = &fb_display[i];
  1055. unsigned int period;
  1056. /*
  1057. * Do we own this display?
  1058. */
  1059. if (disp->fb_info != &fbi->fb)
  1060. continue;
  1061. /*
  1062. * Ok, calculate its DMA period
  1063. */
  1064. period = sa1100fb_display_dma_period(&disp->var);
  1065. if (period < min_period)
  1066. min_period = period;
  1067. }
  1068. return min_period;
  1069. #else
  1070. /*
  1071. * FIXME: we need to verify _all_ consoles.
  1072. */
  1073. return sa1100fb_display_dma_period(&fbi->fb.var);
  1074. #endif
  1075. }
  1076. /*
  1077. * CPU clock speed change handler. We need to adjust the LCD timing
  1078. * parameters when the CPU clock is adjusted by the power management
  1079. * subsystem.
  1080. */
  1081. static int
  1082. sa1100fb_freq_transition(struct notifier_block *nb, unsigned long val,
  1083. void *data)
  1084. {
  1085. struct sa1100fb_info *fbi = TO_INF(nb, freq_transition);
  1086. struct cpufreq_freqs *f = data;
  1087. u_int pcd;
  1088. switch (val) {
  1089. case CPUFREQ_PRECHANGE:
  1090. set_ctrlr_state(fbi, C_DISABLE_CLKCHANGE);
  1091. break;
  1092. case CPUFREQ_POSTCHANGE:
  1093. pcd = get_pcd(fbi->fb.var.pixclock, f->new);
  1094. fbi->reg_lccr3 = (fbi->reg_lccr3 & ~0xff) | LCCR3_PixClkDiv(pcd);
  1095. set_ctrlr_state(fbi, C_ENABLE_CLKCHANGE);
  1096. break;
  1097. }
  1098. return 0;
  1099. }
  1100. static int
  1101. sa1100fb_freq_policy(struct notifier_block *nb, unsigned long val,
  1102. void *data)
  1103. {
  1104. struct sa1100fb_info *fbi = TO_INF(nb, freq_policy);
  1105. struct cpufreq_policy *policy = data;
  1106. switch (val) {
  1107. case CPUFREQ_ADJUST:
  1108. case CPUFREQ_INCOMPATIBLE:
  1109. printk(KERN_DEBUG "min dma period: %d ps, "
  1110. "new clock %d kHz\n", sa1100fb_min_dma_period(fbi),
  1111. policy->max);
  1112. /* todo: fill in min/max values */
  1113. break;
  1114. case CPUFREQ_NOTIFY:
  1115. do {} while(0);
  1116. /* todo: panic if min/max values aren't fulfilled
  1117. * [can't really happen unless there's a bug in the
  1118. * CPU policy verififcation process *
  1119. */
  1120. break;
  1121. }
  1122. return 0;
  1123. }
  1124. #endif
  1125. #ifdef CONFIG_PM
  1126. /*
  1127. * Power management hooks. Note that we won't be called from IRQ context,
  1128. * unlike the blank functions above, so we may sleep.
  1129. */
  1130. static int sa1100fb_suspend(struct platform_device *dev, pm_message_t state)
  1131. {
  1132. struct sa1100fb_info *fbi = platform_get_drvdata(dev);
  1133. set_ctrlr_state(fbi, C_DISABLE_PM);
  1134. return 0;
  1135. }
  1136. static int sa1100fb_resume(struct platform_device *dev)
  1137. {
  1138. struct sa1100fb_info *fbi = platform_get_drvdata(dev);
  1139. set_ctrlr_state(fbi, C_ENABLE_PM);
  1140. return 0;
  1141. }
  1142. #else
  1143. #define sa1100fb_suspend NULL
  1144. #define sa1100fb_resume NULL
  1145. #endif
  1146. /*
  1147. * sa1100fb_map_video_memory():
  1148. * Allocates the DRAM memory for the frame buffer. This buffer is
  1149. * remapped into a non-cached, non-buffered, memory region to
  1150. * allow palette and pixel writes to occur without flushing the
  1151. * cache. Once this area is remapped, all virtual memory
  1152. * access to the video memory should occur at the new region.
  1153. */
  1154. static int __init sa1100fb_map_video_memory(struct sa1100fb_info *fbi)
  1155. {
  1156. /*
  1157. * We reserve one page for the palette, plus the size
  1158. * of the framebuffer.
  1159. */
  1160. fbi->map_size = PAGE_ALIGN(fbi->fb.fix.smem_len + PAGE_SIZE);
  1161. fbi->map_cpu = dma_alloc_writecombine(fbi->dev, fbi->map_size,
  1162. &fbi->map_dma, GFP_KERNEL);
  1163. if (fbi->map_cpu) {
  1164. fbi->fb.screen_base = fbi->map_cpu + PAGE_SIZE;
  1165. fbi->screen_dma = fbi->map_dma + PAGE_SIZE;
  1166. /*
  1167. * FIXME: this is actually the wrong thing to place in
  1168. * smem_start. But fbdev suffers from the problem that
  1169. * it needs an API which doesn't exist (in this case,
  1170. * dma_writecombine_mmap)
  1171. */
  1172. fbi->fb.fix.smem_start = fbi->screen_dma;
  1173. }
  1174. return fbi->map_cpu ? 0 : -ENOMEM;
  1175. }
  1176. /* Fake monspecs to fill in fbinfo structure */
  1177. static struct fb_monspecs monspecs __initdata = {
  1178. .hfmin = 30000,
  1179. .hfmax = 70000,
  1180. .vfmin = 50,
  1181. .vfmax = 65,
  1182. };
  1183. static struct sa1100fb_info * __init sa1100fb_init_fbinfo(struct device *dev)
  1184. {
  1185. struct sa1100fb_mach_info *inf;
  1186. struct sa1100fb_info *fbi;
  1187. fbi = kmalloc(sizeof(struct sa1100fb_info) + sizeof(u32) * 16,
  1188. GFP_KERNEL);
  1189. if (!fbi)
  1190. return NULL;
  1191. memset(fbi, 0, sizeof(struct sa1100fb_info));
  1192. fbi->dev = dev;
  1193. strcpy(fbi->fb.fix.id, SA1100_NAME);
  1194. fbi->fb.fix.type = FB_TYPE_PACKED_PIXELS;
  1195. fbi->fb.fix.type_aux = 0;
  1196. fbi->fb.fix.xpanstep = 0;
  1197. fbi->fb.fix.ypanstep = 0;
  1198. fbi->fb.fix.ywrapstep = 0;
  1199. fbi->fb.fix.accel = FB_ACCEL_NONE;
  1200. fbi->fb.var.nonstd = 0;
  1201. fbi->fb.var.activate = FB_ACTIVATE_NOW;
  1202. fbi->fb.var.height = -1;
  1203. fbi->fb.var.width = -1;
  1204. fbi->fb.var.accel_flags = 0;
  1205. fbi->fb.var.vmode = FB_VMODE_NONINTERLACED;
  1206. fbi->fb.fbops = &sa1100fb_ops;
  1207. fbi->fb.flags = FBINFO_DEFAULT;
  1208. fbi->fb.monspecs = monspecs;
  1209. fbi->fb.pseudo_palette = (fbi + 1);
  1210. fbi->rgb[RGB_4] = &rgb_4;
  1211. fbi->rgb[RGB_8] = &rgb_8;
  1212. fbi->rgb[RGB_16] = &def_rgb_16;
  1213. inf = sa1100fb_get_machine_info(fbi);
  1214. /*
  1215. * People just don't seem to get this. We don't support
  1216. * anything but correct entries now, so panic if someone
  1217. * does something stupid.
  1218. */
  1219. if (inf->lccr3 & (LCCR3_VrtSnchL|LCCR3_HorSnchL|0xff) ||
  1220. inf->pixclock == 0)
  1221. panic("sa1100fb error: invalid LCCR3 fields set or zero "
  1222. "pixclock.");
  1223. fbi->max_xres = inf->xres;
  1224. fbi->fb.var.xres = inf->xres;
  1225. fbi->fb.var.xres_virtual = inf->xres;
  1226. fbi->max_yres = inf->yres;
  1227. fbi->fb.var.yres = inf->yres;
  1228. fbi->fb.var.yres_virtual = inf->yres;
  1229. fbi->max_bpp = inf->bpp;
  1230. fbi->fb.var.bits_per_pixel = inf->bpp;
  1231. fbi->fb.var.pixclock = inf->pixclock;
  1232. fbi->fb.var.hsync_len = inf->hsync_len;
  1233. fbi->fb.var.left_margin = inf->left_margin;
  1234. fbi->fb.var.right_margin = inf->right_margin;
  1235. fbi->fb.var.vsync_len = inf->vsync_len;
  1236. fbi->fb.var.upper_margin = inf->upper_margin;
  1237. fbi->fb.var.lower_margin = inf->lower_margin;
  1238. fbi->fb.var.sync = inf->sync;
  1239. fbi->fb.var.grayscale = inf->cmap_greyscale;
  1240. fbi->cmap_inverse = inf->cmap_inverse;
  1241. fbi->cmap_static = inf->cmap_static;
  1242. fbi->lccr0 = inf->lccr0;
  1243. fbi->lccr3 = inf->lccr3;
  1244. fbi->state = C_STARTUP;
  1245. fbi->task_state = (u_char)-1;
  1246. fbi->fb.fix.smem_len = fbi->max_xres * fbi->max_yres *
  1247. fbi->max_bpp / 8;
  1248. init_waitqueue_head(&fbi->ctrlr_wait);
  1249. INIT_WORK(&fbi->task, sa1100fb_task);
  1250. mutex_init(&fbi->ctrlr_lock);
  1251. return fbi;
  1252. }
  1253. static int __devinit sa1100fb_probe(struct platform_device *pdev)
  1254. {
  1255. struct sa1100fb_info *fbi;
  1256. int ret, irq;
  1257. irq = platform_get_irq(pdev, 0);
  1258. if (irq < 0)
  1259. return -EINVAL;
  1260. if (!request_mem_region(0xb0100000, 0x10000, "LCD"))
  1261. return -EBUSY;
  1262. fbi = sa1100fb_init_fbinfo(&pdev->dev);
  1263. ret = -ENOMEM;
  1264. if (!fbi)
  1265. goto failed;
  1266. /* Initialize video memory */
  1267. ret = sa1100fb_map_video_memory(fbi);
  1268. if (ret)
  1269. goto failed;
  1270. ret = request_irq(irq, sa1100fb_handle_irq, IRQF_DISABLED,
  1271. "LCD", fbi);
  1272. if (ret) {
  1273. printk(KERN_ERR "sa1100fb: request_irq failed: %d\n", ret);
  1274. goto failed;
  1275. }
  1276. #ifdef ASSABET_PAL_VIDEO
  1277. if (machine_is_assabet())
  1278. ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
  1279. #endif
  1280. /*
  1281. * This makes sure that our colour bitfield
  1282. * descriptors are correctly initialised.
  1283. */
  1284. sa1100fb_check_var(&fbi->fb.var, &fbi->fb);
  1285. platform_set_drvdata(pdev, fbi);
  1286. ret = register_framebuffer(&fbi->fb);
  1287. if (ret < 0)
  1288. goto err_free_irq;
  1289. #ifdef CONFIG_CPU_FREQ
  1290. fbi->freq_transition.notifier_call = sa1100fb_freq_transition;
  1291. fbi->freq_policy.notifier_call = sa1100fb_freq_policy;
  1292. cpufreq_register_notifier(&fbi->freq_transition, CPUFREQ_TRANSITION_NOTIFIER);
  1293. cpufreq_register_notifier(&fbi->freq_policy, CPUFREQ_POLICY_NOTIFIER);
  1294. #endif
  1295. /* This driver cannot be unloaded at the moment */
  1296. return 0;
  1297. err_free_irq:
  1298. free_irq(irq, fbi);
  1299. failed:
  1300. platform_set_drvdata(pdev, NULL);
  1301. kfree(fbi);
  1302. release_mem_region(0xb0100000, 0x10000);
  1303. return ret;
  1304. }
  1305. static struct platform_driver sa1100fb_driver = {
  1306. .probe = sa1100fb_probe,
  1307. .suspend = sa1100fb_suspend,
  1308. .resume = sa1100fb_resume,
  1309. .driver = {
  1310. .name = "sa11x0-fb",
  1311. },
  1312. };
  1313. int __init sa1100fb_init(void)
  1314. {
  1315. if (fb_get_options("sa1100fb", NULL))
  1316. return -ENODEV;
  1317. return platform_driver_register(&sa1100fb_driver);
  1318. }
  1319. int __init sa1100fb_setup(char *options)
  1320. {
  1321. #if 0
  1322. char *this_opt;
  1323. if (!options || !*options)
  1324. return 0;
  1325. while ((this_opt = strsep(&options, ",")) != NULL) {
  1326. if (!strncmp(this_opt, "bpp:", 4))
  1327. current_par.max_bpp =
  1328. simple_strtoul(this_opt + 4, NULL, 0);
  1329. if (!strncmp(this_opt, "lccr0:", 6))
  1330. lcd_shadow.lccr0 =
  1331. simple_strtoul(this_opt + 6, NULL, 0);
  1332. if (!strncmp(this_opt, "lccr1:", 6)) {
  1333. lcd_shadow.lccr1 =
  1334. simple_strtoul(this_opt + 6, NULL, 0);
  1335. current_par.max_xres =
  1336. (lcd_shadow.lccr1 & 0x3ff) + 16;
  1337. }
  1338. if (!strncmp(this_opt, "lccr2:", 6)) {
  1339. lcd_shadow.lccr2 =
  1340. simple_strtoul(this_opt + 6, NULL, 0);
  1341. current_par.max_yres =
  1342. (lcd_shadow.
  1343. lccr0 & LCCR0_SDS) ? ((lcd_shadow.
  1344. lccr2 & 0x3ff) +
  1345. 1) *
  1346. 2 : ((lcd_shadow.lccr2 & 0x3ff) + 1);
  1347. }
  1348. if (!strncmp(this_opt, "lccr3:", 6))
  1349. lcd_shadow.lccr3 =
  1350. simple_strtoul(this_opt + 6, NULL, 0);
  1351. }
  1352. #endif
  1353. return 0;
  1354. }
  1355. module_init(sa1100fb_init);
  1356. MODULE_DESCRIPTION("StrongARM-1100/1110 framebuffer driver");
  1357. MODULE_LICENSE("GPL");