s_bri.c 6.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192
  1. /*
  2. *
  3. Copyright (c) Eicon Networks, 2002.
  4. *
  5. This source file is supplied for the use with
  6. Eicon Networks range of DIVA Server Adapters.
  7. *
  8. Eicon File Revision : 2.1
  9. *
  10. This program is free software; you can redistribute it and/or modify
  11. it under the terms of the GNU General Public License as published by
  12. the Free Software Foundation; either version 2, or (at your option)
  13. any later version.
  14. *
  15. This program is distributed in the hope that it will be useful,
  16. but WITHOUT ANY WARRANTY OF ANY KIND WHATSOEVER INCLUDING ANY
  17. implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  18. See the GNU General Public License for more details.
  19. *
  20. You should have received a copy of the GNU General Public License
  21. along with this program; if not, write to the Free Software
  22. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  23. *
  24. */
  25. #include "platform.h"
  26. #include "di_defs.h"
  27. #include "pc.h"
  28. #include "pr_pc.h"
  29. #include "di.h"
  30. #include "mi_pc.h"
  31. #include "pc_maint.h"
  32. #include "divasync.h"
  33. #include "io.h"
  34. #include "helpers.h"
  35. #include "dsrv_bri.h"
  36. #include "dsp_defs.h"
  37. /*****************************************************************************/
  38. #define MAX_XLOG_SIZE (64 * 1024)
  39. /* --------------------------------------------------------------------------
  40. Investigate card state, recovery trace buffer
  41. -------------------------------------------------------------------------- */
  42. static void bri_cpu_trapped (PISDN_ADAPTER IoAdapter) {
  43. byte __iomem *addrHi, *addrLo, *ioaddr ;
  44. word *Xlog ;
  45. dword regs[4], i, size ;
  46. Xdesc xlogDesc ;
  47. byte __iomem *Port;
  48. /*
  49. * first read pointers and trap frame
  50. */
  51. if ( !(Xlog = (word *)diva_os_malloc (0, MAX_XLOG_SIZE)) )
  52. return ;
  53. Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter);
  54. addrHi = Port + ((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH) ;
  55. addrLo = Port + ADDR ;
  56. ioaddr = Port + DATA ;
  57. outpp (addrHi, 0) ;
  58. outppw (addrLo, 0) ;
  59. for ( i = 0 ; i < 0x100 ; Xlog[i++] = inppw(ioaddr) ) ;
  60. /*
  61. * check for trapped MIPS 3xxx CPU, dump only exception frame
  62. */
  63. if ( GET_DWORD(&Xlog[0x80 / sizeof(Xlog[0])]) == 0x99999999 )
  64. {
  65. dump_trap_frame (IoAdapter, &((byte *)Xlog)[0x90]) ;
  66. IoAdapter->trapped = 1 ;
  67. }
  68. regs[0] = GET_DWORD(&((byte *)Xlog)[0x70]);
  69. regs[1] = GET_DWORD(&((byte *)Xlog)[0x74]);
  70. regs[2] = GET_DWORD(&((byte *)Xlog)[0x78]);
  71. regs[3] = GET_DWORD(&((byte *)Xlog)[0x7c]);
  72. outpp (addrHi, (regs[1] >> 16) & 0x7F) ;
  73. outppw (addrLo, regs[1] & 0xFFFF) ;
  74. xlogDesc.cnt = inppw(ioaddr) ;
  75. outpp (addrHi, (regs[2] >> 16) & 0x7F) ;
  76. outppw (addrLo, regs[2] & 0xFFFF) ;
  77. xlogDesc.out = inppw(ioaddr) ;
  78. xlogDesc.buf = Xlog ;
  79. regs[0] &= IoAdapter->MemorySize - 1 ;
  80. if ( (regs[0] < IoAdapter->MemorySize - 1) )
  81. {
  82. size = IoAdapter->MemorySize - regs[0] ;
  83. if ( size > MAX_XLOG_SIZE )
  84. size = MAX_XLOG_SIZE ;
  85. for ( i = 0 ; i < (size / sizeof(*Xlog)) ; regs[0] += 2 )
  86. {
  87. outpp (addrHi, (regs[0] >> 16) & 0x7F) ;
  88. outppw (addrLo, regs[0] & 0xFFFF) ;
  89. Xlog[i++] = inppw(ioaddr) ;
  90. }
  91. dump_xlog_buffer (IoAdapter, &xlogDesc) ;
  92. diva_os_free (0, Xlog) ;
  93. IoAdapter->trapped = 2 ;
  94. }
  95. outpp (addrHi, (byte)((BRI_UNCACHED_ADDR (IoAdapter->MemoryBase + IoAdapter->MemorySize -
  96. BRI_SHARED_RAM_SIZE)) >> 16)) ;
  97. outppw (addrLo, 0x00) ;
  98. DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port);
  99. }
  100. /* ---------------------------------------------------------------------
  101. Reset hardware
  102. --------------------------------------------------------------------- */
  103. static void reset_bri_hardware (PISDN_ADAPTER IoAdapter) {
  104. byte __iomem *p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
  105. outpp (p, 0x00) ;
  106. DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
  107. }
  108. /* ---------------------------------------------------------------------
  109. Halt system
  110. --------------------------------------------------------------------- */
  111. static void stop_bri_hardware (PISDN_ADAPTER IoAdapter) {
  112. byte __iomem *p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
  113. if (p) {
  114. outpp (p, 0x00) ; /* disable interrupts ! */
  115. }
  116. DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
  117. p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
  118. outpp (p, 0x00) ; /* clear int, halt cpu */
  119. DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
  120. }
  121. static int load_bri_hardware (PISDN_ADAPTER IoAdapter) {
  122. return (0);
  123. }
  124. /******************************************************************************/
  125. static int bri_ISR (struct _ISDN_ADAPTER* IoAdapter) {
  126. byte __iomem *p;
  127. p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
  128. if ( !(inpp (p) & 0x01) ) {
  129. DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
  130. return (0) ;
  131. }
  132. /*
  133. clear interrupt line
  134. */
  135. outpp (p, 0x08) ;
  136. DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
  137. IoAdapter->IrqCount++ ;
  138. if ( IoAdapter->Initialized ) {
  139. diva_os_schedule_soft_isr (&IoAdapter->isr_soft_isr);
  140. }
  141. return (1) ;
  142. }
  143. /* --------------------------------------------------------------------------
  144. Disable IRQ in the card hardware
  145. -------------------------------------------------------------------------- */
  146. static void disable_bri_interrupt (PISDN_ADAPTER IoAdapter) {
  147. byte __iomem *p;
  148. p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
  149. if ( p )
  150. {
  151. outpp (p, 0x00) ; /* disable interrupts ! */
  152. }
  153. DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
  154. p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
  155. outpp (p, 0x00) ; /* clear int, halt cpu */
  156. DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
  157. }
  158. /* -------------------------------------------------------------------------
  159. Fill card entry points
  160. ------------------------------------------------------------------------- */
  161. void prepare_maestra_functions (PISDN_ADAPTER IoAdapter) {
  162. ADAPTER *a = &IoAdapter->a ;
  163. a->ram_in = io_in ;
  164. a->ram_inw = io_inw ;
  165. a->ram_in_buffer = io_in_buffer ;
  166. a->ram_look_ahead = io_look_ahead ;
  167. a->ram_out = io_out ;
  168. a->ram_outw = io_outw ;
  169. a->ram_out_buffer = io_out_buffer ;
  170. a->ram_inc = io_inc ;
  171. IoAdapter->MemoryBase = BRI_MEMORY_BASE ;
  172. IoAdapter->MemorySize = BRI_MEMORY_SIZE ;
  173. IoAdapter->out = pr_out ;
  174. IoAdapter->dpc = pr_dpc ;
  175. IoAdapter->tst_irq = scom_test_int ;
  176. IoAdapter->clr_irq = scom_clear_int ;
  177. IoAdapter->pcm = (struct pc_maint *)MIPS_MAINT_OFFS ;
  178. IoAdapter->load = load_bri_hardware ;
  179. IoAdapter->disIrq = disable_bri_interrupt ;
  180. IoAdapter->rstFnc = reset_bri_hardware ;
  181. IoAdapter->stop = stop_bri_hardware ;
  182. IoAdapter->trapFnc = bri_cpu_trapped ;
  183. IoAdapter->diva_isr_handler = bri_ISR;
  184. /*
  185. Prepare OS dependent functions
  186. */
  187. diva_os_prepare_maestra_functions (IoAdapter);
  188. }
  189. /* -------------------------------------------------------------------------- */