serial.c 6.2 KB

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  1. /*
  2. * linux/arch/arm/mach-omap1/serial.c
  3. *
  4. * OMAP1 serial support.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/kernel.h>
  12. #include <linux/init.h>
  13. #include <linux/irq.h>
  14. #include <linux/delay.h>
  15. #include <linux/serial.h>
  16. #include <linux/tty.h>
  17. #include <linux/serial_8250.h>
  18. #include <linux/serial_reg.h>
  19. #include <linux/clk.h>
  20. #include <linux/io.h>
  21. #include <asm/mach-types.h>
  22. #include <plat/board.h>
  23. #include <plat/mux.h>
  24. #include <mach/gpio.h>
  25. #include <plat/fpga.h>
  26. #include "pm.h"
  27. static struct clk * uart1_ck;
  28. static struct clk * uart2_ck;
  29. static struct clk * uart3_ck;
  30. static inline unsigned int omap_serial_in(struct plat_serial8250_port *up,
  31. int offset)
  32. {
  33. offset <<= up->regshift;
  34. return (unsigned int)__raw_readb(up->membase + offset);
  35. }
  36. static inline void omap_serial_outp(struct plat_serial8250_port *p, int offset,
  37. int value)
  38. {
  39. offset <<= p->regshift;
  40. __raw_writeb(value, p->membase + offset);
  41. }
  42. /*
  43. * Internal UARTs need to be initialized for the 8250 autoconfig to work
  44. * properly. Note that the TX watermark initialization may not be needed
  45. * once the 8250.c watermark handling code is merged.
  46. */
  47. static void __init omap_serial_reset(struct plat_serial8250_port *p)
  48. {
  49. omap_serial_outp(p, UART_OMAP_MDR1,
  50. UART_OMAP_MDR1_DISABLE); /* disable UART */
  51. omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */
  52. omap_serial_outp(p, UART_OMAP_MDR1,
  53. UART_OMAP_MDR1_16X_MODE); /* enable UART */
  54. if (!cpu_is_omap15xx()) {
  55. omap_serial_outp(p, UART_OMAP_SYSC, 0x01);
  56. while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01));
  57. }
  58. }
  59. static struct plat_serial8250_port serial_platform_data[] = {
  60. {
  61. .mapbase = OMAP1_UART1_BASE,
  62. .irq = INT_UART1,
  63. .flags = UPF_BOOT_AUTOCONF,
  64. .iotype = UPIO_MEM,
  65. .regshift = 2,
  66. .uartclk = OMAP16XX_BASE_BAUD * 16,
  67. },
  68. {
  69. .mapbase = OMAP1_UART2_BASE,
  70. .irq = INT_UART2,
  71. .flags = UPF_BOOT_AUTOCONF,
  72. .iotype = UPIO_MEM,
  73. .regshift = 2,
  74. .uartclk = OMAP16XX_BASE_BAUD * 16,
  75. },
  76. {
  77. .mapbase = OMAP1_UART3_BASE,
  78. .irq = INT_UART3,
  79. .flags = UPF_BOOT_AUTOCONF,
  80. .iotype = UPIO_MEM,
  81. .regshift = 2,
  82. .uartclk = OMAP16XX_BASE_BAUD * 16,
  83. },
  84. { },
  85. };
  86. static struct platform_device serial_device = {
  87. .name = "serial8250",
  88. .id = PLAT8250_DEV_PLATFORM,
  89. .dev = {
  90. .platform_data = serial_platform_data,
  91. },
  92. };
  93. /*
  94. * Note that on Innovator-1510 UART2 pins conflict with USB2.
  95. * By default UART2 does not work on Innovator-1510 if you have
  96. * USB OHCI enabled. To use UART2, you must disable USB2 first.
  97. */
  98. void __init omap_serial_init(void)
  99. {
  100. int i;
  101. if (cpu_is_omap7xx()) {
  102. serial_platform_data[0].regshift = 0;
  103. serial_platform_data[1].regshift = 0;
  104. serial_platform_data[0].irq = INT_7XX_UART_MODEM_1;
  105. serial_platform_data[1].irq = INT_7XX_UART_MODEM_IRDA_2;
  106. }
  107. if (cpu_is_omap15xx()) {
  108. serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16;
  109. serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16;
  110. serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
  111. }
  112. for (i = 0; i < ARRAY_SIZE(serial_platform_data) - 1; i++) {
  113. /* Don't look at UARTs higher than 2 for omap7xx */
  114. if (cpu_is_omap7xx() && i > 1) {
  115. serial_platform_data[i].membase = NULL;
  116. serial_platform_data[i].mapbase = 0;
  117. continue;
  118. }
  119. /* Static mapping, never released */
  120. serial_platform_data[i].membase =
  121. ioremap(serial_platform_data[i].mapbase, SZ_2K);
  122. if (!serial_platform_data[i].membase) {
  123. printk(KERN_ERR "Could not ioremap uart%i\n", i);
  124. continue;
  125. }
  126. switch (i) {
  127. case 0:
  128. uart1_ck = clk_get(NULL, "uart1_ck");
  129. if (IS_ERR(uart1_ck))
  130. printk("Could not get uart1_ck\n");
  131. else {
  132. clk_enable(uart1_ck);
  133. if (cpu_is_omap15xx())
  134. clk_set_rate(uart1_ck, 12000000);
  135. }
  136. break;
  137. case 1:
  138. uart2_ck = clk_get(NULL, "uart2_ck");
  139. if (IS_ERR(uart2_ck))
  140. printk("Could not get uart2_ck\n");
  141. else {
  142. clk_enable(uart2_ck);
  143. if (cpu_is_omap15xx())
  144. clk_set_rate(uart2_ck, 12000000);
  145. else
  146. clk_set_rate(uart2_ck, 48000000);
  147. }
  148. break;
  149. case 2:
  150. uart3_ck = clk_get(NULL, "uart3_ck");
  151. if (IS_ERR(uart3_ck))
  152. printk("Could not get uart3_ck\n");
  153. else {
  154. clk_enable(uart3_ck);
  155. if (cpu_is_omap15xx())
  156. clk_set_rate(uart3_ck, 12000000);
  157. }
  158. break;
  159. }
  160. omap_serial_reset(&serial_platform_data[i]);
  161. }
  162. }
  163. #ifdef CONFIG_OMAP_SERIAL_WAKE
  164. static irqreturn_t omap_serial_wake_interrupt(int irq, void *dev_id)
  165. {
  166. /* Need to do something with serial port right after wake-up? */
  167. return IRQ_HANDLED;
  168. }
  169. /*
  170. * Reroutes serial RX lines to GPIO lines for the duration of
  171. * sleep to allow waking up the device from serial port even
  172. * in deep sleep.
  173. */
  174. void omap_serial_wake_trigger(int enable)
  175. {
  176. if (!cpu_is_omap16xx())
  177. return;
  178. if (uart1_ck != NULL) {
  179. if (enable)
  180. omap_cfg_reg(V14_16XX_GPIO37);
  181. else
  182. omap_cfg_reg(V14_16XX_UART1_RX);
  183. }
  184. if (uart2_ck != NULL) {
  185. if (enable)
  186. omap_cfg_reg(R9_16XX_GPIO18);
  187. else
  188. omap_cfg_reg(R9_16XX_UART2_RX);
  189. }
  190. if (uart3_ck != NULL) {
  191. if (enable)
  192. omap_cfg_reg(L14_16XX_GPIO49);
  193. else
  194. omap_cfg_reg(L14_16XX_UART3_RX);
  195. }
  196. }
  197. static void __init omap_serial_set_port_wakeup(int gpio_nr)
  198. {
  199. int ret;
  200. ret = gpio_request(gpio_nr, "UART wake");
  201. if (ret < 0) {
  202. printk(KERN_ERR "Could not request UART wake GPIO: %i\n",
  203. gpio_nr);
  204. return;
  205. }
  206. gpio_direction_input(gpio_nr);
  207. ret = request_irq(gpio_to_irq(gpio_nr), &omap_serial_wake_interrupt,
  208. IRQF_TRIGGER_RISING, "serial wakeup", NULL);
  209. if (ret) {
  210. gpio_free(gpio_nr);
  211. printk(KERN_ERR "No interrupt for UART wake GPIO: %i\n",
  212. gpio_nr);
  213. return;
  214. }
  215. enable_irq_wake(gpio_to_irq(gpio_nr));
  216. }
  217. static int __init omap_serial_wakeup_init(void)
  218. {
  219. if (!cpu_is_omap16xx())
  220. return 0;
  221. if (uart1_ck != NULL)
  222. omap_serial_set_port_wakeup(37);
  223. if (uart2_ck != NULL)
  224. omap_serial_set_port_wakeup(18);
  225. if (uart3_ck != NULL)
  226. omap_serial_set_port_wakeup(49);
  227. return 0;
  228. }
  229. late_initcall(omap_serial_wakeup_init);
  230. #endif /* CONFIG_OMAP_SERIAL_WAKE */
  231. static int __init omap_init(void)
  232. {
  233. if (!cpu_class_is_omap1())
  234. return -ENODEV;
  235. return platform_device_register(&serial_device);
  236. }
  237. arch_initcall(omap_init);