ehci-imx35.c 2.2 KB

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  1. /*
  2. * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
  3. * Copyright (C) 2010 Freescale Semiconductor, Inc.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License as published by the
  7. * Free Software Foundation; either version 2 of the License, or (at your
  8. * option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  12. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  13. * for more details.
  14. */
  15. #include <linux/platform_device.h>
  16. #include <linux/io.h>
  17. #include <mach/hardware.h>
  18. #include <mach/mxc_ehci.h>
  19. #define USBCTRL_OTGBASE_OFFSET 0x600
  20. #define MX35_OTG_SIC_SHIFT 29
  21. #define MX35_OTG_SIC_MASK (0x3 << MX35_OTG_SIC_SHIFT)
  22. #define MX35_OTG_PM_BIT (1 << 24)
  23. #define MX35_H1_SIC_SHIFT 21
  24. #define MX35_H1_SIC_MASK (0x3 << MX35_H1_SIC_SHIFT)
  25. #define MX35_H1_PM_BIT (1 << 8)
  26. #define MX35_H1_IPPUE_UP_BIT (1 << 7)
  27. #define MX35_H1_IPPUE_DOWN_BIT (1 << 6)
  28. #define MX35_H1_TLL_BIT (1 << 5)
  29. #define MX35_H1_USBTE_BIT (1 << 4)
  30. int mx35_initialize_usb_hw(int port, unsigned int flags)
  31. {
  32. unsigned int v;
  33. v = readl(MX35_IO_ADDRESS(MX35_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
  34. switch (port) {
  35. case 0: /* OTG port */
  36. v &= ~(MX35_OTG_SIC_MASK | MX35_OTG_PM_BIT);
  37. v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX35_OTG_SIC_SHIFT;
  38. if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
  39. v |= MX35_OTG_PM_BIT;
  40. break;
  41. case 1: /* H1 port */
  42. v &= ~(MX35_H1_SIC_MASK | MX35_H1_PM_BIT | MX35_H1_TLL_BIT |
  43. MX35_H1_USBTE_BIT | MX35_H1_IPPUE_DOWN_BIT | MX35_H1_IPPUE_UP_BIT);
  44. v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX35_H1_SIC_SHIFT;
  45. if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
  46. v |= MX35_H1_PM_BIT;
  47. if (!(flags & MXC_EHCI_TTL_ENABLED))
  48. v |= MX35_H1_TLL_BIT;
  49. if (flags & MXC_EHCI_INTERNAL_PHY)
  50. v |= MX35_H1_USBTE_BIT;
  51. if (flags & MXC_EHCI_IPPUE_DOWN)
  52. v |= MX35_H1_IPPUE_DOWN_BIT;
  53. if (flags & MXC_EHCI_IPPUE_UP)
  54. v |= MX35_H1_IPPUE_UP_BIT;
  55. break;
  56. default:
  57. return -EINVAL;
  58. }
  59. writel(v, MX35_IO_ADDRESS(MX35_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
  60. return 0;
  61. }