head-sa1100.S 1.2 KB

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  1. /*
  2. * linux/arch/arm/boot/compressed/head-sa1100.S
  3. *
  4. * Copyright (C) 1999 Nicolas Pitre <nico@fluxnic.net>
  5. *
  6. * SA1100 specific tweaks. This is merged into head.S by the linker.
  7. *
  8. */
  9. #include <linux/linkage.h>
  10. #include <asm/mach-types.h>
  11. .section ".start", "ax"
  12. __SA1100_start:
  13. @ Preserve r8/r7 i.e. kernel entry values
  14. #ifdef CONFIG_SA1100_COLLIE
  15. mov r7, #MACH_TYPE_COLLIE
  16. #endif
  17. #ifdef CONFIG_SA1100_SIMPAD
  18. @ UNTIL we've something like an open bootldr
  19. mov r7, #MACH_TYPE_SIMPAD @should be 87
  20. #endif
  21. mrc p15, 0, r0, c1, c0, 0 @ read control reg
  22. ands r0, r0, #0x0d
  23. beq 99f
  24. @ Data cache might be active.
  25. @ Be sure to flush kernel binary out of the cache,
  26. @ whatever state it is, before it is turned off.
  27. @ This is done by fetching through currently executed
  28. @ memory to be sure we hit the same cache.
  29. bic r2, pc, #0x1f
  30. add r3, r2, #0x4000 @ 16 kb is quite enough...
  31. 1: ldr r0, [r2], #32
  32. teq r2, r3
  33. bne 1b
  34. mcr p15, 0, r0, c7, c10, 4 @ drain WB
  35. mcr p15, 0, r0, c7, c7, 0 @ flush I & D caches
  36. @ disabling MMU and caches
  37. mrc p15, 0, r0, c1, c0, 0 @ read control reg
  38. bic r0, r0, #0x0d @ clear WB, DC, MMU
  39. bic r0, r0, #0x1000 @ clear Icache
  40. mcr p15, 0, r0, c1, c0, 0
  41. 99: