baycom_epp.c 34 KB

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  1. /*****************************************************************************/
  2. /*
  3. * baycom_epp.c -- baycom epp radio modem driver.
  4. *
  5. * Copyright (C) 1998-2000
  6. * Thomas Sailer (sailer@ife.ee.ethz.ch)
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. *
  22. * Please note that the GPL allows you to use the driver, NOT the radio.
  23. * In order to use the radio, you need a license from the communications
  24. * authority of your country.
  25. *
  26. *
  27. * History:
  28. * 0.1 xx.xx.1998 Initial version by Matthias Welwarsky (dg2fef)
  29. * 0.2 21.04.1998 Massive rework by Thomas Sailer
  30. * Integrated FPGA EPP modem configuration routines
  31. * 0.3 11.05.1998 Took FPGA config out and moved it into a separate program
  32. * 0.4 26.07.1999 Adapted to new lowlevel parport driver interface
  33. * 0.5 03.08.1999 adapt to Linus' new __setup/__initcall
  34. * removed some pre-2.2 kernel compatibility cruft
  35. * 0.6 10.08.1999 Check if parport can do SPP and is safe to access during interrupt contexts
  36. * 0.7 12.02.2000 adapted to softnet driver interface
  37. *
  38. */
  39. /*****************************************************************************/
  40. #include <linux/crc-ccitt.h>
  41. #include <linux/module.h>
  42. #include <linux/kernel.h>
  43. #include <linux/init.h>
  44. #include <linux/sched.h>
  45. #include <linux/string.h>
  46. #include <linux/workqueue.h>
  47. #include <linux/fs.h>
  48. #include <linux/parport.h>
  49. #include <linux/if_arp.h>
  50. #include <linux/hdlcdrv.h>
  51. #include <linux/baycom.h>
  52. #include <linux/jiffies.h>
  53. #include <linux/random.h>
  54. #include <net/ax25.h>
  55. #include <asm/uaccess.h>
  56. /* --------------------------------------------------------------------- */
  57. #define BAYCOM_DEBUG
  58. #define BAYCOM_MAGIC 19730510
  59. /* --------------------------------------------------------------------- */
  60. static const char paranoia_str[] = KERN_ERR
  61. "baycom_epp: bad magic number for hdlcdrv_state struct in routine %s\n";
  62. static const char bc_drvname[] = "baycom_epp";
  63. static const char bc_drvinfo[] = KERN_INFO "baycom_epp: (C) 1998-2000 Thomas Sailer, HB9JNX/AE4WA\n"
  64. "baycom_epp: version 0.7\n";
  65. /* --------------------------------------------------------------------- */
  66. #define NR_PORTS 4
  67. static struct net_device *baycom_device[NR_PORTS];
  68. /* --------------------------------------------------------------------- */
  69. /* EPP status register */
  70. #define EPP_DCDBIT 0x80
  71. #define EPP_PTTBIT 0x08
  72. #define EPP_NREF 0x01
  73. #define EPP_NRAEF 0x02
  74. #define EPP_NRHF 0x04
  75. #define EPP_NTHF 0x20
  76. #define EPP_NTAEF 0x10
  77. #define EPP_NTEF EPP_PTTBIT
  78. /* EPP control register */
  79. #define EPP_TX_FIFO_ENABLE 0x10
  80. #define EPP_RX_FIFO_ENABLE 0x08
  81. #define EPP_MODEM_ENABLE 0x20
  82. #define EPP_LEDS 0xC0
  83. #define EPP_IRQ_ENABLE 0x10
  84. /* LPT registers */
  85. #define LPTREG_ECONTROL 0x402
  86. #define LPTREG_CONFIGB 0x401
  87. #define LPTREG_CONFIGA 0x400
  88. #define LPTREG_EPPDATA 0x004
  89. #define LPTREG_EPPADDR 0x003
  90. #define LPTREG_CONTROL 0x002
  91. #define LPTREG_STATUS 0x001
  92. #define LPTREG_DATA 0x000
  93. /* LPT control register */
  94. #define LPTCTRL_PROGRAM 0x04 /* 0 to reprogram */
  95. #define LPTCTRL_WRITE 0x01
  96. #define LPTCTRL_ADDRSTB 0x08
  97. #define LPTCTRL_DATASTB 0x02
  98. #define LPTCTRL_INTEN 0x10
  99. /* LPT status register */
  100. #define LPTSTAT_SHIFT_NINTR 6
  101. #define LPTSTAT_WAIT 0x80
  102. #define LPTSTAT_NINTR (1<<LPTSTAT_SHIFT_NINTR)
  103. #define LPTSTAT_PE 0x20
  104. #define LPTSTAT_DONE 0x10
  105. #define LPTSTAT_NERROR 0x08
  106. #define LPTSTAT_EPPTIMEOUT 0x01
  107. /* LPT data register */
  108. #define LPTDATA_SHIFT_TDI 0
  109. #define LPTDATA_SHIFT_TMS 2
  110. #define LPTDATA_TDI (1<<LPTDATA_SHIFT_TDI)
  111. #define LPTDATA_TCK 0x02
  112. #define LPTDATA_TMS (1<<LPTDATA_SHIFT_TMS)
  113. #define LPTDATA_INITBIAS 0x80
  114. /* EPP modem config/status bits */
  115. #define EPP_DCDBIT 0x80
  116. #define EPP_PTTBIT 0x08
  117. #define EPP_RXEBIT 0x01
  118. #define EPP_RXAEBIT 0x02
  119. #define EPP_RXHFULL 0x04
  120. #define EPP_NTHF 0x20
  121. #define EPP_NTAEF 0x10
  122. #define EPP_NTEF EPP_PTTBIT
  123. #define EPP_TX_FIFO_ENABLE 0x10
  124. #define EPP_RX_FIFO_ENABLE 0x08
  125. #define EPP_MODEM_ENABLE 0x20
  126. #define EPP_LEDS 0xC0
  127. #define EPP_IRQ_ENABLE 0x10
  128. /* Xilinx 4k JTAG instructions */
  129. #define XC4K_IRLENGTH 3
  130. #define XC4K_EXTEST 0
  131. #define XC4K_PRELOAD 1
  132. #define XC4K_CONFIGURE 5
  133. #define XC4K_BYPASS 7
  134. #define EPP_CONVENTIONAL 0
  135. #define EPP_FPGA 1
  136. #define EPP_FPGAEXTSTATUS 2
  137. #define TXBUFFER_SIZE ((HDLCDRV_MAXFLEN*6/5)+8)
  138. /* ---------------------------------------------------------------------- */
  139. /*
  140. * Information that need to be kept for each board.
  141. */
  142. struct baycom_state {
  143. int magic;
  144. struct pardevice *pdev;
  145. struct net_device *dev;
  146. unsigned int work_running;
  147. struct delayed_work run_work;
  148. unsigned int modem;
  149. unsigned int bitrate;
  150. unsigned char stat;
  151. struct {
  152. unsigned int intclk;
  153. unsigned int fclk;
  154. unsigned int bps;
  155. unsigned int extmodem;
  156. unsigned int loopback;
  157. } cfg;
  158. struct hdlcdrv_channel_params ch_params;
  159. struct {
  160. unsigned int bitbuf, bitstream, numbits, state;
  161. unsigned char *bufptr;
  162. int bufcnt;
  163. unsigned char buf[TXBUFFER_SIZE];
  164. } hdlcrx;
  165. struct {
  166. int calibrate;
  167. int slotcnt;
  168. int flags;
  169. enum { tx_idle = 0, tx_keyup, tx_data, tx_tail } state;
  170. unsigned char *bufptr;
  171. int bufcnt;
  172. unsigned char buf[TXBUFFER_SIZE];
  173. } hdlctx;
  174. unsigned int ptt_keyed;
  175. struct sk_buff *skb; /* next transmit packet */
  176. #ifdef BAYCOM_DEBUG
  177. struct debug_vals {
  178. unsigned long last_jiffies;
  179. unsigned cur_intcnt;
  180. unsigned last_intcnt;
  181. int cur_pllcorr;
  182. int last_pllcorr;
  183. unsigned int mod_cycles;
  184. unsigned int demod_cycles;
  185. } debug_vals;
  186. #endif /* BAYCOM_DEBUG */
  187. };
  188. /* --------------------------------------------------------------------- */
  189. #define KISS_VERBOSE
  190. /* --------------------------------------------------------------------- */
  191. #define PARAM_TXDELAY 1
  192. #define PARAM_PERSIST 2
  193. #define PARAM_SLOTTIME 3
  194. #define PARAM_TXTAIL 4
  195. #define PARAM_FULLDUP 5
  196. #define PARAM_HARDWARE 6
  197. #define PARAM_RETURN 255
  198. /* --------------------------------------------------------------------- */
  199. /*
  200. * the CRC routines are stolen from WAMPES
  201. * by Dieter Deyke
  202. */
  203. /*---------------------------------------------------------------------------*/
  204. #if 0
  205. static inline void append_crc_ccitt(unsigned char *buffer, int len)
  206. {
  207. unsigned int crc = 0xffff;
  208. for (;len>0;len--)
  209. crc = (crc >> 8) ^ crc_ccitt_table[(crc ^ *buffer++) & 0xff];
  210. crc ^= 0xffff;
  211. *buffer++ = crc;
  212. *buffer++ = crc >> 8;
  213. }
  214. #endif
  215. /*---------------------------------------------------------------------------*/
  216. static inline int check_crc_ccitt(const unsigned char *buf, int cnt)
  217. {
  218. return (crc_ccitt(0xffff, buf, cnt) & 0xffff) == 0xf0b8;
  219. }
  220. /*---------------------------------------------------------------------------*/
  221. static inline int calc_crc_ccitt(const unsigned char *buf, int cnt)
  222. {
  223. return (crc_ccitt(0xffff, buf, cnt) ^ 0xffff) & 0xffff;
  224. }
  225. /* ---------------------------------------------------------------------- */
  226. #define tenms_to_flags(bc,tenms) ((tenms * bc->bitrate) / 800)
  227. /* --------------------------------------------------------------------- */
  228. static inline void baycom_int_freq(struct baycom_state *bc)
  229. {
  230. #ifdef BAYCOM_DEBUG
  231. unsigned long cur_jiffies = jiffies;
  232. /*
  233. * measure the interrupt frequency
  234. */
  235. bc->debug_vals.cur_intcnt++;
  236. if (time_after_eq(cur_jiffies, bc->debug_vals.last_jiffies + HZ)) {
  237. bc->debug_vals.last_jiffies = cur_jiffies;
  238. bc->debug_vals.last_intcnt = bc->debug_vals.cur_intcnt;
  239. bc->debug_vals.cur_intcnt = 0;
  240. bc->debug_vals.last_pllcorr = bc->debug_vals.cur_pllcorr;
  241. bc->debug_vals.cur_pllcorr = 0;
  242. }
  243. #endif /* BAYCOM_DEBUG */
  244. }
  245. /* ---------------------------------------------------------------------- */
  246. /*
  247. * eppconfig_path should be setable via /proc/sys.
  248. */
  249. static char eppconfig_path[256] = "/usr/sbin/eppfpga";
  250. static char *envp[] = { "HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL };
  251. /* eppconfig: called during ifconfig up to configure the modem */
  252. static int eppconfig(struct baycom_state *bc)
  253. {
  254. char modearg[256];
  255. char portarg[16];
  256. char *argv[] = { eppconfig_path, "-s", "-p", portarg, "-m", modearg,
  257. NULL };
  258. /* set up arguments */
  259. sprintf(modearg, "%sclk,%smodem,fclk=%d,bps=%d,divider=%d%s,extstat",
  260. bc->cfg.intclk ? "int" : "ext",
  261. bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps,
  262. (bc->cfg.fclk + 8 * bc->cfg.bps) / (16 * bc->cfg.bps),
  263. bc->cfg.loopback ? ",loopback" : "");
  264. sprintf(portarg, "%ld", bc->pdev->port->base);
  265. printk(KERN_DEBUG "%s: %s -s -p %s -m %s\n", bc_drvname, eppconfig_path, portarg, modearg);
  266. return call_usermodehelper(eppconfig_path, argv, envp, UMH_WAIT_PROC);
  267. }
  268. /* ---------------------------------------------------------------------- */
  269. static inline void do_kiss_params(struct baycom_state *bc,
  270. unsigned char *data, unsigned long len)
  271. {
  272. #ifdef KISS_VERBOSE
  273. #define PKP(a,b) printk(KERN_INFO "baycomm_epp: channel params: " a "\n", b)
  274. #else /* KISS_VERBOSE */
  275. #define PKP(a,b)
  276. #endif /* KISS_VERBOSE */
  277. if (len < 2)
  278. return;
  279. switch(data[0]) {
  280. case PARAM_TXDELAY:
  281. bc->ch_params.tx_delay = data[1];
  282. PKP("TX delay = %ums", 10 * bc->ch_params.tx_delay);
  283. break;
  284. case PARAM_PERSIST:
  285. bc->ch_params.ppersist = data[1];
  286. PKP("p persistence = %u", bc->ch_params.ppersist);
  287. break;
  288. case PARAM_SLOTTIME:
  289. bc->ch_params.slottime = data[1];
  290. PKP("slot time = %ums", bc->ch_params.slottime);
  291. break;
  292. case PARAM_TXTAIL:
  293. bc->ch_params.tx_tail = data[1];
  294. PKP("TX tail = %ums", bc->ch_params.tx_tail);
  295. break;
  296. case PARAM_FULLDUP:
  297. bc->ch_params.fulldup = !!data[1];
  298. PKP("%s duplex", bc->ch_params.fulldup ? "full" : "half");
  299. break;
  300. default:
  301. break;
  302. }
  303. #undef PKP
  304. }
  305. /* --------------------------------------------------------------------- */
  306. static void encode_hdlc(struct baycom_state *bc)
  307. {
  308. struct sk_buff *skb;
  309. unsigned char *wp, *bp;
  310. int pkt_len;
  311. unsigned bitstream, notbitstream, bitbuf, numbit, crc;
  312. unsigned char crcarr[2];
  313. int j;
  314. if (bc->hdlctx.bufcnt > 0)
  315. return;
  316. skb = bc->skb;
  317. if (!skb)
  318. return;
  319. bc->skb = NULL;
  320. pkt_len = skb->len-1; /* strip KISS byte */
  321. wp = bc->hdlctx.buf;
  322. bp = skb->data+1;
  323. crc = calc_crc_ccitt(bp, pkt_len);
  324. crcarr[0] = crc;
  325. crcarr[1] = crc >> 8;
  326. *wp++ = 0x7e;
  327. bitstream = bitbuf = numbit = 0;
  328. while (pkt_len > -2) {
  329. bitstream >>= 8;
  330. bitstream |= ((unsigned int)*bp) << 8;
  331. bitbuf |= ((unsigned int)*bp) << numbit;
  332. notbitstream = ~bitstream;
  333. bp++;
  334. pkt_len--;
  335. if (!pkt_len)
  336. bp = crcarr;
  337. for (j = 0; j < 8; j++)
  338. if (unlikely(!(notbitstream & (0x1f0 << j)))) {
  339. bitstream &= ~(0x100 << j);
  340. bitbuf = (bitbuf & (((2 << j) << numbit) - 1)) |
  341. ((bitbuf & ~(((2 << j) << numbit) - 1)) << 1);
  342. numbit++;
  343. notbitstream = ~bitstream;
  344. }
  345. numbit += 8;
  346. while (numbit >= 8) {
  347. *wp++ = bitbuf;
  348. bitbuf >>= 8;
  349. numbit -= 8;
  350. }
  351. }
  352. bitbuf |= 0x7e7e << numbit;
  353. numbit += 16;
  354. while (numbit >= 8) {
  355. *wp++ = bitbuf;
  356. bitbuf >>= 8;
  357. numbit -= 8;
  358. }
  359. bc->hdlctx.bufptr = bc->hdlctx.buf;
  360. bc->hdlctx.bufcnt = wp - bc->hdlctx.buf;
  361. dev_kfree_skb(skb);
  362. bc->dev->stats.tx_packets++;
  363. }
  364. /* ---------------------------------------------------------------------- */
  365. static int transmit(struct baycom_state *bc, int cnt, unsigned char stat)
  366. {
  367. struct parport *pp = bc->pdev->port;
  368. unsigned char tmp[128];
  369. int i, j;
  370. if (bc->hdlctx.state == tx_tail && !(stat & EPP_PTTBIT))
  371. bc->hdlctx.state = tx_idle;
  372. if (bc->hdlctx.state == tx_idle && bc->hdlctx.calibrate <= 0) {
  373. if (bc->hdlctx.bufcnt <= 0)
  374. encode_hdlc(bc);
  375. if (bc->hdlctx.bufcnt <= 0)
  376. return 0;
  377. if (!bc->ch_params.fulldup) {
  378. if (!(stat & EPP_DCDBIT)) {
  379. bc->hdlctx.slotcnt = bc->ch_params.slottime;
  380. return 0;
  381. }
  382. if ((--bc->hdlctx.slotcnt) > 0)
  383. return 0;
  384. bc->hdlctx.slotcnt = bc->ch_params.slottime;
  385. if ((prandom_u32() % 256) > bc->ch_params.ppersist)
  386. return 0;
  387. }
  388. }
  389. if (bc->hdlctx.state == tx_idle && bc->hdlctx.bufcnt > 0) {
  390. bc->hdlctx.state = tx_keyup;
  391. bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_delay);
  392. bc->ptt_keyed++;
  393. }
  394. while (cnt > 0) {
  395. switch (bc->hdlctx.state) {
  396. case tx_keyup:
  397. i = min_t(int, cnt, bc->hdlctx.flags);
  398. cnt -= i;
  399. bc->hdlctx.flags -= i;
  400. if (bc->hdlctx.flags <= 0)
  401. bc->hdlctx.state = tx_data;
  402. memset(tmp, 0x7e, sizeof(tmp));
  403. while (i > 0) {
  404. j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
  405. if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
  406. return -1;
  407. i -= j;
  408. }
  409. break;
  410. case tx_data:
  411. if (bc->hdlctx.bufcnt <= 0) {
  412. encode_hdlc(bc);
  413. if (bc->hdlctx.bufcnt <= 0) {
  414. bc->hdlctx.state = tx_tail;
  415. bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_tail);
  416. break;
  417. }
  418. }
  419. i = min_t(int, cnt, bc->hdlctx.bufcnt);
  420. bc->hdlctx.bufcnt -= i;
  421. cnt -= i;
  422. if (i != pp->ops->epp_write_data(pp, bc->hdlctx.bufptr, i, 0))
  423. return -1;
  424. bc->hdlctx.bufptr += i;
  425. break;
  426. case tx_tail:
  427. encode_hdlc(bc);
  428. if (bc->hdlctx.bufcnt > 0) {
  429. bc->hdlctx.state = tx_data;
  430. break;
  431. }
  432. i = min_t(int, cnt, bc->hdlctx.flags);
  433. if (i) {
  434. cnt -= i;
  435. bc->hdlctx.flags -= i;
  436. memset(tmp, 0x7e, sizeof(tmp));
  437. while (i > 0) {
  438. j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
  439. if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
  440. return -1;
  441. i -= j;
  442. }
  443. break;
  444. }
  445. default: /* fall through */
  446. if (bc->hdlctx.calibrate <= 0)
  447. return 0;
  448. i = min_t(int, cnt, bc->hdlctx.calibrate);
  449. cnt -= i;
  450. bc->hdlctx.calibrate -= i;
  451. memset(tmp, 0, sizeof(tmp));
  452. while (i > 0) {
  453. j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
  454. if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
  455. return -1;
  456. i -= j;
  457. }
  458. break;
  459. }
  460. }
  461. return 0;
  462. }
  463. /* ---------------------------------------------------------------------- */
  464. static void do_rxpacket(struct net_device *dev)
  465. {
  466. struct baycom_state *bc = netdev_priv(dev);
  467. struct sk_buff *skb;
  468. unsigned char *cp;
  469. unsigned pktlen;
  470. if (bc->hdlcrx.bufcnt < 4)
  471. return;
  472. if (!check_crc_ccitt(bc->hdlcrx.buf, bc->hdlcrx.bufcnt))
  473. return;
  474. pktlen = bc->hdlcrx.bufcnt-2+1; /* KISS kludge */
  475. if (!(skb = dev_alloc_skb(pktlen))) {
  476. printk("%s: memory squeeze, dropping packet\n", dev->name);
  477. dev->stats.rx_dropped++;
  478. return;
  479. }
  480. cp = skb_put(skb, pktlen);
  481. *cp++ = 0; /* KISS kludge */
  482. memcpy(cp, bc->hdlcrx.buf, pktlen - 1);
  483. skb->protocol = ax25_type_trans(skb, dev);
  484. netif_rx(skb);
  485. dev->stats.rx_packets++;
  486. }
  487. static int receive(struct net_device *dev, int cnt)
  488. {
  489. struct baycom_state *bc = netdev_priv(dev);
  490. struct parport *pp = bc->pdev->port;
  491. unsigned int bitbuf, notbitstream, bitstream, numbits, state;
  492. unsigned char tmp[128];
  493. unsigned char *cp;
  494. int cnt2, ret = 0;
  495. int j;
  496. numbits = bc->hdlcrx.numbits;
  497. state = bc->hdlcrx.state;
  498. bitstream = bc->hdlcrx.bitstream;
  499. bitbuf = bc->hdlcrx.bitbuf;
  500. while (cnt > 0) {
  501. cnt2 = (cnt > sizeof(tmp)) ? sizeof(tmp) : cnt;
  502. cnt -= cnt2;
  503. if (cnt2 != pp->ops->epp_read_data(pp, tmp, cnt2, 0)) {
  504. ret = -1;
  505. break;
  506. }
  507. cp = tmp;
  508. for (; cnt2 > 0; cnt2--, cp++) {
  509. bitstream >>= 8;
  510. bitstream |= (*cp) << 8;
  511. bitbuf >>= 8;
  512. bitbuf |= (*cp) << 8;
  513. numbits += 8;
  514. notbitstream = ~bitstream;
  515. for (j = 0; j < 8; j++) {
  516. /* flag or abort */
  517. if (unlikely(!(notbitstream & (0x0fc << j)))) {
  518. /* abort received */
  519. if (!(notbitstream & (0x1fc << j)))
  520. state = 0;
  521. /* flag received */
  522. else if ((bitstream & (0x1fe << j)) == (0x0fc << j)) {
  523. if (state)
  524. do_rxpacket(dev);
  525. bc->hdlcrx.bufcnt = 0;
  526. bc->hdlcrx.bufptr = bc->hdlcrx.buf;
  527. state = 1;
  528. numbits = 7-j;
  529. }
  530. }
  531. /* stuffed bit */
  532. else if (unlikely((bitstream & (0x1f8 << j)) == (0xf8 << j))) {
  533. numbits--;
  534. bitbuf = (bitbuf & ((~0xff) << j)) | ((bitbuf & ~((~0xff) << j)) << 1);
  535. }
  536. }
  537. while (state && numbits >= 8) {
  538. if (bc->hdlcrx.bufcnt >= TXBUFFER_SIZE) {
  539. state = 0;
  540. } else {
  541. *(bc->hdlcrx.bufptr)++ = bitbuf >> (16-numbits);
  542. bc->hdlcrx.bufcnt++;
  543. numbits -= 8;
  544. }
  545. }
  546. }
  547. }
  548. bc->hdlcrx.numbits = numbits;
  549. bc->hdlcrx.state = state;
  550. bc->hdlcrx.bitstream = bitstream;
  551. bc->hdlcrx.bitbuf = bitbuf;
  552. return ret;
  553. }
  554. /* --------------------------------------------------------------------- */
  555. #ifdef __i386__
  556. #include <asm/msr.h>
  557. #define GETTICK(x) \
  558. ({ \
  559. if (boot_cpu_has(X86_FEATURE_TSC)) \
  560. x = (unsigned int)rdtsc(); \
  561. })
  562. #else /* __i386__ */
  563. #define GETTICK(x)
  564. #endif /* __i386__ */
  565. static void epp_bh(struct work_struct *work)
  566. {
  567. struct net_device *dev;
  568. struct baycom_state *bc;
  569. struct parport *pp;
  570. unsigned char stat;
  571. unsigned char tmp[2];
  572. unsigned int time1 = 0, time2 = 0, time3 = 0;
  573. int cnt, cnt2;
  574. bc = container_of(work, struct baycom_state, run_work.work);
  575. dev = bc->dev;
  576. if (!bc->work_running)
  577. return;
  578. baycom_int_freq(bc);
  579. pp = bc->pdev->port;
  580. /* update status */
  581. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  582. goto epptimeout;
  583. bc->stat = stat;
  584. bc->debug_vals.last_pllcorr = stat;
  585. GETTICK(time1);
  586. if (bc->modem == EPP_FPGAEXTSTATUS) {
  587. /* get input count */
  588. tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE|1;
  589. if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
  590. goto epptimeout;
  591. if (pp->ops->epp_read_addr(pp, tmp, 2, 0) != 2)
  592. goto epptimeout;
  593. cnt = tmp[0] | (tmp[1] << 8);
  594. cnt &= 0x7fff;
  595. /* get output count */
  596. tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE|2;
  597. if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
  598. goto epptimeout;
  599. if (pp->ops->epp_read_addr(pp, tmp, 2, 0) != 2)
  600. goto epptimeout;
  601. cnt2 = tmp[0] | (tmp[1] << 8);
  602. cnt2 = 16384 - (cnt2 & 0x7fff);
  603. /* return to normal */
  604. tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE;
  605. if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
  606. goto epptimeout;
  607. if (transmit(bc, cnt2, stat))
  608. goto epptimeout;
  609. GETTICK(time2);
  610. if (receive(dev, cnt))
  611. goto epptimeout;
  612. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  613. goto epptimeout;
  614. bc->stat = stat;
  615. } else {
  616. /* try to tx */
  617. switch (stat & (EPP_NTAEF|EPP_NTHF)) {
  618. case EPP_NTHF:
  619. cnt = 2048 - 256;
  620. break;
  621. case EPP_NTAEF:
  622. cnt = 2048 - 1793;
  623. break;
  624. case 0:
  625. cnt = 0;
  626. break;
  627. default:
  628. cnt = 2048 - 1025;
  629. break;
  630. }
  631. if (transmit(bc, cnt, stat))
  632. goto epptimeout;
  633. GETTICK(time2);
  634. /* do receiver */
  635. while ((stat & (EPP_NRAEF|EPP_NRHF)) != EPP_NRHF) {
  636. switch (stat & (EPP_NRAEF|EPP_NRHF)) {
  637. case EPP_NRAEF:
  638. cnt = 1025;
  639. break;
  640. case 0:
  641. cnt = 1793;
  642. break;
  643. default:
  644. cnt = 256;
  645. break;
  646. }
  647. if (receive(dev, cnt))
  648. goto epptimeout;
  649. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  650. goto epptimeout;
  651. }
  652. cnt = 0;
  653. if (bc->bitrate < 50000)
  654. cnt = 256;
  655. else if (bc->bitrate < 100000)
  656. cnt = 128;
  657. while (cnt > 0 && stat & EPP_NREF) {
  658. if (receive(dev, 1))
  659. goto epptimeout;
  660. cnt--;
  661. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  662. goto epptimeout;
  663. }
  664. }
  665. GETTICK(time3);
  666. #ifdef BAYCOM_DEBUG
  667. bc->debug_vals.mod_cycles = time2 - time1;
  668. bc->debug_vals.demod_cycles = time3 - time2;
  669. #endif /* BAYCOM_DEBUG */
  670. schedule_delayed_work(&bc->run_work, 1);
  671. if (!bc->skb)
  672. netif_wake_queue(dev);
  673. return;
  674. epptimeout:
  675. printk(KERN_ERR "%s: EPP timeout!\n", bc_drvname);
  676. }
  677. /* ---------------------------------------------------------------------- */
  678. /*
  679. * ===================== network driver interface =========================
  680. */
  681. static int baycom_send_packet(struct sk_buff *skb, struct net_device *dev)
  682. {
  683. struct baycom_state *bc = netdev_priv(dev);
  684. if (skb->protocol == htons(ETH_P_IP))
  685. return ax25_ip_xmit(skb);
  686. if (skb->data[0] != 0) {
  687. do_kiss_params(bc, skb->data, skb->len);
  688. dev_kfree_skb(skb);
  689. return NETDEV_TX_OK;
  690. }
  691. if (bc->skb) {
  692. dev_kfree_skb(skb);
  693. return NETDEV_TX_OK;
  694. }
  695. /* strip KISS byte */
  696. if (skb->len >= HDLCDRV_MAXFLEN+1 || skb->len < 3) {
  697. dev_kfree_skb(skb);
  698. return NETDEV_TX_OK;
  699. }
  700. netif_stop_queue(dev);
  701. bc->skb = skb;
  702. return NETDEV_TX_OK;
  703. }
  704. /* --------------------------------------------------------------------- */
  705. static int baycom_set_mac_address(struct net_device *dev, void *addr)
  706. {
  707. struct sockaddr *sa = (struct sockaddr *)addr;
  708. /* addr is an AX.25 shifted ASCII mac address */
  709. memcpy(dev->dev_addr, sa->sa_data, dev->addr_len);
  710. return 0;
  711. }
  712. /* --------------------------------------------------------------------- */
  713. static void epp_wakeup(void *handle)
  714. {
  715. struct net_device *dev = (struct net_device *)handle;
  716. struct baycom_state *bc = netdev_priv(dev);
  717. printk(KERN_DEBUG "baycom_epp: %s: why am I being woken up?\n", dev->name);
  718. if (!parport_claim(bc->pdev))
  719. printk(KERN_DEBUG "baycom_epp: %s: I'm broken.\n", dev->name);
  720. }
  721. /* --------------------------------------------------------------------- */
  722. /*
  723. * Open/initialize the board. This is called (in the current kernel)
  724. * sometime after booting when the 'ifconfig' program is run.
  725. *
  726. * This routine should set everything up anew at each open, even
  727. * registers that "should" only need to be set once at boot, so that
  728. * there is non-reboot way to recover if something goes wrong.
  729. */
  730. static int epp_open(struct net_device *dev)
  731. {
  732. struct baycom_state *bc = netdev_priv(dev);
  733. struct parport *pp = parport_find_base(dev->base_addr);
  734. unsigned int i, j;
  735. unsigned char tmp[128];
  736. unsigned char stat;
  737. unsigned long tstart;
  738. if (!pp) {
  739. printk(KERN_ERR "%s: parport at 0x%lx unknown\n", bc_drvname, dev->base_addr);
  740. return -ENXIO;
  741. }
  742. #if 0
  743. if (pp->irq < 0) {
  744. printk(KERN_ERR "%s: parport at 0x%lx has no irq\n", bc_drvname, pp->base);
  745. parport_put_port(pp);
  746. return -ENXIO;
  747. }
  748. #endif
  749. if ((~pp->modes) & (PARPORT_MODE_TRISTATE | PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT)) {
  750. printk(KERN_ERR "%s: parport at 0x%lx cannot be used\n",
  751. bc_drvname, pp->base);
  752. parport_put_port(pp);
  753. return -EIO;
  754. }
  755. memset(&bc->modem, 0, sizeof(bc->modem));
  756. bc->pdev = parport_register_device(pp, dev->name, NULL, epp_wakeup,
  757. NULL, PARPORT_DEV_EXCL, dev);
  758. parport_put_port(pp);
  759. if (!bc->pdev) {
  760. printk(KERN_ERR "%s: cannot register parport at 0x%lx\n", bc_drvname, pp->base);
  761. return -ENXIO;
  762. }
  763. if (parport_claim(bc->pdev)) {
  764. printk(KERN_ERR "%s: parport at 0x%lx busy\n", bc_drvname, pp->base);
  765. parport_unregister_device(bc->pdev);
  766. return -EBUSY;
  767. }
  768. dev->irq = /*pp->irq*/ 0;
  769. INIT_DELAYED_WORK(&bc->run_work, epp_bh);
  770. bc->work_running = 1;
  771. bc->modem = EPP_CONVENTIONAL;
  772. if (eppconfig(bc))
  773. printk(KERN_INFO "%s: no FPGA detected, assuming conventional EPP modem\n", bc_drvname);
  774. else
  775. bc->modem = /*EPP_FPGA*/ EPP_FPGAEXTSTATUS;
  776. parport_write_control(pp, LPTCTRL_PROGRAM); /* prepare EPP mode; we aren't using interrupts */
  777. /* reset the modem */
  778. tmp[0] = 0;
  779. tmp[1] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE;
  780. if (pp->ops->epp_write_addr(pp, tmp, 2, 0) != 2)
  781. goto epptimeout;
  782. /* autoprobe baud rate */
  783. tstart = jiffies;
  784. i = 0;
  785. while (time_before(jiffies, tstart + HZ/3)) {
  786. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  787. goto epptimeout;
  788. if ((stat & (EPP_NRAEF|EPP_NRHF)) == EPP_NRHF) {
  789. schedule();
  790. continue;
  791. }
  792. if (pp->ops->epp_read_data(pp, tmp, 128, 0) != 128)
  793. goto epptimeout;
  794. if (pp->ops->epp_read_data(pp, tmp, 128, 0) != 128)
  795. goto epptimeout;
  796. i += 256;
  797. }
  798. for (j = 0; j < 256; j++) {
  799. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  800. goto epptimeout;
  801. if (!(stat & EPP_NREF))
  802. break;
  803. if (pp->ops->epp_read_data(pp, tmp, 1, 0) != 1)
  804. goto epptimeout;
  805. i++;
  806. }
  807. tstart = jiffies - tstart;
  808. bc->bitrate = i * (8 * HZ) / tstart;
  809. j = 1;
  810. i = bc->bitrate >> 3;
  811. while (j < 7 && i > 150) {
  812. j++;
  813. i >>= 1;
  814. }
  815. printk(KERN_INFO "%s: autoprobed bitrate: %d int divider: %d int rate: %d\n",
  816. bc_drvname, bc->bitrate, j, bc->bitrate >> (j+2));
  817. tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE/*|j*/;
  818. if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
  819. goto epptimeout;
  820. /*
  821. * initialise hdlc variables
  822. */
  823. bc->hdlcrx.state = 0;
  824. bc->hdlcrx.numbits = 0;
  825. bc->hdlctx.state = tx_idle;
  826. bc->hdlctx.bufcnt = 0;
  827. bc->hdlctx.slotcnt = bc->ch_params.slottime;
  828. bc->hdlctx.calibrate = 0;
  829. /* start the bottom half stuff */
  830. schedule_delayed_work(&bc->run_work, 1);
  831. netif_start_queue(dev);
  832. return 0;
  833. epptimeout:
  834. printk(KERN_ERR "%s: epp timeout during bitrate probe\n", bc_drvname);
  835. parport_write_control(pp, 0); /* reset the adapter */
  836. parport_release(bc->pdev);
  837. parport_unregister_device(bc->pdev);
  838. return -EIO;
  839. }
  840. /* --------------------------------------------------------------------- */
  841. static int epp_close(struct net_device *dev)
  842. {
  843. struct baycom_state *bc = netdev_priv(dev);
  844. struct parport *pp = bc->pdev->port;
  845. unsigned char tmp[1];
  846. bc->work_running = 0;
  847. cancel_delayed_work_sync(&bc->run_work);
  848. bc->stat = EPP_DCDBIT;
  849. tmp[0] = 0;
  850. pp->ops->epp_write_addr(pp, tmp, 1, 0);
  851. parport_write_control(pp, 0); /* reset the adapter */
  852. parport_release(bc->pdev);
  853. parport_unregister_device(bc->pdev);
  854. if (bc->skb)
  855. dev_kfree_skb(bc->skb);
  856. bc->skb = NULL;
  857. printk(KERN_INFO "%s: close epp at iobase 0x%lx irq %u\n",
  858. bc_drvname, dev->base_addr, dev->irq);
  859. return 0;
  860. }
  861. /* --------------------------------------------------------------------- */
  862. static int baycom_setmode(struct baycom_state *bc, const char *modestr)
  863. {
  864. const char *cp;
  865. if (strstr(modestr,"intclk"))
  866. bc->cfg.intclk = 1;
  867. if (strstr(modestr,"extclk"))
  868. bc->cfg.intclk = 0;
  869. if (strstr(modestr,"intmodem"))
  870. bc->cfg.extmodem = 0;
  871. if (strstr(modestr,"extmodem"))
  872. bc->cfg.extmodem = 1;
  873. if (strstr(modestr,"noloopback"))
  874. bc->cfg.loopback = 0;
  875. if (strstr(modestr,"loopback"))
  876. bc->cfg.loopback = 1;
  877. if ((cp = strstr(modestr,"fclk="))) {
  878. bc->cfg.fclk = simple_strtoul(cp+5, NULL, 0);
  879. if (bc->cfg.fclk < 1000000)
  880. bc->cfg.fclk = 1000000;
  881. if (bc->cfg.fclk > 25000000)
  882. bc->cfg.fclk = 25000000;
  883. }
  884. if ((cp = strstr(modestr,"bps="))) {
  885. bc->cfg.bps = simple_strtoul(cp+4, NULL, 0);
  886. if (bc->cfg.bps < 1000)
  887. bc->cfg.bps = 1000;
  888. if (bc->cfg.bps > 1500000)
  889. bc->cfg.bps = 1500000;
  890. }
  891. return 0;
  892. }
  893. /* --------------------------------------------------------------------- */
  894. static int baycom_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  895. {
  896. struct baycom_state *bc = netdev_priv(dev);
  897. struct hdlcdrv_ioctl hi;
  898. if (cmd != SIOCDEVPRIVATE)
  899. return -ENOIOCTLCMD;
  900. if (copy_from_user(&hi, ifr->ifr_data, sizeof(hi)))
  901. return -EFAULT;
  902. switch (hi.cmd) {
  903. default:
  904. return -ENOIOCTLCMD;
  905. case HDLCDRVCTL_GETCHANNELPAR:
  906. hi.data.cp.tx_delay = bc->ch_params.tx_delay;
  907. hi.data.cp.tx_tail = bc->ch_params.tx_tail;
  908. hi.data.cp.slottime = bc->ch_params.slottime;
  909. hi.data.cp.ppersist = bc->ch_params.ppersist;
  910. hi.data.cp.fulldup = bc->ch_params.fulldup;
  911. break;
  912. case HDLCDRVCTL_SETCHANNELPAR:
  913. if (!capable(CAP_NET_ADMIN))
  914. return -EACCES;
  915. bc->ch_params.tx_delay = hi.data.cp.tx_delay;
  916. bc->ch_params.tx_tail = hi.data.cp.tx_tail;
  917. bc->ch_params.slottime = hi.data.cp.slottime;
  918. bc->ch_params.ppersist = hi.data.cp.ppersist;
  919. bc->ch_params.fulldup = hi.data.cp.fulldup;
  920. bc->hdlctx.slotcnt = 1;
  921. return 0;
  922. case HDLCDRVCTL_GETMODEMPAR:
  923. hi.data.mp.iobase = dev->base_addr;
  924. hi.data.mp.irq = dev->irq;
  925. hi.data.mp.dma = dev->dma;
  926. hi.data.mp.dma2 = 0;
  927. hi.data.mp.seriobase = 0;
  928. hi.data.mp.pariobase = 0;
  929. hi.data.mp.midiiobase = 0;
  930. break;
  931. case HDLCDRVCTL_SETMODEMPAR:
  932. if ((!capable(CAP_SYS_RAWIO)) || netif_running(dev))
  933. return -EACCES;
  934. dev->base_addr = hi.data.mp.iobase;
  935. dev->irq = /*hi.data.mp.irq*/0;
  936. dev->dma = /*hi.data.mp.dma*/0;
  937. return 0;
  938. case HDLCDRVCTL_GETSTAT:
  939. hi.data.cs.ptt = !!(bc->stat & EPP_PTTBIT);
  940. hi.data.cs.dcd = !(bc->stat & EPP_DCDBIT);
  941. hi.data.cs.ptt_keyed = bc->ptt_keyed;
  942. hi.data.cs.tx_packets = dev->stats.tx_packets;
  943. hi.data.cs.tx_errors = dev->stats.tx_errors;
  944. hi.data.cs.rx_packets = dev->stats.rx_packets;
  945. hi.data.cs.rx_errors = dev->stats.rx_errors;
  946. break;
  947. case HDLCDRVCTL_OLDGETSTAT:
  948. hi.data.ocs.ptt = !!(bc->stat & EPP_PTTBIT);
  949. hi.data.ocs.dcd = !(bc->stat & EPP_DCDBIT);
  950. hi.data.ocs.ptt_keyed = bc->ptt_keyed;
  951. break;
  952. case HDLCDRVCTL_CALIBRATE:
  953. if (!capable(CAP_SYS_RAWIO))
  954. return -EACCES;
  955. bc->hdlctx.calibrate = hi.data.calibrate * bc->bitrate / 8;
  956. return 0;
  957. case HDLCDRVCTL_DRIVERNAME:
  958. strncpy(hi.data.drivername, "baycom_epp", sizeof(hi.data.drivername));
  959. break;
  960. case HDLCDRVCTL_GETMODE:
  961. sprintf(hi.data.modename, "%sclk,%smodem,fclk=%d,bps=%d%s",
  962. bc->cfg.intclk ? "int" : "ext",
  963. bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps,
  964. bc->cfg.loopback ? ",loopback" : "");
  965. break;
  966. case HDLCDRVCTL_SETMODE:
  967. if (!capable(CAP_NET_ADMIN) || netif_running(dev))
  968. return -EACCES;
  969. hi.data.modename[sizeof(hi.data.modename)-1] = '\0';
  970. return baycom_setmode(bc, hi.data.modename);
  971. case HDLCDRVCTL_MODELIST:
  972. strncpy(hi.data.modename, "intclk,extclk,intmodem,extmodem,divider=x",
  973. sizeof(hi.data.modename));
  974. break;
  975. case HDLCDRVCTL_MODEMPARMASK:
  976. return HDLCDRV_PARMASK_IOBASE;
  977. }
  978. if (copy_to_user(ifr->ifr_data, &hi, sizeof(hi)))
  979. return -EFAULT;
  980. return 0;
  981. }
  982. /* --------------------------------------------------------------------- */
  983. static const struct net_device_ops baycom_netdev_ops = {
  984. .ndo_open = epp_open,
  985. .ndo_stop = epp_close,
  986. .ndo_do_ioctl = baycom_ioctl,
  987. .ndo_start_xmit = baycom_send_packet,
  988. .ndo_set_mac_address = baycom_set_mac_address,
  989. };
  990. /*
  991. * Check for a network adaptor of this type, and return '0' if one exists.
  992. * If dev->base_addr == 0, probe all likely locations.
  993. * If dev->base_addr == 1, always return failure.
  994. * If dev->base_addr == 2, allocate space for the device and return success
  995. * (detachable devices only).
  996. */
  997. static void baycom_probe(struct net_device *dev)
  998. {
  999. const struct hdlcdrv_channel_params dflt_ch_params = {
  1000. 20, 2, 10, 40, 0
  1001. };
  1002. struct baycom_state *bc;
  1003. /*
  1004. * not a real probe! only initialize data structures
  1005. */
  1006. bc = netdev_priv(dev);
  1007. /*
  1008. * initialize the baycom_state struct
  1009. */
  1010. bc->ch_params = dflt_ch_params;
  1011. bc->ptt_keyed = 0;
  1012. /*
  1013. * initialize the device struct
  1014. */
  1015. /* Fill in the fields of the device structure */
  1016. bc->skb = NULL;
  1017. dev->netdev_ops = &baycom_netdev_ops;
  1018. dev->header_ops = &ax25_header_ops;
  1019. dev->type = ARPHRD_AX25; /* AF_AX25 device */
  1020. dev->hard_header_len = AX25_MAX_HEADER_LEN + AX25_BPQ_HEADER_LEN;
  1021. dev->mtu = AX25_DEF_PACLEN; /* eth_mtu is the default */
  1022. dev->addr_len = AX25_ADDR_LEN; /* sizeof an ax.25 address */
  1023. memcpy(dev->broadcast, &ax25_bcast, AX25_ADDR_LEN);
  1024. memcpy(dev->dev_addr, &null_ax25_address, AX25_ADDR_LEN);
  1025. dev->tx_queue_len = 16;
  1026. /* New style flags */
  1027. dev->flags = 0;
  1028. }
  1029. /* --------------------------------------------------------------------- */
  1030. /*
  1031. * command line settable parameters
  1032. */
  1033. static char *mode[NR_PORTS] = { "", };
  1034. static int iobase[NR_PORTS] = { 0x378, };
  1035. module_param_array(mode, charp, NULL, 0);
  1036. MODULE_PARM_DESC(mode, "baycom operating mode");
  1037. module_param_array(iobase, int, NULL, 0);
  1038. MODULE_PARM_DESC(iobase, "baycom io base address");
  1039. MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
  1040. MODULE_DESCRIPTION("Baycom epp amateur radio modem driver");
  1041. MODULE_LICENSE("GPL");
  1042. /* --------------------------------------------------------------------- */
  1043. static void __init baycom_epp_dev_setup(struct net_device *dev)
  1044. {
  1045. struct baycom_state *bc = netdev_priv(dev);
  1046. /*
  1047. * initialize part of the baycom_state struct
  1048. */
  1049. bc->dev = dev;
  1050. bc->magic = BAYCOM_MAGIC;
  1051. bc->cfg.fclk = 19666600;
  1052. bc->cfg.bps = 9600;
  1053. /*
  1054. * initialize part of the device struct
  1055. */
  1056. baycom_probe(dev);
  1057. }
  1058. static int __init init_baycomepp(void)
  1059. {
  1060. int i, found = 0;
  1061. char set_hw = 1;
  1062. printk(bc_drvinfo);
  1063. /*
  1064. * register net devices
  1065. */
  1066. for (i = 0; i < NR_PORTS; i++) {
  1067. struct net_device *dev;
  1068. dev = alloc_netdev(sizeof(struct baycom_state), "bce%d",
  1069. NET_NAME_UNKNOWN, baycom_epp_dev_setup);
  1070. if (!dev) {
  1071. printk(KERN_WARNING "bce%d : out of memory\n", i);
  1072. return found ? 0 : -ENOMEM;
  1073. }
  1074. sprintf(dev->name, "bce%d", i);
  1075. dev->base_addr = iobase[i];
  1076. if (!mode[i])
  1077. set_hw = 0;
  1078. if (!set_hw)
  1079. iobase[i] = 0;
  1080. if (register_netdev(dev)) {
  1081. printk(KERN_WARNING "%s: cannot register net device %s\n", bc_drvname, dev->name);
  1082. free_netdev(dev);
  1083. break;
  1084. }
  1085. if (set_hw && baycom_setmode(netdev_priv(dev), mode[i]))
  1086. set_hw = 0;
  1087. baycom_device[i] = dev;
  1088. found++;
  1089. }
  1090. return found ? 0 : -ENXIO;
  1091. }
  1092. static void __exit cleanup_baycomepp(void)
  1093. {
  1094. int i;
  1095. for(i = 0; i < NR_PORTS; i++) {
  1096. struct net_device *dev = baycom_device[i];
  1097. if (dev) {
  1098. struct baycom_state *bc = netdev_priv(dev);
  1099. if (bc->magic == BAYCOM_MAGIC) {
  1100. unregister_netdev(dev);
  1101. free_netdev(dev);
  1102. } else
  1103. printk(paranoia_str, "cleanup_module");
  1104. }
  1105. }
  1106. }
  1107. module_init(init_baycomepp);
  1108. module_exit(cleanup_baycomepp);
  1109. /* --------------------------------------------------------------------- */
  1110. #ifndef MODULE
  1111. /*
  1112. * format: baycom_epp=io,mode
  1113. * mode: fpga config options
  1114. */
  1115. static int __init baycom_epp_setup(char *str)
  1116. {
  1117. static unsigned __initdata nr_dev = 0;
  1118. int ints[2];
  1119. if (nr_dev >= NR_PORTS)
  1120. return 0;
  1121. str = get_options(str, 2, ints);
  1122. if (ints[0] < 1)
  1123. return 0;
  1124. mode[nr_dev] = str;
  1125. iobase[nr_dev] = ints[1];
  1126. nr_dev++;
  1127. return 1;
  1128. }
  1129. __setup("baycom_epp=", baycom_epp_setup);
  1130. #endif /* MODULE */
  1131. /* --------------------------------------------------------------------- */