ipu-dp.c 8.2 KB

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  1. /*
  2. * Copyright (c) 2010 Sascha Hauer <s.hauer@pengutronix.de>
  3. * Copyright (C) 2005-2009 Freescale Semiconductor, Inc.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License as published by the
  7. * Free Software Foundation; either version 2 of the License, or (at your
  8. * option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  12. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  13. * for more details.
  14. */
  15. #include <linux/export.h>
  16. #include <linux/kernel.h>
  17. #include <linux/types.h>
  18. #include <linux/errno.h>
  19. #include <linux/io.h>
  20. #include <linux/err.h>
  21. #include <video/imx-ipu-v3.h>
  22. #include "ipu-prv.h"
  23. #define DP_SYNC 0
  24. #define DP_ASYNC0 0x60
  25. #define DP_ASYNC1 0xBC
  26. #define DP_COM_CONF 0x0
  27. #define DP_GRAPH_WIND_CTRL 0x0004
  28. #define DP_FG_POS 0x0008
  29. #define DP_CSC_A_0 0x0044
  30. #define DP_CSC_A_1 0x0048
  31. #define DP_CSC_A_2 0x004C
  32. #define DP_CSC_A_3 0x0050
  33. #define DP_CSC_0 0x0054
  34. #define DP_CSC_1 0x0058
  35. #define DP_COM_CONF_FG_EN (1 << 0)
  36. #define DP_COM_CONF_GWSEL (1 << 1)
  37. #define DP_COM_CONF_GWAM (1 << 2)
  38. #define DP_COM_CONF_GWCKE (1 << 3)
  39. #define DP_COM_CONF_CSC_DEF_MASK (3 << 8)
  40. #define DP_COM_CONF_CSC_DEF_OFFSET 8
  41. #define DP_COM_CONF_CSC_DEF_FG (3 << 8)
  42. #define DP_COM_CONF_CSC_DEF_BG (2 << 8)
  43. #define DP_COM_CONF_CSC_DEF_BOTH (1 << 8)
  44. #define IPUV3_NUM_FLOWS 3
  45. struct ipu_dp_priv;
  46. struct ipu_dp {
  47. u32 flow;
  48. bool in_use;
  49. bool foreground;
  50. enum ipu_color_space in_cs;
  51. };
  52. struct ipu_flow {
  53. struct ipu_dp foreground;
  54. struct ipu_dp background;
  55. enum ipu_color_space out_cs;
  56. void __iomem *base;
  57. struct ipu_dp_priv *priv;
  58. };
  59. struct ipu_dp_priv {
  60. struct ipu_soc *ipu;
  61. struct device *dev;
  62. void __iomem *base;
  63. struct ipu_flow flow[IPUV3_NUM_FLOWS];
  64. struct mutex mutex;
  65. int use_count;
  66. };
  67. static u32 ipu_dp_flow_base[] = {DP_SYNC, DP_ASYNC0, DP_ASYNC1};
  68. static inline struct ipu_flow *to_flow(struct ipu_dp *dp)
  69. {
  70. if (dp->foreground)
  71. return container_of(dp, struct ipu_flow, foreground);
  72. else
  73. return container_of(dp, struct ipu_flow, background);
  74. }
  75. int ipu_dp_set_global_alpha(struct ipu_dp *dp, bool enable,
  76. u8 alpha, bool bg_chan)
  77. {
  78. struct ipu_flow *flow = to_flow(dp);
  79. struct ipu_dp_priv *priv = flow->priv;
  80. u32 reg;
  81. mutex_lock(&priv->mutex);
  82. reg = readl(flow->base + DP_COM_CONF);
  83. if (bg_chan)
  84. reg &= ~DP_COM_CONF_GWSEL;
  85. else
  86. reg |= DP_COM_CONF_GWSEL;
  87. writel(reg, flow->base + DP_COM_CONF);
  88. if (enable) {
  89. reg = readl(flow->base + DP_GRAPH_WIND_CTRL) & 0x00FFFFFFL;
  90. writel(reg | ((u32) alpha << 24),
  91. flow->base + DP_GRAPH_WIND_CTRL);
  92. reg = readl(flow->base + DP_COM_CONF);
  93. writel(reg | DP_COM_CONF_GWAM, flow->base + DP_COM_CONF);
  94. } else {
  95. reg = readl(flow->base + DP_COM_CONF);
  96. writel(reg & ~DP_COM_CONF_GWAM, flow->base + DP_COM_CONF);
  97. }
  98. ipu_srm_dp_sync_update(priv->ipu);
  99. mutex_unlock(&priv->mutex);
  100. return 0;
  101. }
  102. EXPORT_SYMBOL_GPL(ipu_dp_set_global_alpha);
  103. int ipu_dp_set_window_pos(struct ipu_dp *dp, u16 x_pos, u16 y_pos)
  104. {
  105. struct ipu_flow *flow = to_flow(dp);
  106. struct ipu_dp_priv *priv = flow->priv;
  107. writel((x_pos << 16) | y_pos, flow->base + DP_FG_POS);
  108. ipu_srm_dp_sync_update(priv->ipu);
  109. return 0;
  110. }
  111. EXPORT_SYMBOL_GPL(ipu_dp_set_window_pos);
  112. static void ipu_dp_csc_init(struct ipu_flow *flow,
  113. enum ipu_color_space in,
  114. enum ipu_color_space out,
  115. u32 place)
  116. {
  117. u32 reg;
  118. reg = readl(flow->base + DP_COM_CONF);
  119. reg &= ~DP_COM_CONF_CSC_DEF_MASK;
  120. if (in == out) {
  121. writel(reg, flow->base + DP_COM_CONF);
  122. return;
  123. }
  124. if (in == IPUV3_COLORSPACE_RGB && out == IPUV3_COLORSPACE_YUV) {
  125. writel(0x099 | (0x12d << 16), flow->base + DP_CSC_A_0);
  126. writel(0x03a | (0x3a9 << 16), flow->base + DP_CSC_A_1);
  127. writel(0x356 | (0x100 << 16), flow->base + DP_CSC_A_2);
  128. writel(0x100 | (0x329 << 16), flow->base + DP_CSC_A_3);
  129. writel(0x3d6 | (0x0000 << 16) | (2 << 30),
  130. flow->base + DP_CSC_0);
  131. writel(0x200 | (2 << 14) | (0x200 << 16) | (2 << 30),
  132. flow->base + DP_CSC_1);
  133. } else {
  134. writel(0x095 | (0x000 << 16), flow->base + DP_CSC_A_0);
  135. writel(0x0cc | (0x095 << 16), flow->base + DP_CSC_A_1);
  136. writel(0x3ce | (0x398 << 16), flow->base + DP_CSC_A_2);
  137. writel(0x095 | (0x0ff << 16), flow->base + DP_CSC_A_3);
  138. writel(0x000 | (0x3e42 << 16) | (1 << 30),
  139. flow->base + DP_CSC_0);
  140. writel(0x10a | (1 << 14) | (0x3dd6 << 16) | (1 << 30),
  141. flow->base + DP_CSC_1);
  142. }
  143. reg |= place;
  144. writel(reg, flow->base + DP_COM_CONF);
  145. }
  146. int ipu_dp_setup_channel(struct ipu_dp *dp,
  147. enum ipu_color_space in,
  148. enum ipu_color_space out)
  149. {
  150. struct ipu_flow *flow = to_flow(dp);
  151. struct ipu_dp_priv *priv = flow->priv;
  152. mutex_lock(&priv->mutex);
  153. dp->in_cs = in;
  154. if (!dp->foreground)
  155. flow->out_cs = out;
  156. if (flow->foreground.in_cs == flow->background.in_cs) {
  157. /*
  158. * foreground and background are of same colorspace, put
  159. * colorspace converter after combining unit.
  160. */
  161. ipu_dp_csc_init(flow, flow->foreground.in_cs, flow->out_cs,
  162. DP_COM_CONF_CSC_DEF_BOTH);
  163. } else {
  164. if (flow->foreground.in_cs == flow->out_cs)
  165. /*
  166. * foreground identical to output, apply color
  167. * conversion on background
  168. */
  169. ipu_dp_csc_init(flow, flow->background.in_cs,
  170. flow->out_cs, DP_COM_CONF_CSC_DEF_BG);
  171. else
  172. ipu_dp_csc_init(flow, flow->foreground.in_cs,
  173. flow->out_cs, DP_COM_CONF_CSC_DEF_FG);
  174. }
  175. ipu_srm_dp_sync_update(priv->ipu);
  176. mutex_unlock(&priv->mutex);
  177. return 0;
  178. }
  179. EXPORT_SYMBOL_GPL(ipu_dp_setup_channel);
  180. int ipu_dp_enable(struct ipu_soc *ipu)
  181. {
  182. struct ipu_dp_priv *priv = ipu->dp_priv;
  183. mutex_lock(&priv->mutex);
  184. if (!priv->use_count)
  185. ipu_module_enable(priv->ipu, IPU_CONF_DP_EN);
  186. priv->use_count++;
  187. mutex_unlock(&priv->mutex);
  188. return 0;
  189. }
  190. EXPORT_SYMBOL_GPL(ipu_dp_enable);
  191. int ipu_dp_enable_channel(struct ipu_dp *dp)
  192. {
  193. struct ipu_flow *flow = to_flow(dp);
  194. struct ipu_dp_priv *priv = flow->priv;
  195. u32 reg;
  196. if (!dp->foreground)
  197. return 0;
  198. mutex_lock(&priv->mutex);
  199. reg = readl(flow->base + DP_COM_CONF);
  200. reg |= DP_COM_CONF_FG_EN;
  201. writel(reg, flow->base + DP_COM_CONF);
  202. ipu_srm_dp_sync_update(priv->ipu);
  203. mutex_unlock(&priv->mutex);
  204. return 0;
  205. }
  206. EXPORT_SYMBOL_GPL(ipu_dp_enable_channel);
  207. void ipu_dp_disable_channel(struct ipu_dp *dp)
  208. {
  209. struct ipu_flow *flow = to_flow(dp);
  210. struct ipu_dp_priv *priv = flow->priv;
  211. u32 reg, csc;
  212. if (!dp->foreground)
  213. return;
  214. mutex_lock(&priv->mutex);
  215. reg = readl(flow->base + DP_COM_CONF);
  216. csc = reg & DP_COM_CONF_CSC_DEF_MASK;
  217. if (csc == DP_COM_CONF_CSC_DEF_FG)
  218. reg &= ~DP_COM_CONF_CSC_DEF_MASK;
  219. reg &= ~DP_COM_CONF_FG_EN;
  220. writel(reg, flow->base + DP_COM_CONF);
  221. writel(0, flow->base + DP_FG_POS);
  222. ipu_srm_dp_sync_update(priv->ipu);
  223. if (ipu_idmac_channel_busy(priv->ipu, IPUV3_CHANNEL_MEM_BG_SYNC))
  224. ipu_wait_interrupt(priv->ipu, IPU_IRQ_DP_SF_END, 50);
  225. mutex_unlock(&priv->mutex);
  226. }
  227. EXPORT_SYMBOL_GPL(ipu_dp_disable_channel);
  228. void ipu_dp_disable(struct ipu_soc *ipu)
  229. {
  230. struct ipu_dp_priv *priv = ipu->dp_priv;
  231. mutex_lock(&priv->mutex);
  232. priv->use_count--;
  233. if (!priv->use_count)
  234. ipu_module_disable(priv->ipu, IPU_CONF_DP_EN);
  235. if (priv->use_count < 0)
  236. priv->use_count = 0;
  237. mutex_unlock(&priv->mutex);
  238. }
  239. EXPORT_SYMBOL_GPL(ipu_dp_disable);
  240. struct ipu_dp *ipu_dp_get(struct ipu_soc *ipu, unsigned int flow)
  241. {
  242. struct ipu_dp_priv *priv = ipu->dp_priv;
  243. struct ipu_dp *dp;
  244. if ((flow >> 1) >= IPUV3_NUM_FLOWS)
  245. return ERR_PTR(-EINVAL);
  246. if (flow & 1)
  247. dp = &priv->flow[flow >> 1].foreground;
  248. else
  249. dp = &priv->flow[flow >> 1].background;
  250. if (dp->in_use)
  251. return ERR_PTR(-EBUSY);
  252. dp->in_use = true;
  253. return dp;
  254. }
  255. EXPORT_SYMBOL_GPL(ipu_dp_get);
  256. void ipu_dp_put(struct ipu_dp *dp)
  257. {
  258. dp->in_use = false;
  259. }
  260. EXPORT_SYMBOL_GPL(ipu_dp_put);
  261. int ipu_dp_init(struct ipu_soc *ipu, struct device *dev, unsigned long base)
  262. {
  263. struct ipu_dp_priv *priv;
  264. int i;
  265. priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  266. if (!priv)
  267. return -ENOMEM;
  268. priv->dev = dev;
  269. priv->ipu = ipu;
  270. ipu->dp_priv = priv;
  271. priv->base = devm_ioremap(dev, base, PAGE_SIZE);
  272. if (!priv->base)
  273. return -ENOMEM;
  274. mutex_init(&priv->mutex);
  275. for (i = 0; i < IPUV3_NUM_FLOWS; i++) {
  276. priv->flow[i].foreground.foreground = true;
  277. priv->flow[i].base = priv->base + ipu_dp_flow_base[i];
  278. priv->flow[i].priv = priv;
  279. }
  280. return 0;
  281. }
  282. void ipu_dp_exit(struct ipu_soc *ipu)
  283. {
  284. }