p1022ds.dtsi 5.4 KB

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  1. /*
  2. * P1022 DS Device Tree Source stub (no addresses or top-level ranges)
  3. *
  4. * Copyright 2012 Freescale Semiconductor Inc.
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions are met:
  8. * * Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * * Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in the
  12. * documentation and/or other materials provided with the distribution.
  13. * * Neither the name of Freescale Semiconductor nor the
  14. * names of its contributors may be used to endorse or promote products
  15. * derived from this software without specific prior written permission.
  16. *
  17. *
  18. * ALTERNATIVELY, this software may be distributed under the terms of the
  19. * GNU General Public License ("GPL") as published by the Free Software
  20. * Foundation, either version 2 of that License or (at your option) any
  21. * later version.
  22. *
  23. * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
  24. * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26. * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  27. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  30. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33. */
  34. &board_lbc {
  35. nor@0,0 {
  36. #address-cells = <1>;
  37. #size-cells = <1>;
  38. compatible = "cfi-flash";
  39. reg = <0x0 0x0 0x8000000>;
  40. bank-width = <2>;
  41. device-width = <1>;
  42. partition@0 {
  43. reg = <0x0 0x03000000>;
  44. label = "ramdisk-nor";
  45. read-only;
  46. };
  47. partition@3000000 {
  48. reg = <0x03000000 0x00e00000>;
  49. label = "diagnostic-nor";
  50. read-only;
  51. };
  52. partition@3e00000 {
  53. reg = <0x03e00000 0x00200000>;
  54. label = "dink-nor";
  55. read-only;
  56. };
  57. partition@4000000 {
  58. reg = <0x04000000 0x00400000>;
  59. label = "kernel-nor";
  60. read-only;
  61. };
  62. partition@4400000 {
  63. reg = <0x04400000 0x03b00000>;
  64. label = "jffs2-nor";
  65. };
  66. partition@7f00000 {
  67. reg = <0x07f00000 0x00080000>;
  68. label = "dtb-nor";
  69. read-only;
  70. };
  71. partition@7f80000 {
  72. reg = <0x07f80000 0x00080000>;
  73. label = "u-boot-nor";
  74. read-only;
  75. };
  76. };
  77. nand@2,0 {
  78. #address-cells = <1>;
  79. #size-cells = <1>;
  80. compatible = "fsl,elbc-fcm-nand";
  81. reg = <0x2 0x0 0x40000>;
  82. partition@0 {
  83. reg = <0x0 0x02000000>;
  84. label = "u-boot-nand";
  85. read-only;
  86. };
  87. partition@2000000 {
  88. reg = <0x02000000 0x10000000>;
  89. label = "jffs2-nand";
  90. };
  91. partition@12000000 {
  92. reg = <0x12000000 0x10000000>;
  93. label = "ramdisk-nand";
  94. read-only;
  95. };
  96. partition@22000000 {
  97. reg = <0x22000000 0x04000000>;
  98. label = "kernel-nand";
  99. };
  100. partition@26000000 {
  101. reg = <0x26000000 0x01000000>;
  102. label = "dtb-nand";
  103. read-only;
  104. };
  105. partition@27000000 {
  106. reg = <0x27000000 0x19000000>;
  107. label = "reserved-nand";
  108. };
  109. };
  110. board-control@3,0 {
  111. compatible = "fsl,p1022ds-fpga", "fsl,fpga-ngpixis";
  112. reg = <3 0 0x30>;
  113. interrupt-parent = <&mpic>;
  114. /*
  115. * IRQ8 is generated if the "EVENT" switch is pressed
  116. * and PX_CTL[EVESEL] is set to 00.
  117. */
  118. interrupts = <8 0 0 0>;
  119. };
  120. };
  121. &board_soc {
  122. i2c@3100 {
  123. wm8776:codec@1a {
  124. compatible = "wlf,wm8776";
  125. reg = <0x1a>;
  126. /*
  127. * clock-frequency will be set by U-Boot if
  128. * the clock is enabled.
  129. */
  130. };
  131. rtc@68 {
  132. compatible = "dallas,ds3232";
  133. reg = <0x68>;
  134. interrupts = <0x1 0x1 0 0>;
  135. };
  136. adt7461@4c {
  137. compatible = "adi,adt7461";
  138. reg = <0x4c>;
  139. };
  140. };
  141. spi@7000 {
  142. flash@0 {
  143. #address-cells = <1>;
  144. #size-cells = <1>;
  145. compatible = "spansion,s25sl12801", "jedec,spi-nor";
  146. reg = <0>;
  147. spi-max-frequency = <40000000>; /* input clock */
  148. partition@0 {
  149. label = "u-boot-spi";
  150. reg = <0x00000000 0x00100000>;
  151. read-only;
  152. };
  153. partition@100000 {
  154. label = "kernel-spi";
  155. reg = <0x00100000 0x00500000>;
  156. read-only;
  157. };
  158. partition@600000 {
  159. label = "dtb-spi";
  160. reg = <0x00600000 0x00100000>;
  161. read-only;
  162. };
  163. partition@700000 {
  164. label = "file system-spi";
  165. reg = <0x00700000 0x00900000>;
  166. };
  167. };
  168. };
  169. ssi@15000 {
  170. fsl,mode = "i2s-slave";
  171. codec-handle = <&wm8776>;
  172. fsl,ssi-asynchronous;
  173. };
  174. usb@22000 {
  175. phy_type = "ulpi";
  176. };
  177. usb@23000 {
  178. status = "disabled";
  179. };
  180. mdio@24000 {
  181. phy0: ethernet-phy@0 {
  182. interrupts = <3 1 0 0>;
  183. reg = <0x1>;
  184. };
  185. phy1: ethernet-phy@1 {
  186. interrupts = <9 1 0 0>;
  187. reg = <0x2>;
  188. };
  189. tbi-phy@2 {
  190. device_type = "tbi-phy";
  191. reg = <0x2>;
  192. };
  193. };
  194. ptp_clock@b0e00 {
  195. compatible = "fsl,etsec-ptp";
  196. reg = <0xb0e00 0xb0>;
  197. interrupts = <68 2 0 0 69 2 0 0>;
  198. fsl,tclk-period = <5>;
  199. fsl,tmr-prsc = <2>;
  200. fsl,tmr-add = <0xc01ebd3d>;
  201. fsl,tmr-fiper1 = <999999995>;
  202. fsl,tmr-fiper2 = <99990>;
  203. fsl,max-adj = <266499999>;
  204. };
  205. ethernet@b0000 {
  206. phy-handle = <&phy0>;
  207. phy-connection-type = "rgmii-id";
  208. };
  209. ethernet@b1000 {
  210. phy-handle = <&phy1>;
  211. phy-connection-type = "rgmii-id";
  212. };
  213. };