b4si-post.dtsi 12 KB

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  1. /*
  2. * B4420 Silicon/SoC Device Tree Source (post include)
  3. *
  4. * Copyright 2012 - 2015 Freescale Semiconductor, Inc.
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions are met:
  8. * * Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * * Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in the
  12. * documentation and/or other materials provided with the distribution.
  13. * * Neither the name of Freescale Semiconductor nor the
  14. * names of its contributors may be used to endorse or promote products
  15. * derived from this software without specific prior written permission.
  16. *
  17. *
  18. * ALTERNATIVELY, this software may be distributed under the terms of the
  19. * GNU General Public License ("GPL") as published by the Free Software
  20. * Foundation, either version 2 of that License or (at your option) any
  21. * later version.
  22. *
  23. * This software is provided by Freescale Semiconductor "as is" and any
  24. * express or implied warranties, including, but not limited to, the implied
  25. * warranties of merchantability and fitness for a particular purpose are
  26. * disclaimed. In no event shall Freescale Semiconductor be liable for any
  27. * direct, indirect, incidental, special, exemplary, or consequential damages
  28. * (including, but not limited to, procurement of substitute goods or services;
  29. * loss of use, data, or profits; or business interruption) however caused and
  30. * on any theory of liability, whether in contract, strict liability, or tort
  31. * (including negligence or otherwise) arising in any way out of the use of
  32. * this software, even if advised of the possibility of such damage.
  33. */
  34. &bman_fbpr {
  35. compatible = "fsl,bman-fbpr";
  36. alloc-ranges = <0 0 0x10000 0>;
  37. };
  38. &qman_fqd {
  39. compatible = "fsl,qman-fqd";
  40. alloc-ranges = <0 0 0x10000 0>;
  41. };
  42. &qman_pfdr {
  43. compatible = "fsl,qman-pfdr";
  44. alloc-ranges = <0 0 0x10000 0>;
  45. };
  46. &ifc {
  47. #address-cells = <2>;
  48. #size-cells = <1>;
  49. compatible = "fsl,ifc", "simple-bus";
  50. interrupts = <25 2 0 0>;
  51. };
  52. /* controller at 0x200000 */
  53. &pci0 {
  54. compatible = "fsl,b4-pcie", "fsl,qoriq-pcie-v2.4";
  55. device_type = "pci";
  56. #size-cells = <2>;
  57. #address-cells = <3>;
  58. bus-range = <0x0 0xff>;
  59. interrupts = <20 2 0 0>;
  60. fsl,iommu-parent = <&pamu0>;
  61. pcie@0 {
  62. #interrupt-cells = <1>;
  63. #size-cells = <2>;
  64. #address-cells = <3>;
  65. device_type = "pci";
  66. reg = <0 0 0 0 0>;
  67. interrupts = <20 2 0 0>;
  68. interrupt-map-mask = <0xf800 0 0 7>;
  69. interrupt-map = <
  70. /* IDSEL 0x0 */
  71. 0000 0 0 1 &mpic 40 1 0 0
  72. 0000 0 0 2 &mpic 1 1 0 0
  73. 0000 0 0 3 &mpic 2 1 0 0
  74. 0000 0 0 4 &mpic 3 1 0 0
  75. >;
  76. };
  77. };
  78. &dcsr {
  79. #address-cells = <1>;
  80. #size-cells = <1>;
  81. compatible = "fsl,dcsr", "simple-bus";
  82. dcsr-epu@0 {
  83. compatible = "fsl,b4-dcsr-epu", "fsl,dcsr-epu";
  84. interrupts = <52 2 0 0
  85. 84 2 0 0
  86. 85 2 0 0
  87. 94 2 0 0
  88. 95 2 0 0>;
  89. reg = <0x0 0x1000>;
  90. };
  91. dcsr-npc {
  92. compatible = "fsl,b4-dcsr-cnpc", "fsl,dcsr-cnpc";
  93. reg = <0x1000 0x1000 0x1002000 0x10000>;
  94. };
  95. dcsr-nxc@2000 {
  96. compatible = "fsl,dcsr-nxc";
  97. reg = <0x2000 0x1000>;
  98. };
  99. dcsr-corenet {
  100. compatible = "fsl,dcsr-corenet";
  101. reg = <0x8000 0x1000 0x1A000 0x1000>;
  102. };
  103. dcsr-dpaa@9000 {
  104. compatible = "fsl,b4-dcsr-dpaa", "fsl,dcsr-dpaa";
  105. reg = <0x9000 0x1000>;
  106. };
  107. dcsr-ocn@11000 {
  108. compatible = "fsl,b4-dcsr-ocn", "fsl,dcsr-ocn";
  109. reg = <0x11000 0x1000>;
  110. };
  111. dcsr-ddr@12000 {
  112. compatible = "fsl,dcsr-ddr";
  113. dev-handle = <&ddr1>;
  114. reg = <0x12000 0x1000>;
  115. };
  116. dcsr-nal@18000 {
  117. compatible = "fsl,b4-dcsr-nal", "fsl,dcsr-nal";
  118. reg = <0x18000 0x1000>;
  119. };
  120. dcsr-rcpm@22000 {
  121. compatible = "fsl,b4-dcsr-rcpm", "fsl,dcsr-rcpm";
  122. reg = <0x22000 0x1000>;
  123. };
  124. dcsr-snpc@30000 {
  125. compatible = "fsl,b4-dcsr-snpc", "fsl,dcsr-snpc";
  126. reg = <0x30000 0x1000 0x1022000 0x10000>;
  127. };
  128. dcsr-snpc@31000 {
  129. compatible = "fsl,b4-dcsr-snpc", "fsl,dcsr-snpc";
  130. reg = <0x31000 0x1000 0x1042000 0x10000>;
  131. };
  132. dcsr-cpu-sb-proxy@100000 {
  133. compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
  134. cpu-handle = <&cpu0>;
  135. reg = <0x100000 0x1000 0x101000 0x1000>;
  136. };
  137. };
  138. &bportals {
  139. #address-cells = <0x1>;
  140. #size-cells = <0x1>;
  141. compatible = "simple-bus";
  142. bman-portal@0 {
  143. compatible = "fsl,bman-portal";
  144. reg = <0x0 0x4000>, <0x1000000 0x1000>;
  145. interrupts = <105 2 0 0>;
  146. };
  147. bman-portal@4000 {
  148. compatible = "fsl,bman-portal";
  149. reg = <0x4000 0x4000>, <0x1001000 0x1000>;
  150. interrupts = <107 2 0 0>;
  151. };
  152. bman-portal@8000 {
  153. compatible = "fsl,bman-portal";
  154. reg = <0x8000 0x4000>, <0x1002000 0x1000>;
  155. interrupts = <109 2 0 0>;
  156. };
  157. bman-portal@c000 {
  158. compatible = "fsl,bman-portal";
  159. reg = <0xc000 0x4000>, <0x1003000 0x1000>;
  160. interrupts = <111 2 0 0>;
  161. };
  162. bman-portal@10000 {
  163. compatible = "fsl,bman-portal";
  164. reg = <0x10000 0x4000>, <0x1004000 0x1000>;
  165. interrupts = <113 2 0 0>;
  166. };
  167. bman-portal@14000 {
  168. compatible = "fsl,bman-portal";
  169. reg = <0x14000 0x4000>, <0x1005000 0x1000>;
  170. interrupts = <115 2 0 0>;
  171. };
  172. bman-portal@18000 {
  173. compatible = "fsl,bman-portal";
  174. reg = <0x18000 0x4000>, <0x1006000 0x1000>;
  175. interrupts = <117 2 0 0>;
  176. };
  177. bman-portal@1c000 {
  178. compatible = "fsl,bman-portal";
  179. reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
  180. interrupts = <119 2 0 0>;
  181. };
  182. bman-portal@20000 {
  183. compatible = "fsl,bman-portal";
  184. reg = <0x20000 0x4000>, <0x1008000 0x1000>;
  185. interrupts = <121 2 0 0>;
  186. };
  187. bman-portal@24000 {
  188. compatible = "fsl,bman-portal";
  189. reg = <0x24000 0x4000>, <0x1009000 0x1000>;
  190. interrupts = <123 2 0 0>;
  191. };
  192. bman-portal@28000 {
  193. compatible = "fsl,bman-portal";
  194. reg = <0x28000 0x4000>, <0x100a000 0x1000>;
  195. interrupts = <125 2 0 0>;
  196. };
  197. bman-portal@2c000 {
  198. compatible = "fsl,bman-portal";
  199. reg = <0x2c000 0x4000>, <0x100b000 0x1000>;
  200. interrupts = <127 2 0 0>;
  201. };
  202. bman-portal@30000 {
  203. compatible = "fsl,bman-portal";
  204. reg = <0x30000 0x4000>, <0x100c000 0x1000>;
  205. interrupts = <129 2 0 0>;
  206. };
  207. bman-portal@34000 {
  208. compatible = "fsl,bman-portal";
  209. reg = <0x34000 0x4000>, <0x100d000 0x1000>;
  210. interrupts = <131 2 0 0>;
  211. };
  212. };
  213. &qportals {
  214. #address-cells = <0x1>;
  215. #size-cells = <0x1>;
  216. compatible = "simple-bus";
  217. qportal0: qman-portal@0 {
  218. compatible = "fsl,qman-portal";
  219. reg = <0x0 0x4000>, <0x1000000 0x1000>;
  220. interrupts = <104 0x2 0 0>;
  221. cell-index = <0x0>;
  222. };
  223. qportal1: qman-portal@4000 {
  224. compatible = "fsl,qman-portal";
  225. reg = <0x4000 0x4000>, <0x1001000 0x1000>;
  226. interrupts = <106 0x2 0 0>;
  227. cell-index = <0x1>;
  228. };
  229. qportal2: qman-portal@8000 {
  230. compatible = "fsl,qman-portal";
  231. reg = <0x8000 0x4000>, <0x1002000 0x1000>;
  232. interrupts = <108 0x2 0 0>;
  233. cell-index = <0x2>;
  234. };
  235. qportal3: qman-portal@c000 {
  236. compatible = "fsl,qman-portal";
  237. reg = <0xc000 0x4000>, <0x1003000 0x1000>;
  238. interrupts = <110 0x2 0 0>;
  239. cell-index = <0x3>;
  240. };
  241. qportal4: qman-portal@10000 {
  242. compatible = "fsl,qman-portal";
  243. reg = <0x10000 0x4000>, <0x1004000 0x1000>;
  244. interrupts = <112 0x2 0 0>;
  245. cell-index = <0x4>;
  246. };
  247. qportal5: qman-portal@14000 {
  248. compatible = "fsl,qman-portal";
  249. reg = <0x14000 0x4000>, <0x1005000 0x1000>;
  250. interrupts = <114 0x2 0 0>;
  251. cell-index = <0x5>;
  252. };
  253. qportal6: qman-portal@18000 {
  254. compatible = "fsl,qman-portal";
  255. reg = <0x18000 0x4000>, <0x1006000 0x1000>;
  256. interrupts = <116 0x2 0 0>;
  257. cell-index = <0x6>;
  258. };
  259. qportal7: qman-portal@1c000 {
  260. compatible = "fsl,qman-portal";
  261. reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
  262. interrupts = <118 0x2 0 0>;
  263. cell-index = <0x7>;
  264. };
  265. qportal8: qman-portal@20000 {
  266. compatible = "fsl,qman-portal";
  267. reg = <0x20000 0x4000>, <0x1008000 0x1000>;
  268. interrupts = <120 0x2 0 0>;
  269. cell-index = <0x8>;
  270. };
  271. qportal9: qman-portal@24000 {
  272. compatible = "fsl,qman-portal";
  273. reg = <0x24000 0x4000>, <0x1009000 0x1000>;
  274. interrupts = <122 0x2 0 0>;
  275. cell-index = <0x9>;
  276. };
  277. qportal10: qman-portal@28000 {
  278. compatible = "fsl,qman-portal";
  279. reg = <0x28000 0x4000>, <0x100a000 0x1000>;
  280. interrupts = <124 0x2 0 0>;
  281. cell-index = <0xa>;
  282. };
  283. qportal11: qman-portal@2c000 {
  284. compatible = "fsl,qman-portal";
  285. reg = <0x2c000 0x4000>, <0x100b000 0x1000>;
  286. interrupts = <126 0x2 0 0>;
  287. cell-index = <0xb>;
  288. };
  289. qportal12: qman-portal@30000 {
  290. compatible = "fsl,qman-portal";
  291. reg = <0x30000 0x4000>, <0x100c000 0x1000>;
  292. interrupts = <128 0x2 0 0>;
  293. cell-index = <0xc>;
  294. };
  295. qportal13: qman-portal@34000 {
  296. compatible = "fsl,qman-portal";
  297. reg = <0x34000 0x4000>, <0x100d000 0x1000>;
  298. interrupts = <130 0x2 0 0>;
  299. cell-index = <0xd>;
  300. };
  301. };
  302. &soc {
  303. #address-cells = <1>;
  304. #size-cells = <1>;
  305. device_type = "soc";
  306. compatible = "simple-bus";
  307. soc-sram-error {
  308. compatible = "fsl,soc-sram-error";
  309. interrupts = <16 2 1 2>;
  310. };
  311. corenet-law@0 {
  312. compatible = "fsl,corenet-law";
  313. reg = <0x0 0x1000>;
  314. fsl,num-laws = <32>;
  315. };
  316. ddr1: memory-controller@8000 {
  317. compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
  318. reg = <0x8000 0x1000>;
  319. interrupts = <16 2 1 8>;
  320. };
  321. cpc: l3-cache-controller@10000 {
  322. compatible = "fsl,b4-l3-cache-controller", "cache";
  323. reg = <0x10000 0x1000>;
  324. interrupts = <16 2 1 4>;
  325. };
  326. corenet-cf@18000 {
  327. compatible = "fsl,corenet2-cf", "fsl,corenet-cf";
  328. reg = <0x18000 0x1000>;
  329. interrupts = <16 2 1 0>;
  330. fsl,ccf-num-csdids = <32>;
  331. fsl,ccf-num-snoopids = <32>;
  332. };
  333. iommu@20000 {
  334. compatible = "fsl,pamu-v1.0", "fsl,pamu";
  335. reg = <0x20000 0x4000>;
  336. fsl,portid-mapping = <0x8000>;
  337. #address-cells = <1>;
  338. #size-cells = <1>;
  339. interrupts = <
  340. 24 2 0 0
  341. 16 2 1 1>;
  342. /* PCIe, DMA, SRIO */
  343. pamu0: pamu@0 {
  344. reg = <0 0x1000>;
  345. fsl,primary-cache-geometry = <8 1>;
  346. fsl,secondary-cache-geometry = <32 2>;
  347. };
  348. /* AXI2, Maple */
  349. pamu1: pamu@1000 {
  350. reg = <0x1000 0x1000>;
  351. fsl,primary-cache-geometry = <32 1>;
  352. fsl,secondary-cache-geometry = <32 2>;
  353. };
  354. /* Q/BMan */
  355. pamu2: pamu@2000 {
  356. reg = <0x2000 0x1000>;
  357. fsl,primary-cache-geometry = <32 1>;
  358. fsl,secondary-cache-geometry = <32 2>;
  359. };
  360. /* AXI1, FMAN */
  361. pamu3: pamu@3000 {
  362. reg = <0x3000 0x1000>;
  363. fsl,primary-cache-geometry = <32 1>;
  364. fsl,secondary-cache-geometry = <32 2>;
  365. };
  366. };
  367. /include/ "qoriq-mpic4.3.dtsi"
  368. guts: global-utilities@e0000 {
  369. compatible = "fsl,b4-device-config";
  370. reg = <0xe0000 0xe00>;
  371. fsl,has-rstcr;
  372. fsl,liodn-bits = <12>;
  373. };
  374. /include/ "qoriq-clockgen2.dtsi"
  375. clockgen: global-utilities@e1000 {
  376. compatible = "fsl,b4-clockgen", "fsl,qoriq-clockgen-2.0";
  377. reg = <0xe1000 0x1000>;
  378. mux0: mux0@0 {
  379. #clock-cells = <0>;
  380. reg = <0x0 0x4>;
  381. compatible = "fsl,qoriq-core-mux-2.0";
  382. clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
  383. <&pll1 0>, <&pll1 1>, <&pll1 2>;
  384. clock-names = "pll0", "pll0-div2", "pll0-div4",
  385. "pll1", "pll1-div2", "pll1-div4";
  386. clock-output-names = "cmux0";
  387. };
  388. };
  389. rcpm: global-utilities@e2000 {
  390. compatible = "fsl,b4-rcpm", "fsl,qoriq-rcpm-2.0";
  391. reg = <0xe2000 0x1000>;
  392. };
  393. /include/ "elo3-dma-0.dtsi"
  394. dma@100300 {
  395. fsl,iommu-parent = <&pamu0>;
  396. fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
  397. };
  398. /include/ "elo3-dma-1.dtsi"
  399. dma@101300 {
  400. fsl,iommu-parent = <&pamu0>;
  401. fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
  402. };
  403. /include/ "qonverge-usb2-dr-0.dtsi"
  404. usb0: usb@210000 {
  405. compatible = "fsl-usb2-dr-v2.4", "fsl-usb2-dr";
  406. fsl,iommu-parent = <&pamu1>;
  407. fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
  408. };
  409. /include/ "qoriq-espi-0.dtsi"
  410. spi@110000 {
  411. fsl,espi-num-chipselects = <4>;
  412. };
  413. /include/ "qoriq-esdhc-0.dtsi"
  414. sdhc@114000 {
  415. sdhci,auto-cmd12;
  416. fsl,iommu-parent = <&pamu1>;
  417. fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
  418. };
  419. /include/ "qoriq-i2c-0.dtsi"
  420. /include/ "qoriq-i2c-1.dtsi"
  421. /include/ "qoriq-duart-0.dtsi"
  422. /include/ "qoriq-duart-1.dtsi"
  423. /include/ "qoriq-sec5.3-0.dtsi"
  424. /include/ "qoriq-qman3.dtsi"
  425. qman: qman@318000 {
  426. interrupts = <16 2 1 28>;
  427. };
  428. /include/ "qoriq-bman1.dtsi"
  429. bman: bman@31a000 {
  430. interrupts = <16 2 1 29>;
  431. };
  432. /include/ "qoriq-fman3-0.dtsi"
  433. /include/ "qoriq-fman3-0-1g-0.dtsi"
  434. /include/ "qoriq-fman3-0-1g-1.dtsi"
  435. /include/ "qoriq-fman3-0-1g-2.dtsi"
  436. /include/ "qoriq-fman3-0-1g-3.dtsi"
  437. fman@400000 {
  438. interrupts = <96 2 0 0>, <16 2 1 30>;
  439. muram@0 {
  440. compatible = "fsl,fman-muram";
  441. reg = <0x0 0x80000>;
  442. };
  443. enet0: ethernet@e0000 {
  444. };
  445. enet1: ethernet@e2000 {
  446. };
  447. enet2: ethernet@e4000 {
  448. };
  449. enet3: ethernet@e6000 {
  450. };
  451. mdio@fc000 {
  452. interrupts = <100 1 0 0>;
  453. };
  454. mdio@fd000 {
  455. interrupts = <101 1 0 0>;
  456. };
  457. };
  458. };