via_drm.h 8.2 KB

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  1. /*
  2. * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
  3. * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sub license,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the
  13. * next paragraph) shall be included in all copies or substantial portions
  14. * of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19. * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. */
  24. #ifndef _VIA_DRM_H_
  25. #define _VIA_DRM_H_
  26. #include "drm.h"
  27. #if defined(__cplusplus)
  28. extern "C" {
  29. #endif
  30. /* WARNING: These defines must be the same as what the Xserver uses.
  31. * if you change them, you must change the defines in the Xserver.
  32. */
  33. #ifndef _VIA_DEFINES_
  34. #define _VIA_DEFINES_
  35. #define VIA_NR_SAREA_CLIPRECTS 8
  36. #define VIA_NR_XVMC_PORTS 10
  37. #define VIA_NR_XVMC_LOCKS 5
  38. #define VIA_MAX_CACHELINE_SIZE 64
  39. #define XVMCLOCKPTR(saPriv,lockNo) \
  40. ((volatile struct drm_hw_lock *)(((((unsigned long) (saPriv)->XvMCLockArea) + \
  41. (VIA_MAX_CACHELINE_SIZE - 1)) & \
  42. ~(VIA_MAX_CACHELINE_SIZE - 1)) + \
  43. VIA_MAX_CACHELINE_SIZE*(lockNo)))
  44. /* Each region is a minimum of 64k, and there are at most 64 of them.
  45. */
  46. #define VIA_NR_TEX_REGIONS 64
  47. #define VIA_LOG_MIN_TEX_REGION_SIZE 16
  48. #endif
  49. #define VIA_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */
  50. #define VIA_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */
  51. #define VIA_UPLOAD_CTX 0x4
  52. #define VIA_UPLOAD_BUFFERS 0x8
  53. #define VIA_UPLOAD_TEX0 0x10
  54. #define VIA_UPLOAD_TEX1 0x20
  55. #define VIA_UPLOAD_CLIPRECTS 0x40
  56. #define VIA_UPLOAD_ALL 0xff
  57. /* VIA specific ioctls */
  58. #define DRM_VIA_ALLOCMEM 0x00
  59. #define DRM_VIA_FREEMEM 0x01
  60. #define DRM_VIA_AGP_INIT 0x02
  61. #define DRM_VIA_FB_INIT 0x03
  62. #define DRM_VIA_MAP_INIT 0x04
  63. #define DRM_VIA_DEC_FUTEX 0x05
  64. #define NOT_USED
  65. #define DRM_VIA_DMA_INIT 0x07
  66. #define DRM_VIA_CMDBUFFER 0x08
  67. #define DRM_VIA_FLUSH 0x09
  68. #define DRM_VIA_PCICMD 0x0a
  69. #define DRM_VIA_CMDBUF_SIZE 0x0b
  70. #define NOT_USED
  71. #define DRM_VIA_WAIT_IRQ 0x0d
  72. #define DRM_VIA_DMA_BLIT 0x0e
  73. #define DRM_VIA_BLIT_SYNC 0x0f
  74. #define DRM_IOCTL_VIA_ALLOCMEM DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_ALLOCMEM, drm_via_mem_t)
  75. #define DRM_IOCTL_VIA_FREEMEM DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_FREEMEM, drm_via_mem_t)
  76. #define DRM_IOCTL_VIA_AGP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_AGP_INIT, drm_via_agp_t)
  77. #define DRM_IOCTL_VIA_FB_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_FB_INIT, drm_via_fb_t)
  78. #define DRM_IOCTL_VIA_MAP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_MAP_INIT, drm_via_init_t)
  79. #define DRM_IOCTL_VIA_DEC_FUTEX DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_DEC_FUTEX, drm_via_futex_t)
  80. #define DRM_IOCTL_VIA_DMA_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_DMA_INIT, drm_via_dma_init_t)
  81. #define DRM_IOCTL_VIA_CMDBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_CMDBUFFER, drm_via_cmdbuffer_t)
  82. #define DRM_IOCTL_VIA_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_VIA_FLUSH)
  83. #define DRM_IOCTL_VIA_PCICMD DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_PCICMD, drm_via_cmdbuffer_t)
  84. #define DRM_IOCTL_VIA_CMDBUF_SIZE DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_CMDBUF_SIZE, \
  85. drm_via_cmdbuf_size_t)
  86. #define DRM_IOCTL_VIA_WAIT_IRQ DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_WAIT_IRQ, drm_via_irqwait_t)
  87. #define DRM_IOCTL_VIA_DMA_BLIT DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_DMA_BLIT, drm_via_dmablit_t)
  88. #define DRM_IOCTL_VIA_BLIT_SYNC DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_BLIT_SYNC, drm_via_blitsync_t)
  89. /* Indices into buf.Setup where various bits of state are mirrored per
  90. * context and per buffer. These can be fired at the card as a unit,
  91. * or in a piecewise fashion as required.
  92. */
  93. #define VIA_TEX_SETUP_SIZE 8
  94. /* Flags for clear ioctl
  95. */
  96. #define VIA_FRONT 0x1
  97. #define VIA_BACK 0x2
  98. #define VIA_DEPTH 0x4
  99. #define VIA_STENCIL 0x8
  100. #define VIA_MEM_VIDEO 0 /* matches drm constant */
  101. #define VIA_MEM_AGP 1 /* matches drm constant */
  102. #define VIA_MEM_SYSTEM 2
  103. #define VIA_MEM_MIXED 3
  104. #define VIA_MEM_UNKNOWN 4
  105. typedef struct {
  106. __u32 offset;
  107. __u32 size;
  108. } drm_via_agp_t;
  109. typedef struct {
  110. __u32 offset;
  111. __u32 size;
  112. } drm_via_fb_t;
  113. typedef struct {
  114. __u32 context;
  115. __u32 type;
  116. __u32 size;
  117. unsigned long index;
  118. unsigned long offset;
  119. } drm_via_mem_t;
  120. typedef struct _drm_via_init {
  121. enum {
  122. VIA_INIT_MAP = 0x01,
  123. VIA_CLEANUP_MAP = 0x02
  124. } func;
  125. unsigned long sarea_priv_offset;
  126. unsigned long fb_offset;
  127. unsigned long mmio_offset;
  128. unsigned long agpAddr;
  129. } drm_via_init_t;
  130. typedef struct _drm_via_futex {
  131. enum {
  132. VIA_FUTEX_WAIT = 0x00,
  133. VIA_FUTEX_WAKE = 0X01
  134. } func;
  135. __u32 ms;
  136. __u32 lock;
  137. __u32 val;
  138. } drm_via_futex_t;
  139. typedef struct _drm_via_dma_init {
  140. enum {
  141. VIA_INIT_DMA = 0x01,
  142. VIA_CLEANUP_DMA = 0x02,
  143. VIA_DMA_INITIALIZED = 0x03
  144. } func;
  145. unsigned long offset;
  146. unsigned long size;
  147. unsigned long reg_pause_addr;
  148. } drm_via_dma_init_t;
  149. typedef struct _drm_via_cmdbuffer {
  150. char __user *buf;
  151. unsigned long size;
  152. } drm_via_cmdbuffer_t;
  153. /* Warning: If you change the SAREA structure you must change the Xserver
  154. * structure as well */
  155. typedef struct _drm_via_tex_region {
  156. unsigned char next, prev; /* indices to form a circular LRU */
  157. unsigned char inUse; /* owned by a client, or free? */
  158. int age; /* tracked by clients to update local LRU's */
  159. } drm_via_tex_region_t;
  160. typedef struct _drm_via_sarea {
  161. unsigned int dirty;
  162. unsigned int nbox;
  163. struct drm_clip_rect boxes[VIA_NR_SAREA_CLIPRECTS];
  164. drm_via_tex_region_t texList[VIA_NR_TEX_REGIONS + 1];
  165. int texAge; /* last time texture was uploaded */
  166. int ctxOwner; /* last context to upload state */
  167. int vertexPrim;
  168. /*
  169. * Below is for XvMC.
  170. * We want the lock integers alone on, and aligned to, a cache line.
  171. * Therefore this somewhat strange construct.
  172. */
  173. char XvMCLockArea[VIA_MAX_CACHELINE_SIZE * (VIA_NR_XVMC_LOCKS + 1)];
  174. unsigned int XvMCDisplaying[VIA_NR_XVMC_PORTS];
  175. unsigned int XvMCSubPicOn[VIA_NR_XVMC_PORTS];
  176. unsigned int XvMCCtxNoGrabbed; /* Last context to hold decoder */
  177. /* Used by the 3d driver only at this point, for pageflipping:
  178. */
  179. unsigned int pfCurrentOffset;
  180. } drm_via_sarea_t;
  181. typedef struct _drm_via_cmdbuf_size {
  182. enum {
  183. VIA_CMDBUF_SPACE = 0x01,
  184. VIA_CMDBUF_LAG = 0x02
  185. } func;
  186. int wait;
  187. __u32 size;
  188. } drm_via_cmdbuf_size_t;
  189. typedef enum {
  190. VIA_IRQ_ABSOLUTE = 0x0,
  191. VIA_IRQ_RELATIVE = 0x1,
  192. VIA_IRQ_SIGNAL = 0x10000000,
  193. VIA_IRQ_FORCE_SEQUENCE = 0x20000000
  194. } via_irq_seq_type_t;
  195. #define VIA_IRQ_FLAGS_MASK 0xF0000000
  196. enum drm_via_irqs {
  197. drm_via_irq_hqv0 = 0,
  198. drm_via_irq_hqv1,
  199. drm_via_irq_dma0_dd,
  200. drm_via_irq_dma0_td,
  201. drm_via_irq_dma1_dd,
  202. drm_via_irq_dma1_td,
  203. drm_via_irq_num
  204. };
  205. struct drm_via_wait_irq_request {
  206. unsigned irq;
  207. via_irq_seq_type_t type;
  208. __u32 sequence;
  209. __u32 signal;
  210. };
  211. typedef union drm_via_irqwait {
  212. struct drm_via_wait_irq_request request;
  213. struct drm_wait_vblank_reply reply;
  214. } drm_via_irqwait_t;
  215. typedef struct drm_via_blitsync {
  216. __u32 sync_handle;
  217. unsigned engine;
  218. } drm_via_blitsync_t;
  219. /* - * Below,"flags" is currently unused but will be used for possible future
  220. * extensions like kernel space bounce buffers for bad alignments and
  221. * blit engine busy-wait polling for better latency in the absence of
  222. * interrupts.
  223. */
  224. typedef struct drm_via_dmablit {
  225. __u32 num_lines;
  226. __u32 line_length;
  227. __u32 fb_addr;
  228. __u32 fb_stride;
  229. unsigned char *mem_addr;
  230. __u32 mem_stride;
  231. __u32 flags;
  232. int to_fb;
  233. drm_via_blitsync_t sync;
  234. } drm_via_dmablit_t;
  235. #if defined(__cplusplus)
  236. }
  237. #endif
  238. #endif /* _VIA_DRM_H_ */