physdev.h 8.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322
  1. /*
  2. * Permission is hereby granted, free of charge, to any person obtaining a copy
  3. * of this software and associated documentation files (the "Software"), to
  4. * deal in the Software without restriction, including without limitation the
  5. * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
  6. * sell copies of the Software, and to permit persons to whom the Software is
  7. * furnished to do so, subject to the following conditions:
  8. *
  9. * The above copyright notice and this permission notice shall be included in
  10. * all copies or substantial portions of the Software.
  11. *
  12. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  13. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  14. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  15. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  16. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  17. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  18. * DEALINGS IN THE SOFTWARE.
  19. */
  20. #ifndef __XEN_PUBLIC_PHYSDEV_H__
  21. #define __XEN_PUBLIC_PHYSDEV_H__
  22. /*
  23. * Prototype for this hypercall is:
  24. * int physdev_op(int cmd, void *args)
  25. * @cmd == PHYSDEVOP_??? (physdev operation).
  26. * @args == Operation-specific extra arguments (NULL if none).
  27. */
  28. /*
  29. * Notify end-of-interrupt (EOI) for the specified IRQ.
  30. * @arg == pointer to physdev_eoi structure.
  31. */
  32. #define PHYSDEVOP_eoi 12
  33. struct physdev_eoi {
  34. /* IN */
  35. uint32_t irq;
  36. };
  37. /*
  38. * Register a shared page for the hypervisor to indicate whether the guest
  39. * must issue PHYSDEVOP_eoi. The semantics of PHYSDEVOP_eoi change slightly
  40. * once the guest used this function in that the associated event channel
  41. * will automatically get unmasked. The page registered is used as a bit
  42. * array indexed by Xen's PIRQ value.
  43. */
  44. #define PHYSDEVOP_pirq_eoi_gmfn_v1 17
  45. /*
  46. * Register a shared page for the hypervisor to indicate whether the
  47. * guest must issue PHYSDEVOP_eoi. This hypercall is very similar to
  48. * PHYSDEVOP_pirq_eoi_gmfn_v1 but it doesn't change the semantics of
  49. * PHYSDEVOP_eoi. The page registered is used as a bit array indexed by
  50. * Xen's PIRQ value.
  51. */
  52. #define PHYSDEVOP_pirq_eoi_gmfn_v2 28
  53. struct physdev_pirq_eoi_gmfn {
  54. /* IN */
  55. xen_ulong_t gmfn;
  56. };
  57. /*
  58. * Query the status of an IRQ line.
  59. * @arg == pointer to physdev_irq_status_query structure.
  60. */
  61. #define PHYSDEVOP_irq_status_query 5
  62. struct physdev_irq_status_query {
  63. /* IN */
  64. uint32_t irq;
  65. /* OUT */
  66. uint32_t flags; /* XENIRQSTAT_* */
  67. };
  68. /* Need to call PHYSDEVOP_eoi when the IRQ has been serviced? */
  69. #define _XENIRQSTAT_needs_eoi (0)
  70. #define XENIRQSTAT_needs_eoi (1U<<_XENIRQSTAT_needs_eoi)
  71. /* IRQ shared by multiple guests? */
  72. #define _XENIRQSTAT_shared (1)
  73. #define XENIRQSTAT_shared (1U<<_XENIRQSTAT_shared)
  74. /*
  75. * Set the current VCPU's I/O privilege level.
  76. * @arg == pointer to physdev_set_iopl structure.
  77. */
  78. #define PHYSDEVOP_set_iopl 6
  79. struct physdev_set_iopl {
  80. /* IN */
  81. uint32_t iopl;
  82. };
  83. /*
  84. * Set the current VCPU's I/O-port permissions bitmap.
  85. * @arg == pointer to physdev_set_iobitmap structure.
  86. */
  87. #define PHYSDEVOP_set_iobitmap 7
  88. struct physdev_set_iobitmap {
  89. /* IN */
  90. uint8_t * bitmap;
  91. uint32_t nr_ports;
  92. };
  93. /*
  94. * Read or write an IO-APIC register.
  95. * @arg == pointer to physdev_apic structure.
  96. */
  97. #define PHYSDEVOP_apic_read 8
  98. #define PHYSDEVOP_apic_write 9
  99. struct physdev_apic {
  100. /* IN */
  101. unsigned long apic_physbase;
  102. uint32_t reg;
  103. /* IN or OUT */
  104. uint32_t value;
  105. };
  106. /*
  107. * Allocate or free a physical upcall vector for the specified IRQ line.
  108. * @arg == pointer to physdev_irq structure.
  109. */
  110. #define PHYSDEVOP_alloc_irq_vector 10
  111. #define PHYSDEVOP_free_irq_vector 11
  112. struct physdev_irq {
  113. /* IN */
  114. uint32_t irq;
  115. /* IN or OUT */
  116. uint32_t vector;
  117. };
  118. #define MAP_PIRQ_TYPE_MSI 0x0
  119. #define MAP_PIRQ_TYPE_GSI 0x1
  120. #define MAP_PIRQ_TYPE_UNKNOWN 0x2
  121. #define MAP_PIRQ_TYPE_MSI_SEG 0x3
  122. #define MAP_PIRQ_TYPE_MULTI_MSI 0x4
  123. #define PHYSDEVOP_map_pirq 13
  124. struct physdev_map_pirq {
  125. domid_t domid;
  126. /* IN */
  127. int type;
  128. /* IN */
  129. int index;
  130. /* IN or OUT */
  131. int pirq;
  132. /* IN - high 16 bits hold segment for ..._MSI_SEG and ..._MULTI_MSI */
  133. int bus;
  134. /* IN */
  135. int devfn;
  136. /* IN
  137. * - For MSI-X contains entry number.
  138. * - For MSI with ..._MULTI_MSI contains number of vectors.
  139. * OUT (..._MULTI_MSI only)
  140. * - Number of vectors allocated.
  141. */
  142. int entry_nr;
  143. /* IN */
  144. uint64_t table_base;
  145. };
  146. #define PHYSDEVOP_unmap_pirq 14
  147. struct physdev_unmap_pirq {
  148. domid_t domid;
  149. /* IN */
  150. int pirq;
  151. };
  152. #define PHYSDEVOP_manage_pci_add 15
  153. #define PHYSDEVOP_manage_pci_remove 16
  154. struct physdev_manage_pci {
  155. /* IN */
  156. uint8_t bus;
  157. uint8_t devfn;
  158. };
  159. #define PHYSDEVOP_restore_msi 19
  160. struct physdev_restore_msi {
  161. /* IN */
  162. uint8_t bus;
  163. uint8_t devfn;
  164. };
  165. #define PHYSDEVOP_manage_pci_add_ext 20
  166. struct physdev_manage_pci_ext {
  167. /* IN */
  168. uint8_t bus;
  169. uint8_t devfn;
  170. unsigned is_extfn;
  171. unsigned is_virtfn;
  172. struct {
  173. uint8_t bus;
  174. uint8_t devfn;
  175. } physfn;
  176. };
  177. /*
  178. * Argument to physdev_op_compat() hypercall. Superceded by new physdev_op()
  179. * hypercall since 0x00030202.
  180. */
  181. struct physdev_op {
  182. uint32_t cmd;
  183. union {
  184. struct physdev_irq_status_query irq_status_query;
  185. struct physdev_set_iopl set_iopl;
  186. struct physdev_set_iobitmap set_iobitmap;
  187. struct physdev_apic apic_op;
  188. struct physdev_irq irq_op;
  189. } u;
  190. };
  191. #define PHYSDEVOP_setup_gsi 21
  192. struct physdev_setup_gsi {
  193. int gsi;
  194. /* IN */
  195. uint8_t triggering;
  196. /* IN */
  197. uint8_t polarity;
  198. /* IN */
  199. };
  200. #define PHYSDEVOP_get_nr_pirqs 22
  201. struct physdev_nr_pirqs {
  202. /* OUT */
  203. uint32_t nr_pirqs;
  204. };
  205. /* type is MAP_PIRQ_TYPE_GSI or MAP_PIRQ_TYPE_MSI
  206. * the hypercall returns a free pirq */
  207. #define PHYSDEVOP_get_free_pirq 23
  208. struct physdev_get_free_pirq {
  209. /* IN */
  210. int type;
  211. /* OUT */
  212. uint32_t pirq;
  213. };
  214. #define XEN_PCI_DEV_EXTFN 0x1
  215. #define XEN_PCI_DEV_VIRTFN 0x2
  216. #define XEN_PCI_DEV_PXM 0x4
  217. #define XEN_PCI_MMCFG_RESERVED 0x1
  218. #define PHYSDEVOP_pci_mmcfg_reserved 24
  219. struct physdev_pci_mmcfg_reserved {
  220. uint64_t address;
  221. uint16_t segment;
  222. uint8_t start_bus;
  223. uint8_t end_bus;
  224. uint32_t flags;
  225. };
  226. #define PHYSDEVOP_pci_device_add 25
  227. struct physdev_pci_device_add {
  228. /* IN */
  229. uint16_t seg;
  230. uint8_t bus;
  231. uint8_t devfn;
  232. uint32_t flags;
  233. struct {
  234. uint8_t bus;
  235. uint8_t devfn;
  236. } physfn;
  237. #if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
  238. uint32_t optarr[];
  239. #elif defined(__GNUC__)
  240. uint32_t optarr[0];
  241. #endif
  242. };
  243. #define PHYSDEVOP_pci_device_remove 26
  244. #define PHYSDEVOP_restore_msi_ext 27
  245. /*
  246. * Dom0 should use these two to announce MMIO resources assigned to
  247. * MSI-X capable devices won't (prepare) or may (release) change.
  248. */
  249. #define PHYSDEVOP_prepare_msix 30
  250. #define PHYSDEVOP_release_msix 31
  251. struct physdev_pci_device {
  252. /* IN */
  253. uint16_t seg;
  254. uint8_t bus;
  255. uint8_t devfn;
  256. };
  257. #define PHYSDEVOP_DBGP_RESET_PREPARE 1
  258. #define PHYSDEVOP_DBGP_RESET_DONE 2
  259. #define PHYSDEVOP_DBGP_BUS_UNKNOWN 0
  260. #define PHYSDEVOP_DBGP_BUS_PCI 1
  261. #define PHYSDEVOP_dbgp_op 29
  262. struct physdev_dbgp_op {
  263. /* IN */
  264. uint8_t op;
  265. uint8_t bus;
  266. union {
  267. struct physdev_pci_device pci;
  268. } u;
  269. };
  270. /*
  271. * Notify that some PIRQ-bound event channels have been unmasked.
  272. * ** This command is obsolete since interface version 0x00030202 and is **
  273. * ** unsupported by newer versions of Xen. **
  274. */
  275. #define PHYSDEVOP_IRQ_UNMASK_NOTIFY 4
  276. /*
  277. * These all-capitals physdev operation names are superceded by the new names
  278. * (defined above) since interface version 0x00030202.
  279. */
  280. #define PHYSDEVOP_IRQ_STATUS_QUERY PHYSDEVOP_irq_status_query
  281. #define PHYSDEVOP_SET_IOPL PHYSDEVOP_set_iopl
  282. #define PHYSDEVOP_SET_IOBITMAP PHYSDEVOP_set_iobitmap
  283. #define PHYSDEVOP_APIC_READ PHYSDEVOP_apic_read
  284. #define PHYSDEVOP_APIC_WRITE PHYSDEVOP_apic_write
  285. #define PHYSDEVOP_ASSIGN_VECTOR PHYSDEVOP_alloc_irq_vector
  286. #define PHYSDEVOP_FREE_VECTOR PHYSDEVOP_free_irq_vector
  287. #define PHYSDEVOP_IRQ_NEEDS_UNMASK_NOTIFY XENIRQSTAT_needs_eoi
  288. #define PHYSDEVOP_IRQ_SHARED XENIRQSTAT_shared
  289. #endif /* __XEN_PUBLIC_PHYSDEV_H__ */