smartreflex.c 28 KB

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  1. /*
  2. * OMAP SmartReflex Voltage Control
  3. *
  4. * Author: Thara Gopinath <thara@ti.com>
  5. *
  6. * Copyright (C) 2012 Texas Instruments, Inc.
  7. * Thara Gopinath <thara@ti.com>
  8. *
  9. * Copyright (C) 2008 Nokia Corporation
  10. * Kalle Jokiniemi
  11. *
  12. * Copyright (C) 2007 Texas Instruments, Inc.
  13. * Lesly A M <x0080970@ti.com>
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License version 2 as
  17. * published by the Free Software Foundation.
  18. */
  19. #include <linux/module.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/clk.h>
  22. #include <linux/io.h>
  23. #include <linux/debugfs.h>
  24. #include <linux/delay.h>
  25. #include <linux/slab.h>
  26. #include <linux/pm_runtime.h>
  27. #include <linux/power/smartreflex.h>
  28. #define DRIVER_NAME "smartreflex"
  29. #define SMARTREFLEX_NAME_LEN 32
  30. #define NVALUE_NAME_LEN 40
  31. #define SR_DISABLE_TIMEOUT 200
  32. /* sr_list contains all the instances of smartreflex module */
  33. static LIST_HEAD(sr_list);
  34. static struct omap_sr_class_data *sr_class;
  35. static struct omap_sr_pmic_data *sr_pmic_data;
  36. static struct dentry *sr_dbg_dir;
  37. static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
  38. {
  39. __raw_writel(value, (sr->base + offset));
  40. }
  41. static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
  42. u32 value)
  43. {
  44. u32 reg_val;
  45. /*
  46. * Smartreflex error config register is special as it contains
  47. * certain status bits which if written a 1 into means a clear
  48. * of those bits. So in order to make sure no accidental write of
  49. * 1 happens to those status bits, do a clear of them in the read
  50. * value. This mean this API doesn't rewrite values in these bits
  51. * if they are currently set, but does allow the caller to write
  52. * those bits.
  53. */
  54. if (sr->ip_type == SR_TYPE_V1 && offset == ERRCONFIG_V1)
  55. mask |= ERRCONFIG_STATUS_V1_MASK;
  56. else if (sr->ip_type == SR_TYPE_V2 && offset == ERRCONFIG_V2)
  57. mask |= ERRCONFIG_VPBOUNDINTST_V2;
  58. reg_val = __raw_readl(sr->base + offset);
  59. reg_val &= ~mask;
  60. value &= mask;
  61. reg_val |= value;
  62. __raw_writel(reg_val, (sr->base + offset));
  63. }
  64. static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset)
  65. {
  66. return __raw_readl(sr->base + offset);
  67. }
  68. static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm)
  69. {
  70. struct omap_sr *sr_info;
  71. if (!voltdm) {
  72. pr_err("%s: Null voltage domain passed!\n", __func__);
  73. return ERR_PTR(-EINVAL);
  74. }
  75. list_for_each_entry(sr_info, &sr_list, node) {
  76. if (voltdm == sr_info->voltdm)
  77. return sr_info;
  78. }
  79. return ERR_PTR(-ENODATA);
  80. }
  81. static irqreturn_t sr_interrupt(int irq, void *data)
  82. {
  83. struct omap_sr *sr_info = data;
  84. u32 status = 0;
  85. switch (sr_info->ip_type) {
  86. case SR_TYPE_V1:
  87. /* Read the status bits */
  88. status = sr_read_reg(sr_info, ERRCONFIG_V1);
  89. /* Clear them by writing back */
  90. sr_write_reg(sr_info, ERRCONFIG_V1, status);
  91. break;
  92. case SR_TYPE_V2:
  93. /* Read the status bits */
  94. status = sr_read_reg(sr_info, IRQSTATUS);
  95. /* Clear them by writing back */
  96. sr_write_reg(sr_info, IRQSTATUS, status);
  97. break;
  98. default:
  99. dev_err(&sr_info->pdev->dev, "UNKNOWN IP type %d\n",
  100. sr_info->ip_type);
  101. return IRQ_NONE;
  102. }
  103. if (sr_class->notify)
  104. sr_class->notify(sr_info, status);
  105. return IRQ_HANDLED;
  106. }
  107. static void sr_set_clk_length(struct omap_sr *sr)
  108. {
  109. struct clk *fck;
  110. u32 fclk_speed;
  111. fck = clk_get(&sr->pdev->dev, "fck");
  112. if (IS_ERR(fck)) {
  113. dev_err(&sr->pdev->dev, "%s: unable to get fck for device %s\n",
  114. __func__, dev_name(&sr->pdev->dev));
  115. return;
  116. }
  117. fclk_speed = clk_get_rate(fck);
  118. clk_put(fck);
  119. switch (fclk_speed) {
  120. case 12000000:
  121. sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK;
  122. break;
  123. case 13000000:
  124. sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK;
  125. break;
  126. case 19200000:
  127. sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK;
  128. break;
  129. case 26000000:
  130. sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK;
  131. break;
  132. case 38400000:
  133. sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK;
  134. break;
  135. default:
  136. dev_err(&sr->pdev->dev, "%s: Invalid fclk rate: %d\n",
  137. __func__, fclk_speed);
  138. break;
  139. }
  140. }
  141. static void sr_start_vddautocomp(struct omap_sr *sr)
  142. {
  143. if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
  144. dev_warn(&sr->pdev->dev,
  145. "%s: smartreflex class driver not registered\n",
  146. __func__);
  147. return;
  148. }
  149. if (!sr_class->enable(sr))
  150. sr->autocomp_active = true;
  151. }
  152. static void sr_stop_vddautocomp(struct omap_sr *sr)
  153. {
  154. if (!sr_class || !(sr_class->disable)) {
  155. dev_warn(&sr->pdev->dev,
  156. "%s: smartreflex class driver not registered\n",
  157. __func__);
  158. return;
  159. }
  160. if (sr->autocomp_active) {
  161. sr_class->disable(sr, 1);
  162. sr->autocomp_active = false;
  163. }
  164. }
  165. /*
  166. * This function handles the intializations which have to be done
  167. * only when both sr device and class driver regiter has
  168. * completed. This will be attempted to be called from both sr class
  169. * driver register and sr device intializtion API's. Only one call
  170. * will ultimately succeed.
  171. *
  172. * Currently this function registers interrupt handler for a particular SR
  173. * if smartreflex class driver is already registered and has
  174. * requested for interrupts and the SR interrupt line in present.
  175. */
  176. static int sr_late_init(struct omap_sr *sr_info)
  177. {
  178. struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data;
  179. int ret = 0;
  180. if (sr_class->notify && sr_class->notify_flags && sr_info->irq) {
  181. ret = devm_request_irq(&sr_info->pdev->dev, sr_info->irq,
  182. sr_interrupt, 0, sr_info->name, sr_info);
  183. if (ret)
  184. goto error;
  185. disable_irq(sr_info->irq);
  186. }
  187. if (pdata && pdata->enable_on_init)
  188. sr_start_vddautocomp(sr_info);
  189. return ret;
  190. error:
  191. list_del(&sr_info->node);
  192. dev_err(&sr_info->pdev->dev, "%s: ERROR in registering interrupt handler. Smartreflex will not function as desired\n",
  193. __func__);
  194. return ret;
  195. }
  196. static void sr_v1_disable(struct omap_sr *sr)
  197. {
  198. int timeout = 0;
  199. int errconf_val = ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST |
  200. ERRCONFIG_MCUBOUNDINTST;
  201. /* Enable MCUDisableAcknowledge interrupt */
  202. sr_modify_reg(sr, ERRCONFIG_V1,
  203. ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN);
  204. /* SRCONFIG - disable SR */
  205. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
  206. /* Disable all other SR interrupts and clear the status as needed */
  207. if (sr_read_reg(sr, ERRCONFIG_V1) & ERRCONFIG_VPBOUNDINTST_V1)
  208. errconf_val |= ERRCONFIG_VPBOUNDINTST_V1;
  209. sr_modify_reg(sr, ERRCONFIG_V1,
  210. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
  211. ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1),
  212. errconf_val);
  213. /*
  214. * Wait for SR to be disabled.
  215. * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us.
  216. */
  217. sr_test_cond_timeout((sr_read_reg(sr, ERRCONFIG_V1) &
  218. ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT,
  219. timeout);
  220. if (timeout >= SR_DISABLE_TIMEOUT)
  221. dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
  222. __func__);
  223. /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
  224. sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN,
  225. ERRCONFIG_MCUDISACKINTST);
  226. }
  227. static void sr_v2_disable(struct omap_sr *sr)
  228. {
  229. int timeout = 0;
  230. /* Enable MCUDisableAcknowledge interrupt */
  231. sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT);
  232. /* SRCONFIG - disable SR */
  233. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
  234. /*
  235. * Disable all other SR interrupts and clear the status
  236. * write to status register ONLY on need basis - only if status
  237. * is set.
  238. */
  239. if (sr_read_reg(sr, ERRCONFIG_V2) & ERRCONFIG_VPBOUNDINTST_V2)
  240. sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
  241. ERRCONFIG_VPBOUNDINTST_V2);
  242. else
  243. sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
  244. 0x0);
  245. sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT |
  246. IRQENABLE_MCUVALIDINT |
  247. IRQENABLE_MCUBOUNDSINT));
  248. sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT |
  249. IRQSTATUS_MCVALIDINT |
  250. IRQSTATUS_MCBOUNDSINT));
  251. /*
  252. * Wait for SR to be disabled.
  253. * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us.
  254. */
  255. sr_test_cond_timeout((sr_read_reg(sr, IRQSTATUS) &
  256. IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT,
  257. timeout);
  258. if (timeout >= SR_DISABLE_TIMEOUT)
  259. dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
  260. __func__);
  261. /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
  262. sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT);
  263. sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT);
  264. }
  265. static struct omap_sr_nvalue_table *sr_retrieve_nvalue_row(
  266. struct omap_sr *sr, u32 efuse_offs)
  267. {
  268. int i;
  269. if (!sr->nvalue_table) {
  270. dev_warn(&sr->pdev->dev, "%s: Missing ntarget value table\n",
  271. __func__);
  272. return NULL;
  273. }
  274. for (i = 0; i < sr->nvalue_count; i++) {
  275. if (sr->nvalue_table[i].efuse_offs == efuse_offs)
  276. return &sr->nvalue_table[i];
  277. }
  278. return NULL;
  279. }
  280. /* Public Functions */
  281. /**
  282. * sr_configure_errgen() - Configures the SmartReflex to perform AVS using the
  283. * error generator module.
  284. * @sr: SR module to be configured.
  285. *
  286. * This API is to be called from the smartreflex class driver to
  287. * configure the error generator module inside the smartreflex module.
  288. * SR settings if using the ERROR module inside Smartreflex.
  289. * SR CLASS 3 by default uses only the ERROR module where as
  290. * SR CLASS 2 can choose between ERROR module and MINMAXAVG
  291. * module. Returns 0 on success and error value in case of failure.
  292. */
  293. int sr_configure_errgen(struct omap_sr *sr)
  294. {
  295. u32 sr_config, sr_errconfig, errconfig_offs;
  296. u32 vpboundint_en, vpboundint_st;
  297. u32 senp_en = 0, senn_en = 0;
  298. u8 senp_shift, senn_shift;
  299. if (!sr) {
  300. pr_warn("%s: NULL omap_sr from %pF\n",
  301. __func__, (void *)_RET_IP_);
  302. return -EINVAL;
  303. }
  304. if (!sr->clk_length)
  305. sr_set_clk_length(sr);
  306. senp_en = sr->senp_mod;
  307. senn_en = sr->senn_mod;
  308. sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
  309. SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN;
  310. switch (sr->ip_type) {
  311. case SR_TYPE_V1:
  312. sr_config |= SRCONFIG_DELAYCTRL;
  313. senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
  314. senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
  315. errconfig_offs = ERRCONFIG_V1;
  316. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
  317. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
  318. break;
  319. case SR_TYPE_V2:
  320. senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
  321. senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
  322. errconfig_offs = ERRCONFIG_V2;
  323. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
  324. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
  325. break;
  326. default:
  327. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex module without specifying the ip\n",
  328. __func__);
  329. return -EINVAL;
  330. }
  331. sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
  332. sr_write_reg(sr, SRCONFIG, sr_config);
  333. sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) |
  334. (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) |
  335. (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT);
  336. sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK |
  337. SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK),
  338. sr_errconfig);
  339. /* Enabling the interrupts if the ERROR module is used */
  340. sr_modify_reg(sr, errconfig_offs, (vpboundint_en | vpboundint_st),
  341. vpboundint_en);
  342. return 0;
  343. }
  344. /**
  345. * sr_disable_errgen() - Disables SmartReflex AVS module's errgen component
  346. * @sr: SR module to be configured.
  347. *
  348. * This API is to be called from the smartreflex class driver to
  349. * disable the error generator module inside the smartreflex module.
  350. *
  351. * Returns 0 on success and error value in case of failure.
  352. */
  353. int sr_disable_errgen(struct omap_sr *sr)
  354. {
  355. u32 errconfig_offs;
  356. u32 vpboundint_en, vpboundint_st;
  357. if (!sr) {
  358. pr_warn("%s: NULL omap_sr from %pF\n",
  359. __func__, (void *)_RET_IP_);
  360. return -EINVAL;
  361. }
  362. switch (sr->ip_type) {
  363. case SR_TYPE_V1:
  364. errconfig_offs = ERRCONFIG_V1;
  365. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
  366. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
  367. break;
  368. case SR_TYPE_V2:
  369. errconfig_offs = ERRCONFIG_V2;
  370. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
  371. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
  372. break;
  373. default:
  374. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex module without specifying the ip\n",
  375. __func__);
  376. return -EINVAL;
  377. }
  378. /* Disable the Sensor and errorgen */
  379. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN, 0);
  380. /*
  381. * Disable the interrupts of ERROR module
  382. * NOTE: modify is a read, modify,write - an implicit OCP barrier
  383. * which is required is present here - sequencing is critical
  384. * at this point (after errgen is disabled, vpboundint disable)
  385. */
  386. sr_modify_reg(sr, errconfig_offs, vpboundint_en | vpboundint_st, 0);
  387. return 0;
  388. }
  389. /**
  390. * sr_configure_minmax() - Configures the SmartReflex to perform AVS using the
  391. * minmaxavg module.
  392. * @sr: SR module to be configured.
  393. *
  394. * This API is to be called from the smartreflex class driver to
  395. * configure the minmaxavg module inside the smartreflex module.
  396. * SR settings if using the ERROR module inside Smartreflex.
  397. * SR CLASS 3 by default uses only the ERROR module where as
  398. * SR CLASS 2 can choose between ERROR module and MINMAXAVG
  399. * module. Returns 0 on success and error value in case of failure.
  400. */
  401. int sr_configure_minmax(struct omap_sr *sr)
  402. {
  403. u32 sr_config, sr_avgwt;
  404. u32 senp_en = 0, senn_en = 0;
  405. u8 senp_shift, senn_shift;
  406. if (!sr) {
  407. pr_warn("%s: NULL omap_sr from %pF\n",
  408. __func__, (void *)_RET_IP_);
  409. return -EINVAL;
  410. }
  411. if (!sr->clk_length)
  412. sr_set_clk_length(sr);
  413. senp_en = sr->senp_mod;
  414. senn_en = sr->senn_mod;
  415. sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
  416. SRCONFIG_SENENABLE |
  417. (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT);
  418. switch (sr->ip_type) {
  419. case SR_TYPE_V1:
  420. sr_config |= SRCONFIG_DELAYCTRL;
  421. senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
  422. senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
  423. break;
  424. case SR_TYPE_V2:
  425. senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
  426. senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
  427. break;
  428. default:
  429. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex module without specifying the ip\n",
  430. __func__);
  431. return -EINVAL;
  432. }
  433. sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
  434. sr_write_reg(sr, SRCONFIG, sr_config);
  435. sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) |
  436. (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT);
  437. sr_write_reg(sr, AVGWEIGHT, sr_avgwt);
  438. /*
  439. * Enabling the interrupts if MINMAXAVG module is used.
  440. * TODO: check if all the interrupts are mandatory
  441. */
  442. switch (sr->ip_type) {
  443. case SR_TYPE_V1:
  444. sr_modify_reg(sr, ERRCONFIG_V1,
  445. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
  446. ERRCONFIG_MCUBOUNDINTEN),
  447. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST |
  448. ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST |
  449. ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST));
  450. break;
  451. case SR_TYPE_V2:
  452. sr_write_reg(sr, IRQSTATUS,
  453. IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT |
  454. IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT);
  455. sr_write_reg(sr, IRQENABLE_SET,
  456. IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT |
  457. IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT);
  458. break;
  459. default:
  460. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex module without specifying the ip\n",
  461. __func__);
  462. return -EINVAL;
  463. }
  464. return 0;
  465. }
  466. /**
  467. * sr_enable() - Enables the smartreflex module.
  468. * @sr: pointer to which the SR module to be configured belongs to.
  469. * @volt: The voltage at which the Voltage domain associated with
  470. * the smartreflex module is operating at.
  471. * This is required only to program the correct Ntarget value.
  472. *
  473. * This API is to be called from the smartreflex class driver to
  474. * enable a smartreflex module. Returns 0 on success. Returns error
  475. * value if the voltage passed is wrong or if ntarget value is wrong.
  476. */
  477. int sr_enable(struct omap_sr *sr, unsigned long volt)
  478. {
  479. struct omap_volt_data *volt_data;
  480. struct omap_sr_nvalue_table *nvalue_row;
  481. int ret;
  482. if (!sr) {
  483. pr_warn("%s: NULL omap_sr from %pF\n",
  484. __func__, (void *)_RET_IP_);
  485. return -EINVAL;
  486. }
  487. volt_data = omap_voltage_get_voltdata(sr->voltdm, volt);
  488. if (IS_ERR(volt_data)) {
  489. dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table for nominal voltage %ld\n",
  490. __func__, volt);
  491. return PTR_ERR(volt_data);
  492. }
  493. nvalue_row = sr_retrieve_nvalue_row(sr, volt_data->sr_efuse_offs);
  494. if (!nvalue_row) {
  495. dev_warn(&sr->pdev->dev, "%s: failure getting SR data for this voltage %ld\n",
  496. __func__, volt);
  497. return -ENODATA;
  498. }
  499. /* errminlimit is opp dependent and hence linked to voltage */
  500. sr->err_minlimit = nvalue_row->errminlimit;
  501. pm_runtime_get_sync(&sr->pdev->dev);
  502. /* Check if SR is already enabled. If yes do nothing */
  503. if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE)
  504. return 0;
  505. /* Configure SR */
  506. ret = sr_class->configure(sr);
  507. if (ret)
  508. return ret;
  509. sr_write_reg(sr, NVALUERECIPROCAL, nvalue_row->nvalue);
  510. /* SRCONFIG - enable SR */
  511. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE);
  512. return 0;
  513. }
  514. /**
  515. * sr_disable() - Disables the smartreflex module.
  516. * @sr: pointer to which the SR module to be configured belongs to.
  517. *
  518. * This API is to be called from the smartreflex class driver to
  519. * disable a smartreflex module.
  520. */
  521. void sr_disable(struct omap_sr *sr)
  522. {
  523. if (!sr) {
  524. pr_warn("%s: NULL omap_sr from %pF\n",
  525. __func__, (void *)_RET_IP_);
  526. return;
  527. }
  528. /* Check if SR clocks are already disabled. If yes do nothing */
  529. if (pm_runtime_suspended(&sr->pdev->dev))
  530. return;
  531. /*
  532. * Disable SR if only it is indeed enabled. Else just
  533. * disable the clocks.
  534. */
  535. if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) {
  536. switch (sr->ip_type) {
  537. case SR_TYPE_V1:
  538. sr_v1_disable(sr);
  539. break;
  540. case SR_TYPE_V2:
  541. sr_v2_disable(sr);
  542. break;
  543. default:
  544. dev_err(&sr->pdev->dev, "UNKNOWN IP type %d\n",
  545. sr->ip_type);
  546. }
  547. }
  548. pm_runtime_put_sync_suspend(&sr->pdev->dev);
  549. }
  550. /**
  551. * sr_register_class() - API to register a smartreflex class parameters.
  552. * @class_data: The structure containing various sr class specific data.
  553. *
  554. * This API is to be called by the smartreflex class driver to register itself
  555. * with the smartreflex driver during init. Returns 0 on success else the
  556. * error value.
  557. */
  558. int sr_register_class(struct omap_sr_class_data *class_data)
  559. {
  560. struct omap_sr *sr_info;
  561. if (!class_data) {
  562. pr_warn("%s:, Smartreflex class data passed is NULL\n",
  563. __func__);
  564. return -EINVAL;
  565. }
  566. if (sr_class) {
  567. pr_warn("%s: Smartreflex class driver already registered\n",
  568. __func__);
  569. return -EBUSY;
  570. }
  571. sr_class = class_data;
  572. /*
  573. * Call into late init to do intializations that require
  574. * both sr driver and sr class driver to be initiallized.
  575. */
  576. list_for_each_entry(sr_info, &sr_list, node)
  577. sr_late_init(sr_info);
  578. return 0;
  579. }
  580. /**
  581. * omap_sr_enable() - API to enable SR clocks and to call into the
  582. * registered smartreflex class enable API.
  583. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  584. *
  585. * This API is to be called from the kernel in order to enable
  586. * a particular smartreflex module. This API will do the initial
  587. * configurations to turn on the smartreflex module and in turn call
  588. * into the registered smartreflex class enable API.
  589. */
  590. void omap_sr_enable(struct voltagedomain *voltdm)
  591. {
  592. struct omap_sr *sr = _sr_lookup(voltdm);
  593. if (IS_ERR(sr)) {
  594. pr_warn("%s: omap_sr struct for voltdm not found\n", __func__);
  595. return;
  596. }
  597. if (!sr->autocomp_active)
  598. return;
  599. if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
  600. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not registered\n",
  601. __func__);
  602. return;
  603. }
  604. sr_class->enable(sr);
  605. }
  606. /**
  607. * omap_sr_disable() - API to disable SR without resetting the voltage
  608. * processor voltage
  609. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  610. *
  611. * This API is to be called from the kernel in order to disable
  612. * a particular smartreflex module. This API will in turn call
  613. * into the registered smartreflex class disable API. This API will tell
  614. * the smartreflex class disable not to reset the VP voltage after
  615. * disabling smartreflex.
  616. */
  617. void omap_sr_disable(struct voltagedomain *voltdm)
  618. {
  619. struct omap_sr *sr = _sr_lookup(voltdm);
  620. if (IS_ERR(sr)) {
  621. pr_warn("%s: omap_sr struct for voltdm not found\n", __func__);
  622. return;
  623. }
  624. if (!sr->autocomp_active)
  625. return;
  626. if (!sr_class || !(sr_class->disable)) {
  627. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not registered\n",
  628. __func__);
  629. return;
  630. }
  631. sr_class->disable(sr, 0);
  632. }
  633. /**
  634. * omap_sr_disable_reset_volt() - API to disable SR and reset the
  635. * voltage processor voltage
  636. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  637. *
  638. * This API is to be called from the kernel in order to disable
  639. * a particular smartreflex module. This API will in turn call
  640. * into the registered smartreflex class disable API. This API will tell
  641. * the smartreflex class disable to reset the VP voltage after
  642. * disabling smartreflex.
  643. */
  644. void omap_sr_disable_reset_volt(struct voltagedomain *voltdm)
  645. {
  646. struct omap_sr *sr = _sr_lookup(voltdm);
  647. if (IS_ERR(sr)) {
  648. pr_warn("%s: omap_sr struct for voltdm not found\n", __func__);
  649. return;
  650. }
  651. if (!sr->autocomp_active)
  652. return;
  653. if (!sr_class || !(sr_class->disable)) {
  654. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not registered\n",
  655. __func__);
  656. return;
  657. }
  658. sr_class->disable(sr, 1);
  659. }
  660. /**
  661. * omap_sr_register_pmic() - API to register pmic specific info.
  662. * @pmic_data: The structure containing pmic specific data.
  663. *
  664. * This API is to be called from the PMIC specific code to register with
  665. * smartreflex driver pmic specific info. Currently the only info required
  666. * is the smartreflex init on the PMIC side.
  667. */
  668. void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data)
  669. {
  670. if (!pmic_data) {
  671. pr_warn("%s: Trying to register NULL PMIC data structure with smartreflex\n",
  672. __func__);
  673. return;
  674. }
  675. sr_pmic_data = pmic_data;
  676. }
  677. /* PM Debug FS entries to enable and disable smartreflex. */
  678. static int omap_sr_autocomp_show(void *data, u64 *val)
  679. {
  680. struct omap_sr *sr_info = data;
  681. if (!sr_info) {
  682. pr_warn("%s: omap_sr struct not found\n", __func__);
  683. return -EINVAL;
  684. }
  685. *val = sr_info->autocomp_active;
  686. return 0;
  687. }
  688. static int omap_sr_autocomp_store(void *data, u64 val)
  689. {
  690. struct omap_sr *sr_info = data;
  691. if (!sr_info) {
  692. pr_warn("%s: omap_sr struct not found\n", __func__);
  693. return -EINVAL;
  694. }
  695. /* Sanity check */
  696. if (val > 1) {
  697. pr_warn("%s: Invalid argument %lld\n", __func__, val);
  698. return -EINVAL;
  699. }
  700. /* control enable/disable only if there is a delta in value */
  701. if (sr_info->autocomp_active != val) {
  702. if (!val)
  703. sr_stop_vddautocomp(sr_info);
  704. else
  705. sr_start_vddautocomp(sr_info);
  706. }
  707. return 0;
  708. }
  709. DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
  710. omap_sr_autocomp_store, "%llu\n");
  711. static int __init omap_sr_probe(struct platform_device *pdev)
  712. {
  713. struct omap_sr *sr_info;
  714. struct omap_sr_data *pdata = pdev->dev.platform_data;
  715. struct resource *mem, *irq;
  716. struct dentry *nvalue_dir;
  717. int i, ret = 0;
  718. sr_info = devm_kzalloc(&pdev->dev, sizeof(struct omap_sr), GFP_KERNEL);
  719. if (!sr_info)
  720. return -ENOMEM;
  721. sr_info->name = devm_kzalloc(&pdev->dev,
  722. SMARTREFLEX_NAME_LEN, GFP_KERNEL);
  723. if (!sr_info->name)
  724. return -ENOMEM;
  725. platform_set_drvdata(pdev, sr_info);
  726. if (!pdata) {
  727. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  728. return -EINVAL;
  729. }
  730. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  731. sr_info->base = devm_ioremap_resource(&pdev->dev, mem);
  732. if (IS_ERR(sr_info->base)) {
  733. dev_err(&pdev->dev, "%s: ioremap fail\n", __func__);
  734. return PTR_ERR(sr_info->base);
  735. }
  736. irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  737. pm_runtime_enable(&pdev->dev);
  738. pm_runtime_irq_safe(&pdev->dev);
  739. snprintf(sr_info->name, SMARTREFLEX_NAME_LEN, "%s", pdata->name);
  740. sr_info->pdev = pdev;
  741. sr_info->srid = pdev->id;
  742. sr_info->voltdm = pdata->voltdm;
  743. sr_info->nvalue_table = pdata->nvalue_table;
  744. sr_info->nvalue_count = pdata->nvalue_count;
  745. sr_info->senn_mod = pdata->senn_mod;
  746. sr_info->senp_mod = pdata->senp_mod;
  747. sr_info->err_weight = pdata->err_weight;
  748. sr_info->err_maxlimit = pdata->err_maxlimit;
  749. sr_info->accum_data = pdata->accum_data;
  750. sr_info->senn_avgweight = pdata->senn_avgweight;
  751. sr_info->senp_avgweight = pdata->senp_avgweight;
  752. sr_info->autocomp_active = false;
  753. sr_info->ip_type = pdata->ip_type;
  754. if (irq)
  755. sr_info->irq = irq->start;
  756. sr_set_clk_length(sr_info);
  757. list_add(&sr_info->node, &sr_list);
  758. /*
  759. * Call into late init to do intializations that require
  760. * both sr driver and sr class driver to be initiallized.
  761. */
  762. if (sr_class) {
  763. ret = sr_late_init(sr_info);
  764. if (ret) {
  765. pr_warn("%s: Error in SR late init\n", __func__);
  766. goto err_list_del;
  767. }
  768. }
  769. dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__);
  770. if (!sr_dbg_dir) {
  771. sr_dbg_dir = debugfs_create_dir("smartreflex", NULL);
  772. if (IS_ERR_OR_NULL(sr_dbg_dir)) {
  773. ret = PTR_ERR(sr_dbg_dir);
  774. pr_err("%s:sr debugfs dir creation failed(%d)\n",
  775. __func__, ret);
  776. goto err_list_del;
  777. }
  778. }
  779. sr_info->dbg_dir = debugfs_create_dir(sr_info->name, sr_dbg_dir);
  780. if (IS_ERR_OR_NULL(sr_info->dbg_dir)) {
  781. dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n",
  782. __func__);
  783. ret = PTR_ERR(sr_info->dbg_dir);
  784. goto err_debugfs;
  785. }
  786. (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR,
  787. sr_info->dbg_dir, (void *)sr_info, &pm_sr_fops);
  788. (void) debugfs_create_x32("errweight", S_IRUGO, sr_info->dbg_dir,
  789. &sr_info->err_weight);
  790. (void) debugfs_create_x32("errmaxlimit", S_IRUGO, sr_info->dbg_dir,
  791. &sr_info->err_maxlimit);
  792. nvalue_dir = debugfs_create_dir("nvalue", sr_info->dbg_dir);
  793. if (IS_ERR_OR_NULL(nvalue_dir)) {
  794. dev_err(&pdev->dev, "%s: Unable to create debugfs directory for n-values\n",
  795. __func__);
  796. ret = PTR_ERR(nvalue_dir);
  797. goto err_debugfs;
  798. }
  799. if (sr_info->nvalue_count == 0 || !sr_info->nvalue_table) {
  800. dev_warn(&pdev->dev, "%s: %s: No Voltage table for the corresponding vdd. Cannot create debugfs entries for n-values\n",
  801. __func__, sr_info->name);
  802. ret = -ENODATA;
  803. goto err_debugfs;
  804. }
  805. for (i = 0; i < sr_info->nvalue_count; i++) {
  806. char name[NVALUE_NAME_LEN + 1];
  807. snprintf(name, sizeof(name), "volt_%lu",
  808. sr_info->nvalue_table[i].volt_nominal);
  809. (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
  810. &(sr_info->nvalue_table[i].nvalue));
  811. snprintf(name, sizeof(name), "errminlimit_%lu",
  812. sr_info->nvalue_table[i].volt_nominal);
  813. (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
  814. &(sr_info->nvalue_table[i].errminlimit));
  815. }
  816. return ret;
  817. err_debugfs:
  818. debugfs_remove_recursive(sr_info->dbg_dir);
  819. err_list_del:
  820. list_del(&sr_info->node);
  821. return ret;
  822. }
  823. static int omap_sr_remove(struct platform_device *pdev)
  824. {
  825. struct omap_sr_data *pdata = pdev->dev.platform_data;
  826. struct omap_sr *sr_info;
  827. if (!pdata) {
  828. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  829. return -EINVAL;
  830. }
  831. sr_info = _sr_lookup(pdata->voltdm);
  832. if (IS_ERR(sr_info)) {
  833. dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
  834. __func__);
  835. return PTR_ERR(sr_info);
  836. }
  837. if (sr_info->autocomp_active)
  838. sr_stop_vddautocomp(sr_info);
  839. if (sr_info->dbg_dir)
  840. debugfs_remove_recursive(sr_info->dbg_dir);
  841. pm_runtime_disable(&pdev->dev);
  842. list_del(&sr_info->node);
  843. return 0;
  844. }
  845. static void omap_sr_shutdown(struct platform_device *pdev)
  846. {
  847. struct omap_sr_data *pdata = pdev->dev.platform_data;
  848. struct omap_sr *sr_info;
  849. if (!pdata) {
  850. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  851. return;
  852. }
  853. sr_info = _sr_lookup(pdata->voltdm);
  854. if (IS_ERR(sr_info)) {
  855. dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
  856. __func__);
  857. return;
  858. }
  859. if (sr_info->autocomp_active)
  860. sr_stop_vddautocomp(sr_info);
  861. return;
  862. }
  863. static struct platform_driver smartreflex_driver = {
  864. .remove = omap_sr_remove,
  865. .shutdown = omap_sr_shutdown,
  866. .driver = {
  867. .name = DRIVER_NAME,
  868. },
  869. };
  870. static int __init sr_init(void)
  871. {
  872. int ret = 0;
  873. /*
  874. * sr_init is a late init. If by then a pmic specific API is not
  875. * registered either there is no need for anything to be done on
  876. * the PMIC side or somebody has forgotten to register a PMIC
  877. * handler. Warn for the second condition.
  878. */
  879. if (sr_pmic_data && sr_pmic_data->sr_pmic_init)
  880. sr_pmic_data->sr_pmic_init();
  881. else
  882. pr_warn("%s: No PMIC hook to init smartreflex\n", __func__);
  883. ret = platform_driver_probe(&smartreflex_driver, omap_sr_probe);
  884. if (ret) {
  885. pr_err("%s: platform driver register failed for SR\n",
  886. __func__);
  887. return ret;
  888. }
  889. return 0;
  890. }
  891. late_initcall(sr_init);
  892. static void __exit sr_exit(void)
  893. {
  894. platform_driver_unregister(&smartreflex_driver);
  895. }
  896. module_exit(sr_exit);
  897. MODULE_DESCRIPTION("OMAP Smartreflex Driver");
  898. MODULE_LICENSE("GPL");
  899. MODULE_ALIAS("platform:" DRIVER_NAME);
  900. MODULE_AUTHOR("Texas Instruments Inc");