mpc832x_mds.c 2.7 KB

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  1. /*
  2. * Copyright 2006 Freescale Semiconductor, Inc. All rights reserved.
  3. *
  4. * Description:
  5. * MPC832xE MDS board specific routines.
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the
  9. * Free Software Foundation; either version 2 of the License, or (at your
  10. * option) any later version.
  11. */
  12. #include <linux/stddef.h>
  13. #include <linux/kernel.h>
  14. #include <linux/init.h>
  15. #include <linux/errno.h>
  16. #include <linux/reboot.h>
  17. #include <linux/pci.h>
  18. #include <linux/kdev_t.h>
  19. #include <linux/major.h>
  20. #include <linux/console.h>
  21. #include <linux/delay.h>
  22. #include <linux/seq_file.h>
  23. #include <linux/root_dev.h>
  24. #include <linux/initrd.h>
  25. #include <linux/of_platform.h>
  26. #include <linux/of_device.h>
  27. #include <linux/atomic.h>
  28. #include <asm/time.h>
  29. #include <asm/io.h>
  30. #include <asm/machdep.h>
  31. #include <asm/ipic.h>
  32. #include <asm/irq.h>
  33. #include <asm/prom.h>
  34. #include <asm/udbg.h>
  35. #include <sysdev/fsl_soc.h>
  36. #include <sysdev/fsl_pci.h>
  37. #include <soc/fsl/qe/qe.h>
  38. #include <soc/fsl/qe/qe_ic.h>
  39. #include "mpc83xx.h"
  40. #undef DEBUG
  41. #ifdef DEBUG
  42. #define DBG(fmt...) udbg_printf(fmt)
  43. #else
  44. #define DBG(fmt...)
  45. #endif
  46. /* ************************************************************************
  47. *
  48. * Setup the architecture
  49. *
  50. */
  51. static void __init mpc832x_sys_setup_arch(void)
  52. {
  53. struct device_node *np;
  54. u8 __iomem *bcsr_regs = NULL;
  55. mpc83xx_setup_arch();
  56. /* Map BCSR area */
  57. np = of_find_node_by_name(NULL, "bcsr");
  58. if (np) {
  59. struct resource res;
  60. of_address_to_resource(np, 0, &res);
  61. bcsr_regs = ioremap(res.start, resource_size(&res));
  62. of_node_put(np);
  63. }
  64. #ifdef CONFIG_QUICC_ENGINE
  65. if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
  66. par_io_init(np);
  67. of_node_put(np);
  68. for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;)
  69. par_io_of_config(np);
  70. }
  71. if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
  72. != NULL){
  73. /* Reset the Ethernet PHYs */
  74. #define BCSR8_FETH_RST 0x50
  75. clrbits8(&bcsr_regs[8], BCSR8_FETH_RST);
  76. udelay(1000);
  77. setbits8(&bcsr_regs[8], BCSR8_FETH_RST);
  78. iounmap(bcsr_regs);
  79. of_node_put(np);
  80. }
  81. #endif /* CONFIG_QUICC_ENGINE */
  82. }
  83. machine_device_initcall(mpc832x_mds, mpc83xx_declare_of_platform_devices);
  84. /*
  85. * Called very early, MMU is off, device-tree isn't unflattened
  86. */
  87. static int __init mpc832x_sys_probe(void)
  88. {
  89. return of_machine_is_compatible("MPC832xMDS");
  90. }
  91. define_machine(mpc832x_mds) {
  92. .name = "MPC832x MDS",
  93. .probe = mpc832x_sys_probe,
  94. .setup_arch = mpc832x_sys_setup_arch,
  95. .init_IRQ = mpc83xx_ipic_and_qe_init_IRQ,
  96. .get_irq = ipic_get_irq,
  97. .restart = mpc83xx_restart,
  98. .time_init = mpc83xx_time_init,
  99. .calibrate_decr = generic_calibrate_decr,
  100. .progress = udbg_progress,
  101. };