book3s_xics.c 36 KB

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  1. /*
  2. * Copyright 2012 Michael Ellerman, IBM Corporation.
  3. * Copyright 2012 Benjamin Herrenschmidt, IBM Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License, version 2, as
  7. * published by the Free Software Foundation.
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/kvm_host.h>
  11. #include <linux/err.h>
  12. #include <linux/gfp.h>
  13. #include <linux/anon_inodes.h>
  14. #include <linux/spinlock.h>
  15. #include <asm/uaccess.h>
  16. #include <asm/kvm_book3s.h>
  17. #include <asm/kvm_ppc.h>
  18. #include <asm/hvcall.h>
  19. #include <asm/xics.h>
  20. #include <asm/debug.h>
  21. #include <asm/time.h>
  22. #include <linux/debugfs.h>
  23. #include <linux/seq_file.h>
  24. #include "book3s_xics.h"
  25. #if 1
  26. #define XICS_DBG(fmt...) do { } while (0)
  27. #else
  28. #define XICS_DBG(fmt...) trace_printk(fmt)
  29. #endif
  30. #define ENABLE_REALMODE true
  31. #define DEBUG_REALMODE false
  32. /*
  33. * LOCKING
  34. * =======
  35. *
  36. * Each ICS has a spin lock protecting the information about the IRQ
  37. * sources and avoiding simultaneous deliveries of the same interrupt.
  38. *
  39. * ICP operations are done via a single compare & swap transaction
  40. * (most ICP state fits in the union kvmppc_icp_state)
  41. */
  42. /*
  43. * TODO
  44. * ====
  45. *
  46. * - To speed up resends, keep a bitmap of "resend" set bits in the
  47. * ICS
  48. *
  49. * - Speed up server# -> ICP lookup (array ? hash table ?)
  50. *
  51. * - Make ICS lockless as well, or at least a per-interrupt lock or hashed
  52. * locks array to improve scalability
  53. */
  54. /* -- ICS routines -- */
  55. static void icp_deliver_irq(struct kvmppc_xics *xics, struct kvmppc_icp *icp,
  56. u32 new_irq);
  57. /*
  58. * Return value ideally indicates how the interrupt was handled, but no
  59. * callers look at it (given that we don't implement KVM_IRQ_LINE_STATUS),
  60. * so just return 0.
  61. */
  62. static int ics_deliver_irq(struct kvmppc_xics *xics, u32 irq, u32 level)
  63. {
  64. struct ics_irq_state *state;
  65. struct kvmppc_ics *ics;
  66. u16 src;
  67. XICS_DBG("ics deliver %#x (level: %d)\n", irq, level);
  68. ics = kvmppc_xics_find_ics(xics, irq, &src);
  69. if (!ics) {
  70. XICS_DBG("ics_deliver_irq: IRQ 0x%06x not found !\n", irq);
  71. return -EINVAL;
  72. }
  73. state = &ics->irq_state[src];
  74. if (!state->exists)
  75. return -EINVAL;
  76. /*
  77. * We set state->asserted locklessly. This should be fine as
  78. * we are the only setter, thus concurrent access is undefined
  79. * to begin with.
  80. */
  81. if ((level == 1 && state->lsi) || level == KVM_INTERRUPT_SET_LEVEL)
  82. state->asserted = 1;
  83. else if (level == 0 || level == KVM_INTERRUPT_UNSET) {
  84. state->asserted = 0;
  85. return 0;
  86. }
  87. /* Record which CPU this arrived on for passed-through interrupts */
  88. if (state->host_irq)
  89. state->intr_cpu = raw_smp_processor_id();
  90. /* Attempt delivery */
  91. icp_deliver_irq(xics, NULL, irq);
  92. return 0;
  93. }
  94. static void ics_check_resend(struct kvmppc_xics *xics, struct kvmppc_ics *ics,
  95. struct kvmppc_icp *icp)
  96. {
  97. int i;
  98. unsigned long flags;
  99. local_irq_save(flags);
  100. arch_spin_lock(&ics->lock);
  101. for (i = 0; i < KVMPPC_XICS_IRQ_PER_ICS; i++) {
  102. struct ics_irq_state *state = &ics->irq_state[i];
  103. if (!state->resend)
  104. continue;
  105. XICS_DBG("resend %#x prio %#x\n", state->number,
  106. state->priority);
  107. arch_spin_unlock(&ics->lock);
  108. local_irq_restore(flags);
  109. icp_deliver_irq(xics, icp, state->number);
  110. local_irq_save(flags);
  111. arch_spin_lock(&ics->lock);
  112. }
  113. arch_spin_unlock(&ics->lock);
  114. local_irq_restore(flags);
  115. }
  116. static bool write_xive(struct kvmppc_xics *xics, struct kvmppc_ics *ics,
  117. struct ics_irq_state *state,
  118. u32 server, u32 priority, u32 saved_priority)
  119. {
  120. bool deliver;
  121. unsigned long flags;
  122. local_irq_save(flags);
  123. arch_spin_lock(&ics->lock);
  124. state->server = server;
  125. state->priority = priority;
  126. state->saved_priority = saved_priority;
  127. deliver = false;
  128. if ((state->masked_pending || state->resend) && priority != MASKED) {
  129. state->masked_pending = 0;
  130. deliver = true;
  131. }
  132. arch_spin_unlock(&ics->lock);
  133. local_irq_restore(flags);
  134. return deliver;
  135. }
  136. int kvmppc_xics_set_xive(struct kvm *kvm, u32 irq, u32 server, u32 priority)
  137. {
  138. struct kvmppc_xics *xics = kvm->arch.xics;
  139. struct kvmppc_icp *icp;
  140. struct kvmppc_ics *ics;
  141. struct ics_irq_state *state;
  142. u16 src;
  143. if (!xics)
  144. return -ENODEV;
  145. ics = kvmppc_xics_find_ics(xics, irq, &src);
  146. if (!ics)
  147. return -EINVAL;
  148. state = &ics->irq_state[src];
  149. icp = kvmppc_xics_find_server(kvm, server);
  150. if (!icp)
  151. return -EINVAL;
  152. XICS_DBG("set_xive %#x server %#x prio %#x MP:%d RS:%d\n",
  153. irq, server, priority,
  154. state->masked_pending, state->resend);
  155. if (write_xive(xics, ics, state, server, priority, priority))
  156. icp_deliver_irq(xics, icp, irq);
  157. return 0;
  158. }
  159. int kvmppc_xics_get_xive(struct kvm *kvm, u32 irq, u32 *server, u32 *priority)
  160. {
  161. struct kvmppc_xics *xics = kvm->arch.xics;
  162. struct kvmppc_ics *ics;
  163. struct ics_irq_state *state;
  164. u16 src;
  165. unsigned long flags;
  166. if (!xics)
  167. return -ENODEV;
  168. ics = kvmppc_xics_find_ics(xics, irq, &src);
  169. if (!ics)
  170. return -EINVAL;
  171. state = &ics->irq_state[src];
  172. local_irq_save(flags);
  173. arch_spin_lock(&ics->lock);
  174. *server = state->server;
  175. *priority = state->priority;
  176. arch_spin_unlock(&ics->lock);
  177. local_irq_restore(flags);
  178. return 0;
  179. }
  180. int kvmppc_xics_int_on(struct kvm *kvm, u32 irq)
  181. {
  182. struct kvmppc_xics *xics = kvm->arch.xics;
  183. struct kvmppc_icp *icp;
  184. struct kvmppc_ics *ics;
  185. struct ics_irq_state *state;
  186. u16 src;
  187. if (!xics)
  188. return -ENODEV;
  189. ics = kvmppc_xics_find_ics(xics, irq, &src);
  190. if (!ics)
  191. return -EINVAL;
  192. state = &ics->irq_state[src];
  193. icp = kvmppc_xics_find_server(kvm, state->server);
  194. if (!icp)
  195. return -EINVAL;
  196. if (write_xive(xics, ics, state, state->server, state->saved_priority,
  197. state->saved_priority))
  198. icp_deliver_irq(xics, icp, irq);
  199. return 0;
  200. }
  201. int kvmppc_xics_int_off(struct kvm *kvm, u32 irq)
  202. {
  203. struct kvmppc_xics *xics = kvm->arch.xics;
  204. struct kvmppc_ics *ics;
  205. struct ics_irq_state *state;
  206. u16 src;
  207. if (!xics)
  208. return -ENODEV;
  209. ics = kvmppc_xics_find_ics(xics, irq, &src);
  210. if (!ics)
  211. return -EINVAL;
  212. state = &ics->irq_state[src];
  213. write_xive(xics, ics, state, state->server, MASKED, state->priority);
  214. return 0;
  215. }
  216. /* -- ICP routines, including hcalls -- */
  217. static inline bool icp_try_update(struct kvmppc_icp *icp,
  218. union kvmppc_icp_state old,
  219. union kvmppc_icp_state new,
  220. bool change_self)
  221. {
  222. bool success;
  223. /* Calculate new output value */
  224. new.out_ee = (new.xisr && (new.pending_pri < new.cppr));
  225. /* Attempt atomic update */
  226. success = cmpxchg64(&icp->state.raw, old.raw, new.raw) == old.raw;
  227. if (!success)
  228. goto bail;
  229. XICS_DBG("UPD [%04lx] - C:%02x M:%02x PP: %02x PI:%06x R:%d O:%d\n",
  230. icp->server_num,
  231. old.cppr, old.mfrr, old.pending_pri, old.xisr,
  232. old.need_resend, old.out_ee);
  233. XICS_DBG("UPD - C:%02x M:%02x PP: %02x PI:%06x R:%d O:%d\n",
  234. new.cppr, new.mfrr, new.pending_pri, new.xisr,
  235. new.need_resend, new.out_ee);
  236. /*
  237. * Check for output state update
  238. *
  239. * Note that this is racy since another processor could be updating
  240. * the state already. This is why we never clear the interrupt output
  241. * here, we only ever set it. The clear only happens prior to doing
  242. * an update and only by the processor itself. Currently we do it
  243. * in Accept (H_XIRR) and Up_Cppr (H_XPPR).
  244. *
  245. * We also do not try to figure out whether the EE state has changed,
  246. * we unconditionally set it if the new state calls for it. The reason
  247. * for that is that we opportunistically remove the pending interrupt
  248. * flag when raising CPPR, so we need to set it back here if an
  249. * interrupt is still pending.
  250. */
  251. if (new.out_ee) {
  252. kvmppc_book3s_queue_irqprio(icp->vcpu,
  253. BOOK3S_INTERRUPT_EXTERNAL_LEVEL);
  254. if (!change_self)
  255. kvmppc_fast_vcpu_kick(icp->vcpu);
  256. }
  257. bail:
  258. return success;
  259. }
  260. static void icp_check_resend(struct kvmppc_xics *xics,
  261. struct kvmppc_icp *icp)
  262. {
  263. u32 icsid;
  264. /* Order this load with the test for need_resend in the caller */
  265. smp_rmb();
  266. for_each_set_bit(icsid, icp->resend_map, xics->max_icsid + 1) {
  267. struct kvmppc_ics *ics = xics->ics[icsid];
  268. if (!test_and_clear_bit(icsid, icp->resend_map))
  269. continue;
  270. if (!ics)
  271. continue;
  272. ics_check_resend(xics, ics, icp);
  273. }
  274. }
  275. static bool icp_try_to_deliver(struct kvmppc_icp *icp, u32 irq, u8 priority,
  276. u32 *reject)
  277. {
  278. union kvmppc_icp_state old_state, new_state;
  279. bool success;
  280. XICS_DBG("try deliver %#x(P:%#x) to server %#lx\n", irq, priority,
  281. icp->server_num);
  282. do {
  283. old_state = new_state = READ_ONCE(icp->state);
  284. *reject = 0;
  285. /* See if we can deliver */
  286. success = new_state.cppr > priority &&
  287. new_state.mfrr > priority &&
  288. new_state.pending_pri > priority;
  289. /*
  290. * If we can, check for a rejection and perform the
  291. * delivery
  292. */
  293. if (success) {
  294. *reject = new_state.xisr;
  295. new_state.xisr = irq;
  296. new_state.pending_pri = priority;
  297. } else {
  298. /*
  299. * If we failed to deliver we set need_resend
  300. * so a subsequent CPPR state change causes us
  301. * to try a new delivery.
  302. */
  303. new_state.need_resend = true;
  304. }
  305. } while (!icp_try_update(icp, old_state, new_state, false));
  306. return success;
  307. }
  308. static void icp_deliver_irq(struct kvmppc_xics *xics, struct kvmppc_icp *icp,
  309. u32 new_irq)
  310. {
  311. struct ics_irq_state *state;
  312. struct kvmppc_ics *ics;
  313. u32 reject;
  314. u16 src;
  315. unsigned long flags;
  316. /*
  317. * This is used both for initial delivery of an interrupt and
  318. * for subsequent rejection.
  319. *
  320. * Rejection can be racy vs. resends. We have evaluated the
  321. * rejection in an atomic ICP transaction which is now complete,
  322. * so potentially the ICP can already accept the interrupt again.
  323. *
  324. * So we need to retry the delivery. Essentially the reject path
  325. * boils down to a failed delivery. Always.
  326. *
  327. * Now the interrupt could also have moved to a different target,
  328. * thus we may need to re-do the ICP lookup as well
  329. */
  330. again:
  331. /* Get the ICS state and lock it */
  332. ics = kvmppc_xics_find_ics(xics, new_irq, &src);
  333. if (!ics) {
  334. XICS_DBG("icp_deliver_irq: IRQ 0x%06x not found !\n", new_irq);
  335. return;
  336. }
  337. state = &ics->irq_state[src];
  338. /* Get a lock on the ICS */
  339. local_irq_save(flags);
  340. arch_spin_lock(&ics->lock);
  341. /* Get our server */
  342. if (!icp || state->server != icp->server_num) {
  343. icp = kvmppc_xics_find_server(xics->kvm, state->server);
  344. if (!icp) {
  345. pr_warn("icp_deliver_irq: IRQ 0x%06x server 0x%x not found !\n",
  346. new_irq, state->server);
  347. goto out;
  348. }
  349. }
  350. /* Clear the resend bit of that interrupt */
  351. state->resend = 0;
  352. /*
  353. * If masked, bail out
  354. *
  355. * Note: PAPR doesn't mention anything about masked pending
  356. * when doing a resend, only when doing a delivery.
  357. *
  358. * However that would have the effect of losing a masked
  359. * interrupt that was rejected and isn't consistent with
  360. * the whole masked_pending business which is about not
  361. * losing interrupts that occur while masked.
  362. *
  363. * I don't differentiate normal deliveries and resends, this
  364. * implementation will differ from PAPR and not lose such
  365. * interrupts.
  366. */
  367. if (state->priority == MASKED) {
  368. XICS_DBG("irq %#x masked pending\n", new_irq);
  369. state->masked_pending = 1;
  370. goto out;
  371. }
  372. /*
  373. * Try the delivery, this will set the need_resend flag
  374. * in the ICP as part of the atomic transaction if the
  375. * delivery is not possible.
  376. *
  377. * Note that if successful, the new delivery might have itself
  378. * rejected an interrupt that was "delivered" before we took the
  379. * ics spin lock.
  380. *
  381. * In this case we do the whole sequence all over again for the
  382. * new guy. We cannot assume that the rejected interrupt is less
  383. * favored than the new one, and thus doesn't need to be delivered,
  384. * because by the time we exit icp_try_to_deliver() the target
  385. * processor may well have alrady consumed & completed it, and thus
  386. * the rejected interrupt might actually be already acceptable.
  387. */
  388. if (icp_try_to_deliver(icp, new_irq, state->priority, &reject)) {
  389. /*
  390. * Delivery was successful, did we reject somebody else ?
  391. */
  392. if (reject && reject != XICS_IPI) {
  393. arch_spin_unlock(&ics->lock);
  394. local_irq_restore(flags);
  395. new_irq = reject;
  396. goto again;
  397. }
  398. } else {
  399. /*
  400. * We failed to deliver the interrupt we need to set the
  401. * resend map bit and mark the ICS state as needing a resend
  402. */
  403. set_bit(ics->icsid, icp->resend_map);
  404. state->resend = 1;
  405. /*
  406. * If the need_resend flag got cleared in the ICP some time
  407. * between icp_try_to_deliver() atomic update and now, then
  408. * we know it might have missed the resend_map bit. So we
  409. * retry
  410. */
  411. smp_mb();
  412. if (!icp->state.need_resend) {
  413. arch_spin_unlock(&ics->lock);
  414. local_irq_restore(flags);
  415. goto again;
  416. }
  417. }
  418. out:
  419. arch_spin_unlock(&ics->lock);
  420. local_irq_restore(flags);
  421. }
  422. static void icp_down_cppr(struct kvmppc_xics *xics, struct kvmppc_icp *icp,
  423. u8 new_cppr)
  424. {
  425. union kvmppc_icp_state old_state, new_state;
  426. bool resend;
  427. /*
  428. * This handles several related states in one operation:
  429. *
  430. * ICP State: Down_CPPR
  431. *
  432. * Load CPPR with new value and if the XISR is 0
  433. * then check for resends:
  434. *
  435. * ICP State: Resend
  436. *
  437. * If MFRR is more favored than CPPR, check for IPIs
  438. * and notify ICS of a potential resend. This is done
  439. * asynchronously (when used in real mode, we will have
  440. * to exit here).
  441. *
  442. * We do not handle the complete Check_IPI as documented
  443. * here. In the PAPR, this state will be used for both
  444. * Set_MFRR and Down_CPPR. However, we know that we aren't
  445. * changing the MFRR state here so we don't need to handle
  446. * the case of an MFRR causing a reject of a pending irq,
  447. * this will have been handled when the MFRR was set in the
  448. * first place.
  449. *
  450. * Thus we don't have to handle rejects, only resends.
  451. *
  452. * When implementing real mode for HV KVM, resend will lead to
  453. * a H_TOO_HARD return and the whole transaction will be handled
  454. * in virtual mode.
  455. */
  456. do {
  457. old_state = new_state = READ_ONCE(icp->state);
  458. /* Down_CPPR */
  459. new_state.cppr = new_cppr;
  460. /*
  461. * Cut down Resend / Check_IPI / IPI
  462. *
  463. * The logic is that we cannot have a pending interrupt
  464. * trumped by an IPI at this point (see above), so we
  465. * know that either the pending interrupt is already an
  466. * IPI (in which case we don't care to override it) or
  467. * it's either more favored than us or non existent
  468. */
  469. if (new_state.mfrr < new_cppr &&
  470. new_state.mfrr <= new_state.pending_pri) {
  471. WARN_ON(new_state.xisr != XICS_IPI &&
  472. new_state.xisr != 0);
  473. new_state.pending_pri = new_state.mfrr;
  474. new_state.xisr = XICS_IPI;
  475. }
  476. /* Latch/clear resend bit */
  477. resend = new_state.need_resend;
  478. new_state.need_resend = 0;
  479. } while (!icp_try_update(icp, old_state, new_state, true));
  480. /*
  481. * Now handle resend checks. Those are asynchronous to the ICP
  482. * state update in HW (ie bus transactions) so we can handle them
  483. * separately here too
  484. */
  485. if (resend)
  486. icp_check_resend(xics, icp);
  487. }
  488. static noinline unsigned long kvmppc_h_xirr(struct kvm_vcpu *vcpu)
  489. {
  490. union kvmppc_icp_state old_state, new_state;
  491. struct kvmppc_icp *icp = vcpu->arch.icp;
  492. u32 xirr;
  493. /* First, remove EE from the processor */
  494. kvmppc_book3s_dequeue_irqprio(icp->vcpu,
  495. BOOK3S_INTERRUPT_EXTERNAL_LEVEL);
  496. /*
  497. * ICP State: Accept_Interrupt
  498. *
  499. * Return the pending interrupt (if any) along with the
  500. * current CPPR, then clear the XISR & set CPPR to the
  501. * pending priority
  502. */
  503. do {
  504. old_state = new_state = READ_ONCE(icp->state);
  505. xirr = old_state.xisr | (((u32)old_state.cppr) << 24);
  506. if (!old_state.xisr)
  507. break;
  508. new_state.cppr = new_state.pending_pri;
  509. new_state.pending_pri = 0xff;
  510. new_state.xisr = 0;
  511. } while (!icp_try_update(icp, old_state, new_state, true));
  512. XICS_DBG("h_xirr vcpu %d xirr %#x\n", vcpu->vcpu_id, xirr);
  513. return xirr;
  514. }
  515. static noinline int kvmppc_h_ipi(struct kvm_vcpu *vcpu, unsigned long server,
  516. unsigned long mfrr)
  517. {
  518. union kvmppc_icp_state old_state, new_state;
  519. struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
  520. struct kvmppc_icp *icp;
  521. u32 reject;
  522. bool resend;
  523. bool local;
  524. XICS_DBG("h_ipi vcpu %d to server %lu mfrr %#lx\n",
  525. vcpu->vcpu_id, server, mfrr);
  526. icp = vcpu->arch.icp;
  527. local = icp->server_num == server;
  528. if (!local) {
  529. icp = kvmppc_xics_find_server(vcpu->kvm, server);
  530. if (!icp)
  531. return H_PARAMETER;
  532. }
  533. /*
  534. * ICP state: Set_MFRR
  535. *
  536. * If the CPPR is more favored than the new MFRR, then
  537. * nothing needs to be rejected as there can be no XISR to
  538. * reject. If the MFRR is being made less favored then
  539. * there might be a previously-rejected interrupt needing
  540. * to be resent.
  541. *
  542. * ICP state: Check_IPI
  543. *
  544. * If the CPPR is less favored, then we might be replacing
  545. * an interrupt, and thus need to possibly reject it.
  546. *
  547. * ICP State: IPI
  548. *
  549. * Besides rejecting any pending interrupts, we also
  550. * update XISR and pending_pri to mark IPI as pending.
  551. *
  552. * PAPR does not describe this state, but if the MFRR is being
  553. * made less favored than its earlier value, there might be
  554. * a previously-rejected interrupt needing to be resent.
  555. * Ideally, we would want to resend only if
  556. * prio(pending_interrupt) < mfrr &&
  557. * prio(pending_interrupt) < cppr
  558. * where pending interrupt is the one that was rejected. But
  559. * we don't have that state, so we simply trigger a resend
  560. * whenever the MFRR is made less favored.
  561. */
  562. do {
  563. old_state = new_state = READ_ONCE(icp->state);
  564. /* Set_MFRR */
  565. new_state.mfrr = mfrr;
  566. /* Check_IPI */
  567. reject = 0;
  568. resend = false;
  569. if (mfrr < new_state.cppr) {
  570. /* Reject a pending interrupt if not an IPI */
  571. if (mfrr <= new_state.pending_pri) {
  572. reject = new_state.xisr;
  573. new_state.pending_pri = mfrr;
  574. new_state.xisr = XICS_IPI;
  575. }
  576. }
  577. if (mfrr > old_state.mfrr) {
  578. resend = new_state.need_resend;
  579. new_state.need_resend = 0;
  580. }
  581. } while (!icp_try_update(icp, old_state, new_state, local));
  582. /* Handle reject */
  583. if (reject && reject != XICS_IPI)
  584. icp_deliver_irq(xics, icp, reject);
  585. /* Handle resend */
  586. if (resend)
  587. icp_check_resend(xics, icp);
  588. return H_SUCCESS;
  589. }
  590. static int kvmppc_h_ipoll(struct kvm_vcpu *vcpu, unsigned long server)
  591. {
  592. union kvmppc_icp_state state;
  593. struct kvmppc_icp *icp;
  594. icp = vcpu->arch.icp;
  595. if (icp->server_num != server) {
  596. icp = kvmppc_xics_find_server(vcpu->kvm, server);
  597. if (!icp)
  598. return H_PARAMETER;
  599. }
  600. state = READ_ONCE(icp->state);
  601. kvmppc_set_gpr(vcpu, 4, ((u32)state.cppr << 24) | state.xisr);
  602. kvmppc_set_gpr(vcpu, 5, state.mfrr);
  603. return H_SUCCESS;
  604. }
  605. static noinline void kvmppc_h_cppr(struct kvm_vcpu *vcpu, unsigned long cppr)
  606. {
  607. union kvmppc_icp_state old_state, new_state;
  608. struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
  609. struct kvmppc_icp *icp = vcpu->arch.icp;
  610. u32 reject;
  611. XICS_DBG("h_cppr vcpu %d cppr %#lx\n", vcpu->vcpu_id, cppr);
  612. /*
  613. * ICP State: Set_CPPR
  614. *
  615. * We can safely compare the new value with the current
  616. * value outside of the transaction as the CPPR is only
  617. * ever changed by the processor on itself
  618. */
  619. if (cppr > icp->state.cppr)
  620. icp_down_cppr(xics, icp, cppr);
  621. else if (cppr == icp->state.cppr)
  622. return;
  623. /*
  624. * ICP State: Up_CPPR
  625. *
  626. * The processor is raising its priority, this can result
  627. * in a rejection of a pending interrupt:
  628. *
  629. * ICP State: Reject_Current
  630. *
  631. * We can remove EE from the current processor, the update
  632. * transaction will set it again if needed
  633. */
  634. kvmppc_book3s_dequeue_irqprio(icp->vcpu,
  635. BOOK3S_INTERRUPT_EXTERNAL_LEVEL);
  636. do {
  637. old_state = new_state = READ_ONCE(icp->state);
  638. reject = 0;
  639. new_state.cppr = cppr;
  640. if (cppr <= new_state.pending_pri) {
  641. reject = new_state.xisr;
  642. new_state.xisr = 0;
  643. new_state.pending_pri = 0xff;
  644. }
  645. } while (!icp_try_update(icp, old_state, new_state, true));
  646. /*
  647. * Check for rejects. They are handled by doing a new delivery
  648. * attempt (see comments in icp_deliver_irq).
  649. */
  650. if (reject && reject != XICS_IPI)
  651. icp_deliver_irq(xics, icp, reject);
  652. }
  653. static noinline int kvmppc_h_eoi(struct kvm_vcpu *vcpu, unsigned long xirr)
  654. {
  655. struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
  656. struct kvmppc_icp *icp = vcpu->arch.icp;
  657. struct kvmppc_ics *ics;
  658. struct ics_irq_state *state;
  659. u32 irq = xirr & 0x00ffffff;
  660. u16 src;
  661. XICS_DBG("h_eoi vcpu %d eoi %#lx\n", vcpu->vcpu_id, xirr);
  662. /*
  663. * ICP State: EOI
  664. *
  665. * Note: If EOI is incorrectly used by SW to lower the CPPR
  666. * value (ie more favored), we do not check for rejection of
  667. * a pending interrupt, this is a SW error and PAPR sepcifies
  668. * that we don't have to deal with it.
  669. *
  670. * The sending of an EOI to the ICS is handled after the
  671. * CPPR update
  672. *
  673. * ICP State: Down_CPPR which we handle
  674. * in a separate function as it's shared with H_CPPR.
  675. */
  676. icp_down_cppr(xics, icp, xirr >> 24);
  677. /* IPIs have no EOI */
  678. if (irq == XICS_IPI)
  679. return H_SUCCESS;
  680. /*
  681. * EOI handling: If the interrupt is still asserted, we need to
  682. * resend it. We can take a lockless "peek" at the ICS state here.
  683. *
  684. * "Message" interrupts will never have "asserted" set
  685. */
  686. ics = kvmppc_xics_find_ics(xics, irq, &src);
  687. if (!ics) {
  688. XICS_DBG("h_eoi: IRQ 0x%06x not found !\n", irq);
  689. return H_PARAMETER;
  690. }
  691. state = &ics->irq_state[src];
  692. /* Still asserted, resend it */
  693. if (state->asserted)
  694. icp_deliver_irq(xics, icp, irq);
  695. kvm_notify_acked_irq(vcpu->kvm, 0, irq);
  696. return H_SUCCESS;
  697. }
  698. int kvmppc_xics_rm_complete(struct kvm_vcpu *vcpu, u32 hcall)
  699. {
  700. struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
  701. struct kvmppc_icp *icp = vcpu->arch.icp;
  702. XICS_DBG("XICS_RM: H_%x completing, act: %x state: %lx tgt: %p\n",
  703. hcall, icp->rm_action, icp->rm_dbgstate.raw, icp->rm_dbgtgt);
  704. if (icp->rm_action & XICS_RM_KICK_VCPU) {
  705. icp->n_rm_kick_vcpu++;
  706. kvmppc_fast_vcpu_kick(icp->rm_kick_target);
  707. }
  708. if (icp->rm_action & XICS_RM_CHECK_RESEND) {
  709. icp->n_rm_check_resend++;
  710. icp_check_resend(xics, icp->rm_resend_icp);
  711. }
  712. if (icp->rm_action & XICS_RM_REJECT) {
  713. icp->n_rm_reject++;
  714. icp_deliver_irq(xics, icp, icp->rm_reject);
  715. }
  716. if (icp->rm_action & XICS_RM_NOTIFY_EOI) {
  717. icp->n_rm_notify_eoi++;
  718. kvm_notify_acked_irq(vcpu->kvm, 0, icp->rm_eoied_irq);
  719. }
  720. icp->rm_action = 0;
  721. return H_SUCCESS;
  722. }
  723. EXPORT_SYMBOL_GPL(kvmppc_xics_rm_complete);
  724. int kvmppc_xics_hcall(struct kvm_vcpu *vcpu, u32 req)
  725. {
  726. struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
  727. unsigned long res;
  728. int rc = H_SUCCESS;
  729. /* Check if we have an ICP */
  730. if (!xics || !vcpu->arch.icp)
  731. return H_HARDWARE;
  732. /* These requests don't have real-mode implementations at present */
  733. switch (req) {
  734. case H_XIRR_X:
  735. res = kvmppc_h_xirr(vcpu);
  736. kvmppc_set_gpr(vcpu, 4, res);
  737. kvmppc_set_gpr(vcpu, 5, get_tb());
  738. return rc;
  739. case H_IPOLL:
  740. rc = kvmppc_h_ipoll(vcpu, kvmppc_get_gpr(vcpu, 4));
  741. return rc;
  742. }
  743. /* Check for real mode returning too hard */
  744. if (xics->real_mode && is_kvmppc_hv_enabled(vcpu->kvm))
  745. return kvmppc_xics_rm_complete(vcpu, req);
  746. switch (req) {
  747. case H_XIRR:
  748. res = kvmppc_h_xirr(vcpu);
  749. kvmppc_set_gpr(vcpu, 4, res);
  750. break;
  751. case H_CPPR:
  752. kvmppc_h_cppr(vcpu, kvmppc_get_gpr(vcpu, 4));
  753. break;
  754. case H_EOI:
  755. rc = kvmppc_h_eoi(vcpu, kvmppc_get_gpr(vcpu, 4));
  756. break;
  757. case H_IPI:
  758. rc = kvmppc_h_ipi(vcpu, kvmppc_get_gpr(vcpu, 4),
  759. kvmppc_get_gpr(vcpu, 5));
  760. break;
  761. }
  762. return rc;
  763. }
  764. EXPORT_SYMBOL_GPL(kvmppc_xics_hcall);
  765. /* -- Initialisation code etc. -- */
  766. static void xics_debugfs_irqmap(struct seq_file *m,
  767. struct kvmppc_passthru_irqmap *pimap)
  768. {
  769. int i;
  770. if (!pimap)
  771. return;
  772. seq_printf(m, "========\nPIRQ mappings: %d maps\n===========\n",
  773. pimap->n_mapped);
  774. for (i = 0; i < pimap->n_mapped; i++) {
  775. seq_printf(m, "r_hwirq=%x, v_hwirq=%x\n",
  776. pimap->mapped[i].r_hwirq, pimap->mapped[i].v_hwirq);
  777. }
  778. }
  779. static int xics_debug_show(struct seq_file *m, void *private)
  780. {
  781. struct kvmppc_xics *xics = m->private;
  782. struct kvm *kvm = xics->kvm;
  783. struct kvm_vcpu *vcpu;
  784. int icsid, i;
  785. unsigned long flags;
  786. unsigned long t_rm_kick_vcpu, t_rm_check_resend;
  787. unsigned long t_rm_reject, t_rm_notify_eoi;
  788. unsigned long t_reject, t_check_resend;
  789. if (!kvm)
  790. return 0;
  791. t_rm_kick_vcpu = 0;
  792. t_rm_notify_eoi = 0;
  793. t_rm_check_resend = 0;
  794. t_rm_reject = 0;
  795. t_check_resend = 0;
  796. t_reject = 0;
  797. xics_debugfs_irqmap(m, kvm->arch.pimap);
  798. seq_printf(m, "=========\nICP state\n=========\n");
  799. kvm_for_each_vcpu(i, vcpu, kvm) {
  800. struct kvmppc_icp *icp = vcpu->arch.icp;
  801. union kvmppc_icp_state state;
  802. if (!icp)
  803. continue;
  804. state.raw = READ_ONCE(icp->state.raw);
  805. seq_printf(m, "cpu server %#lx XIRR:%#x PPRI:%#x CPPR:%#x MFRR:%#x OUT:%d NR:%d\n",
  806. icp->server_num, state.xisr,
  807. state.pending_pri, state.cppr, state.mfrr,
  808. state.out_ee, state.need_resend);
  809. t_rm_kick_vcpu += icp->n_rm_kick_vcpu;
  810. t_rm_notify_eoi += icp->n_rm_notify_eoi;
  811. t_rm_check_resend += icp->n_rm_check_resend;
  812. t_rm_reject += icp->n_rm_reject;
  813. t_check_resend += icp->n_check_resend;
  814. t_reject += icp->n_reject;
  815. }
  816. seq_printf(m, "ICP Guest->Host totals: kick_vcpu=%lu check_resend=%lu reject=%lu notify_eoi=%lu\n",
  817. t_rm_kick_vcpu, t_rm_check_resend,
  818. t_rm_reject, t_rm_notify_eoi);
  819. seq_printf(m, "ICP Real Mode totals: check_resend=%lu resend=%lu\n",
  820. t_check_resend, t_reject);
  821. for (icsid = 0; icsid <= KVMPPC_XICS_MAX_ICS_ID; icsid++) {
  822. struct kvmppc_ics *ics = xics->ics[icsid];
  823. if (!ics)
  824. continue;
  825. seq_printf(m, "=========\nICS state for ICS 0x%x\n=========\n",
  826. icsid);
  827. local_irq_save(flags);
  828. arch_spin_lock(&ics->lock);
  829. for (i = 0; i < KVMPPC_XICS_IRQ_PER_ICS; i++) {
  830. struct ics_irq_state *irq = &ics->irq_state[i];
  831. seq_printf(m, "irq 0x%06x: server %#x prio %#x save prio %#x asserted %d resend %d masked pending %d\n",
  832. irq->number, irq->server, irq->priority,
  833. irq->saved_priority, irq->asserted,
  834. irq->resend, irq->masked_pending);
  835. }
  836. arch_spin_unlock(&ics->lock);
  837. local_irq_restore(flags);
  838. }
  839. return 0;
  840. }
  841. static int xics_debug_open(struct inode *inode, struct file *file)
  842. {
  843. return single_open(file, xics_debug_show, inode->i_private);
  844. }
  845. static const struct file_operations xics_debug_fops = {
  846. .open = xics_debug_open,
  847. .read = seq_read,
  848. .llseek = seq_lseek,
  849. .release = single_release,
  850. };
  851. static void xics_debugfs_init(struct kvmppc_xics *xics)
  852. {
  853. char *name;
  854. name = kasprintf(GFP_KERNEL, "kvm-xics-%p", xics);
  855. if (!name) {
  856. pr_err("%s: no memory for name\n", __func__);
  857. return;
  858. }
  859. xics->dentry = debugfs_create_file(name, S_IRUGO, powerpc_debugfs_root,
  860. xics, &xics_debug_fops);
  861. pr_debug("%s: created %s\n", __func__, name);
  862. kfree(name);
  863. }
  864. static struct kvmppc_ics *kvmppc_xics_create_ics(struct kvm *kvm,
  865. struct kvmppc_xics *xics, int irq)
  866. {
  867. struct kvmppc_ics *ics;
  868. int i, icsid;
  869. icsid = irq >> KVMPPC_XICS_ICS_SHIFT;
  870. mutex_lock(&kvm->lock);
  871. /* ICS already exists - somebody else got here first */
  872. if (xics->ics[icsid])
  873. goto out;
  874. /* Create the ICS */
  875. ics = kzalloc(sizeof(struct kvmppc_ics), GFP_KERNEL);
  876. if (!ics)
  877. goto out;
  878. ics->icsid = icsid;
  879. for (i = 0; i < KVMPPC_XICS_IRQ_PER_ICS; i++) {
  880. ics->irq_state[i].number = (icsid << KVMPPC_XICS_ICS_SHIFT) | i;
  881. ics->irq_state[i].priority = MASKED;
  882. ics->irq_state[i].saved_priority = MASKED;
  883. }
  884. smp_wmb();
  885. xics->ics[icsid] = ics;
  886. if (icsid > xics->max_icsid)
  887. xics->max_icsid = icsid;
  888. out:
  889. mutex_unlock(&kvm->lock);
  890. return xics->ics[icsid];
  891. }
  892. int kvmppc_xics_create_icp(struct kvm_vcpu *vcpu, unsigned long server_num)
  893. {
  894. struct kvmppc_icp *icp;
  895. if (!vcpu->kvm->arch.xics)
  896. return -ENODEV;
  897. if (kvmppc_xics_find_server(vcpu->kvm, server_num))
  898. return -EEXIST;
  899. icp = kzalloc(sizeof(struct kvmppc_icp), GFP_KERNEL);
  900. if (!icp)
  901. return -ENOMEM;
  902. icp->vcpu = vcpu;
  903. icp->server_num = server_num;
  904. icp->state.mfrr = MASKED;
  905. icp->state.pending_pri = MASKED;
  906. vcpu->arch.icp = icp;
  907. XICS_DBG("created server for vcpu %d\n", vcpu->vcpu_id);
  908. return 0;
  909. }
  910. u64 kvmppc_xics_get_icp(struct kvm_vcpu *vcpu)
  911. {
  912. struct kvmppc_icp *icp = vcpu->arch.icp;
  913. union kvmppc_icp_state state;
  914. if (!icp)
  915. return 0;
  916. state = icp->state;
  917. return ((u64)state.cppr << KVM_REG_PPC_ICP_CPPR_SHIFT) |
  918. ((u64)state.xisr << KVM_REG_PPC_ICP_XISR_SHIFT) |
  919. ((u64)state.mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT) |
  920. ((u64)state.pending_pri << KVM_REG_PPC_ICP_PPRI_SHIFT);
  921. }
  922. int kvmppc_xics_set_icp(struct kvm_vcpu *vcpu, u64 icpval)
  923. {
  924. struct kvmppc_icp *icp = vcpu->arch.icp;
  925. struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
  926. union kvmppc_icp_state old_state, new_state;
  927. struct kvmppc_ics *ics;
  928. u8 cppr, mfrr, pending_pri;
  929. u32 xisr;
  930. u16 src;
  931. bool resend;
  932. if (!icp || !xics)
  933. return -ENOENT;
  934. cppr = icpval >> KVM_REG_PPC_ICP_CPPR_SHIFT;
  935. xisr = (icpval >> KVM_REG_PPC_ICP_XISR_SHIFT) &
  936. KVM_REG_PPC_ICP_XISR_MASK;
  937. mfrr = icpval >> KVM_REG_PPC_ICP_MFRR_SHIFT;
  938. pending_pri = icpval >> KVM_REG_PPC_ICP_PPRI_SHIFT;
  939. /* Require the new state to be internally consistent */
  940. if (xisr == 0) {
  941. if (pending_pri != 0xff)
  942. return -EINVAL;
  943. } else if (xisr == XICS_IPI) {
  944. if (pending_pri != mfrr || pending_pri >= cppr)
  945. return -EINVAL;
  946. } else {
  947. if (pending_pri >= mfrr || pending_pri >= cppr)
  948. return -EINVAL;
  949. ics = kvmppc_xics_find_ics(xics, xisr, &src);
  950. if (!ics)
  951. return -EINVAL;
  952. }
  953. new_state.raw = 0;
  954. new_state.cppr = cppr;
  955. new_state.xisr = xisr;
  956. new_state.mfrr = mfrr;
  957. new_state.pending_pri = pending_pri;
  958. /*
  959. * Deassert the CPU interrupt request.
  960. * icp_try_update will reassert it if necessary.
  961. */
  962. kvmppc_book3s_dequeue_irqprio(icp->vcpu,
  963. BOOK3S_INTERRUPT_EXTERNAL_LEVEL);
  964. /*
  965. * Note that if we displace an interrupt from old_state.xisr,
  966. * we don't mark it as rejected. We expect userspace to set
  967. * the state of the interrupt sources to be consistent with
  968. * the ICP states (either before or afterwards, which doesn't
  969. * matter). We do handle resends due to CPPR becoming less
  970. * favoured because that is necessary to end up with a
  971. * consistent state in the situation where userspace restores
  972. * the ICS states before the ICP states.
  973. */
  974. do {
  975. old_state = READ_ONCE(icp->state);
  976. if (new_state.mfrr <= old_state.mfrr) {
  977. resend = false;
  978. new_state.need_resend = old_state.need_resend;
  979. } else {
  980. resend = old_state.need_resend;
  981. new_state.need_resend = 0;
  982. }
  983. } while (!icp_try_update(icp, old_state, new_state, false));
  984. if (resend)
  985. icp_check_resend(xics, icp);
  986. return 0;
  987. }
  988. static int xics_get_source(struct kvmppc_xics *xics, long irq, u64 addr)
  989. {
  990. int ret;
  991. struct kvmppc_ics *ics;
  992. struct ics_irq_state *irqp;
  993. u64 __user *ubufp = (u64 __user *) addr;
  994. u16 idx;
  995. u64 val, prio;
  996. unsigned long flags;
  997. ics = kvmppc_xics_find_ics(xics, irq, &idx);
  998. if (!ics)
  999. return -ENOENT;
  1000. irqp = &ics->irq_state[idx];
  1001. local_irq_save(flags);
  1002. arch_spin_lock(&ics->lock);
  1003. ret = -ENOENT;
  1004. if (irqp->exists) {
  1005. val = irqp->server;
  1006. prio = irqp->priority;
  1007. if (prio == MASKED) {
  1008. val |= KVM_XICS_MASKED;
  1009. prio = irqp->saved_priority;
  1010. }
  1011. val |= prio << KVM_XICS_PRIORITY_SHIFT;
  1012. if (irqp->lsi) {
  1013. val |= KVM_XICS_LEVEL_SENSITIVE;
  1014. if (irqp->asserted)
  1015. val |= KVM_XICS_PENDING;
  1016. } else if (irqp->masked_pending || irqp->resend)
  1017. val |= KVM_XICS_PENDING;
  1018. ret = 0;
  1019. }
  1020. arch_spin_unlock(&ics->lock);
  1021. local_irq_restore(flags);
  1022. if (!ret && put_user(val, ubufp))
  1023. ret = -EFAULT;
  1024. return ret;
  1025. }
  1026. static int xics_set_source(struct kvmppc_xics *xics, long irq, u64 addr)
  1027. {
  1028. struct kvmppc_ics *ics;
  1029. struct ics_irq_state *irqp;
  1030. u64 __user *ubufp = (u64 __user *) addr;
  1031. u16 idx;
  1032. u64 val;
  1033. u8 prio;
  1034. u32 server;
  1035. unsigned long flags;
  1036. if (irq < KVMPPC_XICS_FIRST_IRQ || irq >= KVMPPC_XICS_NR_IRQS)
  1037. return -ENOENT;
  1038. ics = kvmppc_xics_find_ics(xics, irq, &idx);
  1039. if (!ics) {
  1040. ics = kvmppc_xics_create_ics(xics->kvm, xics, irq);
  1041. if (!ics)
  1042. return -ENOMEM;
  1043. }
  1044. irqp = &ics->irq_state[idx];
  1045. if (get_user(val, ubufp))
  1046. return -EFAULT;
  1047. server = val & KVM_XICS_DESTINATION_MASK;
  1048. prio = val >> KVM_XICS_PRIORITY_SHIFT;
  1049. if (prio != MASKED &&
  1050. kvmppc_xics_find_server(xics->kvm, server) == NULL)
  1051. return -EINVAL;
  1052. local_irq_save(flags);
  1053. arch_spin_lock(&ics->lock);
  1054. irqp->server = server;
  1055. irqp->saved_priority = prio;
  1056. if (val & KVM_XICS_MASKED)
  1057. prio = MASKED;
  1058. irqp->priority = prio;
  1059. irqp->resend = 0;
  1060. irqp->masked_pending = 0;
  1061. irqp->lsi = 0;
  1062. irqp->asserted = 0;
  1063. if (val & KVM_XICS_LEVEL_SENSITIVE) {
  1064. irqp->lsi = 1;
  1065. if (val & KVM_XICS_PENDING)
  1066. irqp->asserted = 1;
  1067. }
  1068. irqp->exists = 1;
  1069. arch_spin_unlock(&ics->lock);
  1070. local_irq_restore(flags);
  1071. if (val & KVM_XICS_PENDING)
  1072. icp_deliver_irq(xics, NULL, irqp->number);
  1073. return 0;
  1074. }
  1075. int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level,
  1076. bool line_status)
  1077. {
  1078. struct kvmppc_xics *xics = kvm->arch.xics;
  1079. if (!xics)
  1080. return -ENODEV;
  1081. return ics_deliver_irq(xics, irq, level);
  1082. }
  1083. int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *irq_entry,
  1084. struct kvm *kvm, int irq_source_id,
  1085. int level, bool line_status)
  1086. {
  1087. return kvm_set_irq(kvm, irq_source_id, irq_entry->gsi,
  1088. level, line_status);
  1089. }
  1090. static int xics_set_attr(struct kvm_device *dev, struct kvm_device_attr *attr)
  1091. {
  1092. struct kvmppc_xics *xics = dev->private;
  1093. switch (attr->group) {
  1094. case KVM_DEV_XICS_GRP_SOURCES:
  1095. return xics_set_source(xics, attr->attr, attr->addr);
  1096. }
  1097. return -ENXIO;
  1098. }
  1099. static int xics_get_attr(struct kvm_device *dev, struct kvm_device_attr *attr)
  1100. {
  1101. struct kvmppc_xics *xics = dev->private;
  1102. switch (attr->group) {
  1103. case KVM_DEV_XICS_GRP_SOURCES:
  1104. return xics_get_source(xics, attr->attr, attr->addr);
  1105. }
  1106. return -ENXIO;
  1107. }
  1108. static int xics_has_attr(struct kvm_device *dev, struct kvm_device_attr *attr)
  1109. {
  1110. switch (attr->group) {
  1111. case KVM_DEV_XICS_GRP_SOURCES:
  1112. if (attr->attr >= KVMPPC_XICS_FIRST_IRQ &&
  1113. attr->attr < KVMPPC_XICS_NR_IRQS)
  1114. return 0;
  1115. break;
  1116. }
  1117. return -ENXIO;
  1118. }
  1119. static void kvmppc_xics_free(struct kvm_device *dev)
  1120. {
  1121. struct kvmppc_xics *xics = dev->private;
  1122. int i;
  1123. struct kvm *kvm = xics->kvm;
  1124. debugfs_remove(xics->dentry);
  1125. if (kvm)
  1126. kvm->arch.xics = NULL;
  1127. for (i = 0; i <= xics->max_icsid; i++)
  1128. kfree(xics->ics[i]);
  1129. kfree(xics);
  1130. kfree(dev);
  1131. }
  1132. static int kvmppc_xics_create(struct kvm_device *dev, u32 type)
  1133. {
  1134. struct kvmppc_xics *xics;
  1135. struct kvm *kvm = dev->kvm;
  1136. int ret = 0;
  1137. xics = kzalloc(sizeof(*xics), GFP_KERNEL);
  1138. if (!xics)
  1139. return -ENOMEM;
  1140. dev->private = xics;
  1141. xics->dev = dev;
  1142. xics->kvm = kvm;
  1143. /* Already there ? */
  1144. if (kvm->arch.xics)
  1145. ret = -EEXIST;
  1146. else
  1147. kvm->arch.xics = xics;
  1148. if (ret) {
  1149. kfree(xics);
  1150. return ret;
  1151. }
  1152. #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
  1153. if (cpu_has_feature(CPU_FTR_ARCH_206)) {
  1154. /* Enable real mode support */
  1155. xics->real_mode = ENABLE_REALMODE;
  1156. xics->real_mode_dbg = DEBUG_REALMODE;
  1157. }
  1158. #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
  1159. return 0;
  1160. }
  1161. static void kvmppc_xics_init(struct kvm_device *dev)
  1162. {
  1163. struct kvmppc_xics *xics = (struct kvmppc_xics *)dev->private;
  1164. xics_debugfs_init(xics);
  1165. }
  1166. struct kvm_device_ops kvm_xics_ops = {
  1167. .name = "kvm-xics",
  1168. .create = kvmppc_xics_create,
  1169. .init = kvmppc_xics_init,
  1170. .destroy = kvmppc_xics_free,
  1171. .set_attr = xics_set_attr,
  1172. .get_attr = xics_get_attr,
  1173. .has_attr = xics_has_attr,
  1174. };
  1175. int kvmppc_xics_connect_vcpu(struct kvm_device *dev, struct kvm_vcpu *vcpu,
  1176. u32 xcpu)
  1177. {
  1178. struct kvmppc_xics *xics = dev->private;
  1179. int r = -EBUSY;
  1180. if (dev->ops != &kvm_xics_ops)
  1181. return -EPERM;
  1182. if (xics->kvm != vcpu->kvm)
  1183. return -EPERM;
  1184. if (vcpu->arch.irq_type)
  1185. return -EBUSY;
  1186. r = kvmppc_xics_create_icp(vcpu, xcpu);
  1187. if (!r)
  1188. vcpu->arch.irq_type = KVMPPC_IRQ_XICS;
  1189. return r;
  1190. }
  1191. void kvmppc_xics_free_icp(struct kvm_vcpu *vcpu)
  1192. {
  1193. if (!vcpu->arch.icp)
  1194. return;
  1195. kfree(vcpu->arch.icp);
  1196. vcpu->arch.icp = NULL;
  1197. vcpu->arch.irq_type = KVMPPC_IRQ_DEFAULT;
  1198. }
  1199. static int xics_set_irq(struct kvm_kernel_irq_routing_entry *e,
  1200. struct kvm *kvm, int irq_source_id, int level,
  1201. bool line_status)
  1202. {
  1203. return kvm_set_irq(kvm, irq_source_id, e->gsi, level, line_status);
  1204. }
  1205. int kvm_irq_map_gsi(struct kvm *kvm,
  1206. struct kvm_kernel_irq_routing_entry *entries, int gsi)
  1207. {
  1208. entries->gsi = gsi;
  1209. entries->type = KVM_IRQ_ROUTING_IRQCHIP;
  1210. entries->set = xics_set_irq;
  1211. entries->irqchip.irqchip = 0;
  1212. entries->irqchip.pin = gsi;
  1213. return 1;
  1214. }
  1215. int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin)
  1216. {
  1217. return pin;
  1218. }
  1219. void kvmppc_xics_set_mapped(struct kvm *kvm, unsigned long irq,
  1220. unsigned long host_irq)
  1221. {
  1222. struct kvmppc_xics *xics = kvm->arch.xics;
  1223. struct kvmppc_ics *ics;
  1224. u16 idx;
  1225. ics = kvmppc_xics_find_ics(xics, irq, &idx);
  1226. if (!ics)
  1227. return;
  1228. ics->irq_state[idx].host_irq = host_irq;
  1229. ics->irq_state[idx].intr_cpu = -1;
  1230. }
  1231. EXPORT_SYMBOL_GPL(kvmppc_xics_set_mapped);
  1232. void kvmppc_xics_clr_mapped(struct kvm *kvm, unsigned long irq,
  1233. unsigned long host_irq)
  1234. {
  1235. struct kvmppc_xics *xics = kvm->arch.xics;
  1236. struct kvmppc_ics *ics;
  1237. u16 idx;
  1238. ics = kvmppc_xics_find_ics(xics, irq, &idx);
  1239. if (!ics)
  1240. return;
  1241. ics->irq_state[idx].host_irq = 0;
  1242. }
  1243. EXPORT_SYMBOL_GPL(kvmppc_xics_clr_mapped);