book3s_interrupts.S 6.3 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License, version 2, as
  4. * published by the Free Software Foundation.
  5. *
  6. * This program is distributed in the hope that it will be useful,
  7. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  8. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  9. * GNU General Public License for more details.
  10. *
  11. * You should have received a copy of the GNU General Public License
  12. * along with this program; if not, write to the Free Software
  13. * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  14. *
  15. * Copyright SUSE Linux Products GmbH 2009
  16. *
  17. * Authors: Alexander Graf <agraf@suse.de>
  18. */
  19. #include <asm/ppc_asm.h>
  20. #include <asm/kvm_asm.h>
  21. #include <asm/reg.h>
  22. #include <asm/page.h>
  23. #include <asm/asm-offsets.h>
  24. #include <asm/exception-64s.h>
  25. #if defined(CONFIG_PPC_BOOK3S_64)
  26. #ifdef PPC64_ELF_ABI_v2
  27. #define FUNC(name) name
  28. #else
  29. #define FUNC(name) GLUE(.,name)
  30. #endif
  31. #define GET_SHADOW_VCPU(reg) addi reg, r13, PACA_SVCPU
  32. #elif defined(CONFIG_PPC_BOOK3S_32)
  33. #define FUNC(name) name
  34. #define GET_SHADOW_VCPU(reg) lwz reg, (THREAD + THREAD_KVM_SVCPU)(r2)
  35. #endif /* CONFIG_PPC_BOOK3S_XX */
  36. #define VCPU_LOAD_NVGPRS(vcpu) \
  37. PPC_LL r14, VCPU_GPR(R14)(vcpu); \
  38. PPC_LL r15, VCPU_GPR(R15)(vcpu); \
  39. PPC_LL r16, VCPU_GPR(R16)(vcpu); \
  40. PPC_LL r17, VCPU_GPR(R17)(vcpu); \
  41. PPC_LL r18, VCPU_GPR(R18)(vcpu); \
  42. PPC_LL r19, VCPU_GPR(R19)(vcpu); \
  43. PPC_LL r20, VCPU_GPR(R20)(vcpu); \
  44. PPC_LL r21, VCPU_GPR(R21)(vcpu); \
  45. PPC_LL r22, VCPU_GPR(R22)(vcpu); \
  46. PPC_LL r23, VCPU_GPR(R23)(vcpu); \
  47. PPC_LL r24, VCPU_GPR(R24)(vcpu); \
  48. PPC_LL r25, VCPU_GPR(R25)(vcpu); \
  49. PPC_LL r26, VCPU_GPR(R26)(vcpu); \
  50. PPC_LL r27, VCPU_GPR(R27)(vcpu); \
  51. PPC_LL r28, VCPU_GPR(R28)(vcpu); \
  52. PPC_LL r29, VCPU_GPR(R29)(vcpu); \
  53. PPC_LL r30, VCPU_GPR(R30)(vcpu); \
  54. PPC_LL r31, VCPU_GPR(R31)(vcpu); \
  55. /*****************************************************************************
  56. * *
  57. * Guest entry / exit code that is in kernel module memory (highmem) *
  58. * *
  59. ****************************************************************************/
  60. /* Registers:
  61. * r3: kvm_run pointer
  62. * r4: vcpu pointer
  63. */
  64. _GLOBAL(__kvmppc_vcpu_run)
  65. kvm_start_entry:
  66. /* Write correct stack frame */
  67. mflr r0
  68. PPC_STL r0,PPC_LR_STKOFF(r1)
  69. /* Save host state to the stack */
  70. PPC_STLU r1, -SWITCH_FRAME_SIZE(r1)
  71. /* Save r3 (kvm_run) and r4 (vcpu) */
  72. SAVE_2GPRS(3, r1)
  73. /* Save non-volatile registers (r14 - r31) */
  74. SAVE_NVGPRS(r1)
  75. /* Save CR */
  76. mfcr r14
  77. stw r14, _CCR(r1)
  78. /* Save LR */
  79. PPC_STL r0, _LINK(r1)
  80. /* Load non-volatile guest state from the vcpu */
  81. VCPU_LOAD_NVGPRS(r4)
  82. kvm_start_lightweight:
  83. /* Copy registers into shadow vcpu so we can access them in real mode */
  84. GET_SHADOW_VCPU(r3)
  85. bl FUNC(kvmppc_copy_to_svcpu)
  86. nop
  87. REST_GPR(4, r1)
  88. #ifdef CONFIG_PPC_BOOK3S_64
  89. /* Get the dcbz32 flag */
  90. PPC_LL r3, VCPU_HFLAGS(r4)
  91. rldicl r3, r3, 0, 63 /* r3 &= 1 */
  92. stb r3, HSTATE_RESTORE_HID5(r13)
  93. /* Load up guest SPRG3 value, since it's user readable */
  94. lwz r3, VCPU_SHAREDBE(r4)
  95. cmpwi r3, 0
  96. ld r5, VCPU_SHARED(r4)
  97. beq sprg3_little_endian
  98. sprg3_big_endian:
  99. #ifdef __BIG_ENDIAN__
  100. ld r3, VCPU_SHARED_SPRG3(r5)
  101. #else
  102. addi r5, r5, VCPU_SHARED_SPRG3
  103. ldbrx r3, 0, r5
  104. #endif
  105. b after_sprg3_load
  106. sprg3_little_endian:
  107. #ifdef __LITTLE_ENDIAN__
  108. ld r3, VCPU_SHARED_SPRG3(r5)
  109. #else
  110. addi r5, r5, VCPU_SHARED_SPRG3
  111. ldbrx r3, 0, r5
  112. #endif
  113. after_sprg3_load:
  114. mtspr SPRN_SPRG3, r3
  115. #endif /* CONFIG_PPC_BOOK3S_64 */
  116. PPC_LL r4, VCPU_SHADOW_MSR(r4) /* get shadow_msr */
  117. /* Jump to segment patching handler and into our guest */
  118. bl FUNC(kvmppc_entry_trampoline)
  119. nop
  120. /*
  121. * This is the handler in module memory. It gets jumped at from the
  122. * lowmem trampoline code, so it's basically the guest exit code.
  123. *
  124. */
  125. /*
  126. * Register usage at this point:
  127. *
  128. * R1 = host R1
  129. * R2 = host R2
  130. * R12 = exit handler id
  131. * R13 = PACA
  132. * SVCPU.* = guest *
  133. * MSR.EE = 1
  134. *
  135. */
  136. PPC_LL r3, GPR4(r1) /* vcpu pointer */
  137. /*
  138. * kvmppc_copy_from_svcpu can clobber volatile registers, save
  139. * the exit handler id to the vcpu and restore it from there later.
  140. */
  141. stw r12, VCPU_TRAP(r3)
  142. /* Transfer reg values from shadow vcpu back to vcpu struct */
  143. /* On 64-bit, interrupts are still off at this point */
  144. GET_SHADOW_VCPU(r4)
  145. bl FUNC(kvmppc_copy_from_svcpu)
  146. nop
  147. #ifdef CONFIG_PPC_BOOK3S_64
  148. /*
  149. * Reload kernel SPRG3 value.
  150. * No need to save guest value as usermode can't modify SPRG3.
  151. */
  152. ld r3, PACA_SPRG_VDSO(r13)
  153. mtspr SPRN_SPRG_VDSO_WRITE, r3
  154. #endif /* CONFIG_PPC_BOOK3S_64 */
  155. /* R7 = vcpu */
  156. PPC_LL r7, GPR4(r1)
  157. PPC_STL r14, VCPU_GPR(R14)(r7)
  158. PPC_STL r15, VCPU_GPR(R15)(r7)
  159. PPC_STL r16, VCPU_GPR(R16)(r7)
  160. PPC_STL r17, VCPU_GPR(R17)(r7)
  161. PPC_STL r18, VCPU_GPR(R18)(r7)
  162. PPC_STL r19, VCPU_GPR(R19)(r7)
  163. PPC_STL r20, VCPU_GPR(R20)(r7)
  164. PPC_STL r21, VCPU_GPR(R21)(r7)
  165. PPC_STL r22, VCPU_GPR(R22)(r7)
  166. PPC_STL r23, VCPU_GPR(R23)(r7)
  167. PPC_STL r24, VCPU_GPR(R24)(r7)
  168. PPC_STL r25, VCPU_GPR(R25)(r7)
  169. PPC_STL r26, VCPU_GPR(R26)(r7)
  170. PPC_STL r27, VCPU_GPR(R27)(r7)
  171. PPC_STL r28, VCPU_GPR(R28)(r7)
  172. PPC_STL r29, VCPU_GPR(R29)(r7)
  173. PPC_STL r30, VCPU_GPR(R30)(r7)
  174. PPC_STL r31, VCPU_GPR(R31)(r7)
  175. /* Pass the exit number as 3rd argument to kvmppc_handle_exit */
  176. lwz r5, VCPU_TRAP(r7)
  177. /* Restore r3 (kvm_run) and r4 (vcpu) */
  178. REST_2GPRS(3, r1)
  179. bl FUNC(kvmppc_handle_exit_pr)
  180. /* If RESUME_GUEST, get back in the loop */
  181. cmpwi r3, RESUME_GUEST
  182. beq kvm_loop_lightweight
  183. cmpwi r3, RESUME_GUEST_NV
  184. beq kvm_loop_heavyweight
  185. kvm_exit_loop:
  186. PPC_LL r4, _LINK(r1)
  187. mtlr r4
  188. lwz r14, _CCR(r1)
  189. mtcr r14
  190. /* Restore non-volatile host registers (r14 - r31) */
  191. REST_NVGPRS(r1)
  192. addi r1, r1, SWITCH_FRAME_SIZE
  193. blr
  194. kvm_loop_heavyweight:
  195. PPC_LL r4, _LINK(r1)
  196. PPC_STL r4, (PPC_LR_STKOFF + SWITCH_FRAME_SIZE)(r1)
  197. /* Load vcpu and cpu_run */
  198. REST_2GPRS(3, r1)
  199. /* Load non-volatile guest state from the vcpu */
  200. VCPU_LOAD_NVGPRS(r4)
  201. /* Jump back into the beginning of this function */
  202. b kvm_start_lightweight
  203. kvm_loop_lightweight:
  204. /* We'll need the vcpu pointer */
  205. REST_GPR(4, r1)
  206. /* Jump back into the beginning of this function */
  207. b kvm_start_lightweight