platsmp.c 2.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990
  1. /*
  2. * linux/arch/arm/mach-axxia/platsmp.c
  3. *
  4. * Copyright (C) 2012 LSI Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/init.h>
  11. #include <linux/io.h>
  12. #include <linux/smp.h>
  13. #include <linux/of.h>
  14. #include <linux/of_address.h>
  15. #include <asm/cacheflush.h>
  16. /* Syscon register offsets for releasing cores from reset */
  17. #define SC_CRIT_WRITE_KEY 0x1000
  18. #define SC_RST_CPU_HOLD 0x1010
  19. /*
  20. * Write the kernel entry point for secondary CPUs to the specified address
  21. */
  22. static void write_release_addr(u32 release_phys)
  23. {
  24. u32 *virt = (u32 *) phys_to_virt(release_phys);
  25. writel_relaxed(virt_to_phys(secondary_startup), virt);
  26. /* Make sure this store is visible to other CPUs */
  27. smp_wmb();
  28. __cpuc_flush_dcache_area(virt, sizeof(u32));
  29. }
  30. static int axxia_boot_secondary(unsigned int cpu, struct task_struct *idle)
  31. {
  32. struct device_node *syscon_np;
  33. void __iomem *syscon;
  34. u32 tmp;
  35. syscon_np = of_find_compatible_node(NULL, NULL, "lsi,axxia-syscon");
  36. if (!syscon_np)
  37. return -ENOENT;
  38. syscon = of_iomap(syscon_np, 0);
  39. if (!syscon)
  40. return -ENOMEM;
  41. tmp = readl(syscon + SC_RST_CPU_HOLD);
  42. writel(0xab, syscon + SC_CRIT_WRITE_KEY);
  43. tmp &= ~(1 << cpu);
  44. writel(tmp, syscon + SC_RST_CPU_HOLD);
  45. return 0;
  46. }
  47. static void __init axxia_smp_prepare_cpus(unsigned int max_cpus)
  48. {
  49. int cpu_count = 0;
  50. int cpu;
  51. /*
  52. * Initialise the present map, which describes the set of CPUs actually
  53. * populated at the present time.
  54. */
  55. for_each_possible_cpu(cpu) {
  56. struct device_node *np;
  57. u32 release_phys;
  58. np = of_get_cpu_node(cpu, NULL);
  59. if (!np)
  60. continue;
  61. if (of_property_read_u32(np, "cpu-release-addr", &release_phys))
  62. continue;
  63. if (cpu_count < max_cpus) {
  64. set_cpu_present(cpu, true);
  65. cpu_count++;
  66. }
  67. if (release_phys != 0)
  68. write_release_addr(release_phys);
  69. }
  70. }
  71. static const struct smp_operations axxia_smp_ops __initconst = {
  72. .smp_prepare_cpus = axxia_smp_prepare_cpus,
  73. .smp_boot_secondary = axxia_boot_secondary,
  74. };
  75. CPU_METHOD_OF_DECLARE(axxia_smp, "lsi,syscon-release", &axxia_smp_ops);