target_core_user.h 3.3 KB

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  1. #ifndef __TARGET_CORE_USER_H
  2. #define __TARGET_CORE_USER_H
  3. /* This header will be used by application too */
  4. #include <linux/types.h>
  5. #include <linux/uio.h>
  6. #define TCMU_VERSION "2.0"
  7. /*
  8. * Ring Design
  9. * -----------
  10. *
  11. * The mmaped area is divided into three parts:
  12. * 1) The mailbox (struct tcmu_mailbox, below)
  13. * 2) The command ring
  14. * 3) Everything beyond the command ring (data)
  15. *
  16. * The mailbox tells userspace the offset of the command ring from the
  17. * start of the shared memory region, and how big the command ring is.
  18. *
  19. * The kernel passes SCSI commands to userspace by putting a struct
  20. * tcmu_cmd_entry in the ring, updating mailbox->cmd_head, and poking
  21. * userspace via uio's interrupt mechanism.
  22. *
  23. * tcmu_cmd_entry contains a header. If the header type is PAD,
  24. * userspace should skip hdr->length bytes (mod cmdr_size) to find the
  25. * next cmd_entry.
  26. *
  27. * Otherwise, the entry will contain offsets into the mmaped area that
  28. * contain the cdb and data buffers -- the latter accessible via the
  29. * iov array. iov addresses are also offsets into the shared area.
  30. *
  31. * When userspace is completed handling the command, set
  32. * entry->rsp.scsi_status, fill in rsp.sense_buffer if appropriate,
  33. * and also set mailbox->cmd_tail equal to the old cmd_tail plus
  34. * hdr->length, mod cmdr_size. If cmd_tail doesn't equal cmd_head, it
  35. * should process the next packet the same way, and so on.
  36. */
  37. #define TCMU_MAILBOX_VERSION 2
  38. #define ALIGN_SIZE 64 /* Should be enough for most CPUs */
  39. #define TCMU_MAILBOX_FLAG_CAP_OOOC (1 << 0) /* Out-of-order completions */
  40. struct tcmu_mailbox {
  41. __u16 version;
  42. __u16 flags;
  43. __u32 cmdr_off;
  44. __u32 cmdr_size;
  45. __u32 cmd_head;
  46. /* Updated by user. On its own cacheline */
  47. __u32 cmd_tail __attribute__((__aligned__(ALIGN_SIZE)));
  48. } __packed;
  49. enum tcmu_opcode {
  50. TCMU_OP_PAD = 0,
  51. TCMU_OP_CMD,
  52. };
  53. /*
  54. * Only a few opcodes, and length is 8-byte aligned, so use low bits for opcode.
  55. */
  56. struct tcmu_cmd_entry_hdr {
  57. __u32 len_op;
  58. __u16 cmd_id;
  59. __u8 kflags;
  60. #define TCMU_UFLAG_UNKNOWN_OP 0x1
  61. __u8 uflags;
  62. } __packed;
  63. #define TCMU_OP_MASK 0x7
  64. static inline enum tcmu_opcode tcmu_hdr_get_op(__u32 len_op)
  65. {
  66. return len_op & TCMU_OP_MASK;
  67. }
  68. static inline void tcmu_hdr_set_op(__u32 *len_op, enum tcmu_opcode op)
  69. {
  70. *len_op &= ~TCMU_OP_MASK;
  71. *len_op |= (op & TCMU_OP_MASK);
  72. }
  73. static inline __u32 tcmu_hdr_get_len(__u32 len_op)
  74. {
  75. return len_op & ~TCMU_OP_MASK;
  76. }
  77. static inline void tcmu_hdr_set_len(__u32 *len_op, __u32 len)
  78. {
  79. *len_op &= TCMU_OP_MASK;
  80. *len_op |= len;
  81. }
  82. /* Currently the same as SCSI_SENSE_BUFFERSIZE */
  83. #define TCMU_SENSE_BUFFERSIZE 96
  84. struct tcmu_cmd_entry {
  85. struct tcmu_cmd_entry_hdr hdr;
  86. union {
  87. struct {
  88. uint32_t iov_cnt;
  89. uint32_t iov_bidi_cnt;
  90. uint32_t iov_dif_cnt;
  91. uint64_t cdb_off;
  92. uint64_t __pad1;
  93. uint64_t __pad2;
  94. struct iovec iov[0];
  95. } req;
  96. struct {
  97. uint8_t scsi_status;
  98. uint8_t __pad1;
  99. uint16_t __pad2;
  100. uint32_t __pad3;
  101. char sense_buffer[TCMU_SENSE_BUFFERSIZE];
  102. } rsp;
  103. };
  104. } __packed;
  105. #define TCMU_OP_ALIGN_SIZE sizeof(uint64_t)
  106. enum tcmu_genl_cmd {
  107. TCMU_CMD_UNSPEC,
  108. TCMU_CMD_ADDED_DEVICE,
  109. TCMU_CMD_REMOVED_DEVICE,
  110. __TCMU_CMD_MAX,
  111. };
  112. #define TCMU_CMD_MAX (__TCMU_CMD_MAX - 1)
  113. enum tcmu_genl_attr {
  114. TCMU_ATTR_UNSPEC,
  115. TCMU_ATTR_DEVICE,
  116. TCMU_ATTR_MINOR,
  117. __TCMU_ATTR_MAX,
  118. };
  119. #define TCMU_ATTR_MAX (__TCMU_ATTR_MAX - 1)
  120. #endif