vxge-main.c 129 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096409740984099410041014102410341044105410641074108410941104111411241134114411541164117411841194120412141224123412441254126412741284129413041314132413341344135413641374138413941404141414241434144414541464147414841494150415141524153415441554156415741584159416041614162416341644165416641674168416941704171417241734174417541764177417841794180418141824183418441854186418741884189419041914192419341944195419641974198419942004201420242034204420542064207420842094210421142124213421442154216421742184219422042214222422342244225422642274228422942304231423242334234423542364237423842394240424142424243424442454246424742484249425042514252425342544255425642574258425942604261426242634264426542664267426842694270427142724273427442754276427742784279428042814282428342844285428642874288428942904291429242934294429542964297429842994300430143024303430443054306430743084309431043114312431343144315431643174318431943204321432243234324432543264327432843294330433143324333433443354336433743384339434043414342434343444345434643474348434943504351435243534354435543564357435843594360436143624363436443654366436743684369437043714372437343744375437643774378437943804381438243834384438543864387438843894390439143924393439443954396439743984399440044014402440344044405440644074408440944104411441244134414441544164417441844194420442144224423442444254426442744284429443044314432443344344435443644374438443944404441444244434444444544464447444844494450445144524453445444554456445744584459446044614462446344644465446644674468446944704471447244734474447544764477447844794480448144824483448444854486448744884489449044914492449344944495449644974498449945004501450245034504450545064507450845094510451145124513451445154516451745184519452045214522452345244525452645274528452945304531453245334534453545364537453845394540454145424543454445454546454745484549455045514552455345544555455645574558455945604561456245634564456545664567456845694570457145724573457445754576457745784579458045814582458345844585458645874588458945904591459245934594459545964597459845994600460146024603460446054606460746084609461046114612461346144615461646174618461946204621462246234624462546264627462846294630463146324633463446354636463746384639464046414642464346444645464646474648464946504651465246534654465546564657465846594660466146624663466446654666466746684669467046714672467346744675467646774678467946804681468246834684468546864687468846894690469146924693469446954696469746984699470047014702470347044705470647074708470947104711471247134714471547164717471847194720472147224723472447254726472747284729473047314732473347344735473647374738473947404741474247434744474547464747474847494750475147524753475447554756475747584759476047614762476347644765476647674768476947704771477247734774477547764777477847794780478147824783478447854786478747884789479047914792479347944795479647974798479948004801480248034804480548064807480848094810481148124813481448154816481748184819482048214822482348244825482648274828482948304831483248334834483548364837483848394840484148424843484448454846484748484849485048514852485348544855485648574858485948604861486248634864
  1. /******************************************************************************
  2. * This software may be used and distributed according to the terms of
  3. * the GNU General Public License (GPL), incorporated herein by reference.
  4. * Drivers based on or derived from this code fall under the GPL and must
  5. * retain the authorship, copyright and license notice. This file is not
  6. * a complete program and may only be used when the entire operating
  7. * system is licensed under the GPL.
  8. * See the file COPYING in this distribution for more information.
  9. *
  10. * vxge-main.c: Driver for Exar Corp's X3100 Series 10GbE PCIe I/O
  11. * Virtualized Server Adapter.
  12. * Copyright(c) 2002-2010 Exar Corp.
  13. *
  14. * The module loadable parameters that are supported by the driver and a brief
  15. * explanation of all the variables:
  16. * vlan_tag_strip:
  17. * Strip VLAN Tag enable/disable. Instructs the device to remove
  18. * the VLAN tag from all received tagged frames that are not
  19. * replicated at the internal L2 switch.
  20. * 0 - Do not strip the VLAN tag.
  21. * 1 - Strip the VLAN tag.
  22. *
  23. * addr_learn_en:
  24. * Enable learning the mac address of the guest OS interface in
  25. * a virtualization environment.
  26. * 0 - DISABLE
  27. * 1 - ENABLE
  28. *
  29. * max_config_port:
  30. * Maximum number of port to be supported.
  31. * MIN -1 and MAX - 2
  32. *
  33. * max_config_vpath:
  34. * This configures the maximum no of VPATH configures for each
  35. * device function.
  36. * MIN - 1 and MAX - 17
  37. *
  38. * max_config_dev:
  39. * This configures maximum no of Device function to be enabled.
  40. * MIN - 1 and MAX - 17
  41. *
  42. ******************************************************************************/
  43. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  44. #include <linux/bitops.h>
  45. #include <linux/if_vlan.h>
  46. #include <linux/interrupt.h>
  47. #include <linux/pci.h>
  48. #include <linux/slab.h>
  49. #include <linux/tcp.h>
  50. #include <net/ip.h>
  51. #include <linux/netdevice.h>
  52. #include <linux/etherdevice.h>
  53. #include <linux/firmware.h>
  54. #include <linux/net_tstamp.h>
  55. #include <linux/prefetch.h>
  56. #include <linux/module.h>
  57. #include "vxge-main.h"
  58. #include "vxge-reg.h"
  59. MODULE_LICENSE("Dual BSD/GPL");
  60. MODULE_DESCRIPTION("Neterion's X3100 Series 10GbE PCIe I/O"
  61. "Virtualized Server Adapter");
  62. static const struct pci_device_id vxge_id_table[] = {
  63. {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_WIN, PCI_ANY_ID,
  64. PCI_ANY_ID},
  65. {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_UNI, PCI_ANY_ID,
  66. PCI_ANY_ID},
  67. {0}
  68. };
  69. MODULE_DEVICE_TABLE(pci, vxge_id_table);
  70. VXGE_MODULE_PARAM_INT(vlan_tag_strip, VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE);
  71. VXGE_MODULE_PARAM_INT(addr_learn_en, VXGE_HW_MAC_ADDR_LEARN_DEFAULT);
  72. VXGE_MODULE_PARAM_INT(max_config_port, VXGE_MAX_CONFIG_PORT);
  73. VXGE_MODULE_PARAM_INT(max_config_vpath, VXGE_USE_DEFAULT);
  74. VXGE_MODULE_PARAM_INT(max_mac_vpath, VXGE_MAX_MAC_ADDR_COUNT);
  75. VXGE_MODULE_PARAM_INT(max_config_dev, VXGE_MAX_CONFIG_DEV);
  76. static u16 vpath_selector[VXGE_HW_MAX_VIRTUAL_PATHS] =
  77. {0, 1, 3, 3, 7, 7, 7, 7, 15, 15, 15, 15, 15, 15, 15, 15, 31};
  78. static unsigned int bw_percentage[VXGE_HW_MAX_VIRTUAL_PATHS] =
  79. {[0 ...(VXGE_HW_MAX_VIRTUAL_PATHS - 1)] = 0xFF};
  80. module_param_array(bw_percentage, uint, NULL, 0);
  81. static struct vxge_drv_config *driver_config;
  82. static enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev);
  83. static inline int is_vxge_card_up(struct vxgedev *vdev)
  84. {
  85. return test_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  86. }
  87. static inline void VXGE_COMPLETE_VPATH_TX(struct vxge_fifo *fifo)
  88. {
  89. struct sk_buff **skb_ptr = NULL;
  90. struct sk_buff **temp;
  91. #define NR_SKB_COMPLETED 128
  92. struct sk_buff *completed[NR_SKB_COMPLETED];
  93. int more;
  94. do {
  95. more = 0;
  96. skb_ptr = completed;
  97. if (__netif_tx_trylock(fifo->txq)) {
  98. vxge_hw_vpath_poll_tx(fifo->handle, &skb_ptr,
  99. NR_SKB_COMPLETED, &more);
  100. __netif_tx_unlock(fifo->txq);
  101. }
  102. /* free SKBs */
  103. for (temp = completed; temp != skb_ptr; temp++)
  104. dev_kfree_skb_irq(*temp);
  105. } while (more);
  106. }
  107. static inline void VXGE_COMPLETE_ALL_TX(struct vxgedev *vdev)
  108. {
  109. int i;
  110. /* Complete all transmits */
  111. for (i = 0; i < vdev->no_of_vpath; i++)
  112. VXGE_COMPLETE_VPATH_TX(&vdev->vpaths[i].fifo);
  113. }
  114. static inline void VXGE_COMPLETE_ALL_RX(struct vxgedev *vdev)
  115. {
  116. int i;
  117. struct vxge_ring *ring;
  118. /* Complete all receives*/
  119. for (i = 0; i < vdev->no_of_vpath; i++) {
  120. ring = &vdev->vpaths[i].ring;
  121. vxge_hw_vpath_poll_rx(ring->handle);
  122. }
  123. }
  124. /*
  125. * vxge_callback_link_up
  126. *
  127. * This function is called during interrupt context to notify link up state
  128. * change.
  129. */
  130. static void vxge_callback_link_up(struct __vxge_hw_device *hldev)
  131. {
  132. struct net_device *dev = hldev->ndev;
  133. struct vxgedev *vdev = netdev_priv(dev);
  134. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  135. vdev->ndev->name, __func__, __LINE__);
  136. netdev_notice(vdev->ndev, "Link Up\n");
  137. vdev->stats.link_up++;
  138. netif_carrier_on(vdev->ndev);
  139. netif_tx_wake_all_queues(vdev->ndev);
  140. vxge_debug_entryexit(VXGE_TRACE,
  141. "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
  142. }
  143. /*
  144. * vxge_callback_link_down
  145. *
  146. * This function is called during interrupt context to notify link down state
  147. * change.
  148. */
  149. static void vxge_callback_link_down(struct __vxge_hw_device *hldev)
  150. {
  151. struct net_device *dev = hldev->ndev;
  152. struct vxgedev *vdev = netdev_priv(dev);
  153. vxge_debug_entryexit(VXGE_TRACE,
  154. "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
  155. netdev_notice(vdev->ndev, "Link Down\n");
  156. vdev->stats.link_down++;
  157. netif_carrier_off(vdev->ndev);
  158. netif_tx_stop_all_queues(vdev->ndev);
  159. vxge_debug_entryexit(VXGE_TRACE,
  160. "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
  161. }
  162. /*
  163. * vxge_rx_alloc
  164. *
  165. * Allocate SKB.
  166. */
  167. static struct sk_buff *
  168. vxge_rx_alloc(void *dtrh, struct vxge_ring *ring, const int skb_size)
  169. {
  170. struct net_device *dev;
  171. struct sk_buff *skb;
  172. struct vxge_rx_priv *rx_priv;
  173. dev = ring->ndev;
  174. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  175. ring->ndev->name, __func__, __LINE__);
  176. rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
  177. /* try to allocate skb first. this one may fail */
  178. skb = netdev_alloc_skb(dev, skb_size +
  179. VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
  180. if (skb == NULL) {
  181. vxge_debug_mem(VXGE_ERR,
  182. "%s: out of memory to allocate SKB", dev->name);
  183. ring->stats.skb_alloc_fail++;
  184. return NULL;
  185. }
  186. vxge_debug_mem(VXGE_TRACE,
  187. "%s: %s:%d Skb : 0x%p", ring->ndev->name,
  188. __func__, __LINE__, skb);
  189. skb_reserve(skb, VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
  190. rx_priv->skb = skb;
  191. rx_priv->skb_data = NULL;
  192. rx_priv->data_size = skb_size;
  193. vxge_debug_entryexit(VXGE_TRACE,
  194. "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
  195. return skb;
  196. }
  197. /*
  198. * vxge_rx_map
  199. */
  200. static int vxge_rx_map(void *dtrh, struct vxge_ring *ring)
  201. {
  202. struct vxge_rx_priv *rx_priv;
  203. dma_addr_t dma_addr;
  204. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  205. ring->ndev->name, __func__, __LINE__);
  206. rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
  207. rx_priv->skb_data = rx_priv->skb->data;
  208. dma_addr = pci_map_single(ring->pdev, rx_priv->skb_data,
  209. rx_priv->data_size, PCI_DMA_FROMDEVICE);
  210. if (unlikely(pci_dma_mapping_error(ring->pdev, dma_addr))) {
  211. ring->stats.pci_map_fail++;
  212. return -EIO;
  213. }
  214. vxge_debug_mem(VXGE_TRACE,
  215. "%s: %s:%d 1 buffer mode dma_addr = 0x%llx",
  216. ring->ndev->name, __func__, __LINE__,
  217. (unsigned long long)dma_addr);
  218. vxge_hw_ring_rxd_1b_set(dtrh, dma_addr, rx_priv->data_size);
  219. rx_priv->data_dma = dma_addr;
  220. vxge_debug_entryexit(VXGE_TRACE,
  221. "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
  222. return 0;
  223. }
  224. /*
  225. * vxge_rx_initial_replenish
  226. * Allocation of RxD as an initial replenish procedure.
  227. */
  228. static enum vxge_hw_status
  229. vxge_rx_initial_replenish(void *dtrh, void *userdata)
  230. {
  231. struct vxge_ring *ring = (struct vxge_ring *)userdata;
  232. struct vxge_rx_priv *rx_priv;
  233. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  234. ring->ndev->name, __func__, __LINE__);
  235. if (vxge_rx_alloc(dtrh, ring,
  236. VXGE_LL_MAX_FRAME_SIZE(ring->ndev)) == NULL)
  237. return VXGE_HW_FAIL;
  238. if (vxge_rx_map(dtrh, ring)) {
  239. rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
  240. dev_kfree_skb(rx_priv->skb);
  241. return VXGE_HW_FAIL;
  242. }
  243. vxge_debug_entryexit(VXGE_TRACE,
  244. "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
  245. return VXGE_HW_OK;
  246. }
  247. static inline void
  248. vxge_rx_complete(struct vxge_ring *ring, struct sk_buff *skb, u16 vlan,
  249. int pkt_length, struct vxge_hw_ring_rxd_info *ext_info)
  250. {
  251. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  252. ring->ndev->name, __func__, __LINE__);
  253. skb_record_rx_queue(skb, ring->driver_id);
  254. skb->protocol = eth_type_trans(skb, ring->ndev);
  255. u64_stats_update_begin(&ring->stats.syncp);
  256. ring->stats.rx_frms++;
  257. ring->stats.rx_bytes += pkt_length;
  258. if (skb->pkt_type == PACKET_MULTICAST)
  259. ring->stats.rx_mcast++;
  260. u64_stats_update_end(&ring->stats.syncp);
  261. vxge_debug_rx(VXGE_TRACE,
  262. "%s: %s:%d skb protocol = %d",
  263. ring->ndev->name, __func__, __LINE__, skb->protocol);
  264. if (ext_info->vlan &&
  265. ring->vlan_tag_strip == VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE)
  266. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), ext_info->vlan);
  267. napi_gro_receive(ring->napi_p, skb);
  268. vxge_debug_entryexit(VXGE_TRACE,
  269. "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
  270. }
  271. static inline void vxge_re_pre_post(void *dtr, struct vxge_ring *ring,
  272. struct vxge_rx_priv *rx_priv)
  273. {
  274. pci_dma_sync_single_for_device(ring->pdev,
  275. rx_priv->data_dma, rx_priv->data_size, PCI_DMA_FROMDEVICE);
  276. vxge_hw_ring_rxd_1b_set(dtr, rx_priv->data_dma, rx_priv->data_size);
  277. vxge_hw_ring_rxd_pre_post(ring->handle, dtr);
  278. }
  279. static inline void vxge_post(int *dtr_cnt, void **first_dtr,
  280. void *post_dtr, struct __vxge_hw_ring *ringh)
  281. {
  282. int dtr_count = *dtr_cnt;
  283. if ((*dtr_cnt % VXGE_HW_RXSYNC_FREQ_CNT) == 0) {
  284. if (*first_dtr)
  285. vxge_hw_ring_rxd_post_post_wmb(ringh, *first_dtr);
  286. *first_dtr = post_dtr;
  287. } else
  288. vxge_hw_ring_rxd_post_post(ringh, post_dtr);
  289. dtr_count++;
  290. *dtr_cnt = dtr_count;
  291. }
  292. /*
  293. * vxge_rx_1b_compl
  294. *
  295. * If the interrupt is because of a received frame or if the receive ring
  296. * contains fresh as yet un-processed frames, this function is called.
  297. */
  298. static enum vxge_hw_status
  299. vxge_rx_1b_compl(struct __vxge_hw_ring *ringh, void *dtr,
  300. u8 t_code, void *userdata)
  301. {
  302. struct vxge_ring *ring = (struct vxge_ring *)userdata;
  303. struct net_device *dev = ring->ndev;
  304. unsigned int dma_sizes;
  305. void *first_dtr = NULL;
  306. int dtr_cnt = 0;
  307. int data_size;
  308. dma_addr_t data_dma;
  309. int pkt_length;
  310. struct sk_buff *skb;
  311. struct vxge_rx_priv *rx_priv;
  312. struct vxge_hw_ring_rxd_info ext_info;
  313. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  314. ring->ndev->name, __func__, __LINE__);
  315. if (ring->budget <= 0)
  316. goto out;
  317. do {
  318. prefetch((char *)dtr + L1_CACHE_BYTES);
  319. rx_priv = vxge_hw_ring_rxd_private_get(dtr);
  320. skb = rx_priv->skb;
  321. data_size = rx_priv->data_size;
  322. data_dma = rx_priv->data_dma;
  323. prefetch(rx_priv->skb_data);
  324. vxge_debug_rx(VXGE_TRACE,
  325. "%s: %s:%d skb = 0x%p",
  326. ring->ndev->name, __func__, __LINE__, skb);
  327. vxge_hw_ring_rxd_1b_get(ringh, dtr, &dma_sizes);
  328. pkt_length = dma_sizes;
  329. pkt_length -= ETH_FCS_LEN;
  330. vxge_debug_rx(VXGE_TRACE,
  331. "%s: %s:%d Packet Length = %d",
  332. ring->ndev->name, __func__, __LINE__, pkt_length);
  333. vxge_hw_ring_rxd_1b_info_get(ringh, dtr, &ext_info);
  334. /* check skb validity */
  335. vxge_assert(skb);
  336. prefetch((char *)skb + L1_CACHE_BYTES);
  337. if (unlikely(t_code)) {
  338. if (vxge_hw_ring_handle_tcode(ringh, dtr, t_code) !=
  339. VXGE_HW_OK) {
  340. ring->stats.rx_errors++;
  341. vxge_debug_rx(VXGE_TRACE,
  342. "%s: %s :%d Rx T_code is %d",
  343. ring->ndev->name, __func__,
  344. __LINE__, t_code);
  345. /* If the t_code is not supported and if the
  346. * t_code is other than 0x5 (unparseable packet
  347. * such as unknown UPV6 header), Drop it !!!
  348. */
  349. vxge_re_pre_post(dtr, ring, rx_priv);
  350. vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
  351. ring->stats.rx_dropped++;
  352. continue;
  353. }
  354. }
  355. if (pkt_length > VXGE_LL_RX_COPY_THRESHOLD) {
  356. if (vxge_rx_alloc(dtr, ring, data_size) != NULL) {
  357. if (!vxge_rx_map(dtr, ring)) {
  358. skb_put(skb, pkt_length);
  359. pci_unmap_single(ring->pdev, data_dma,
  360. data_size, PCI_DMA_FROMDEVICE);
  361. vxge_hw_ring_rxd_pre_post(ringh, dtr);
  362. vxge_post(&dtr_cnt, &first_dtr, dtr,
  363. ringh);
  364. } else {
  365. dev_kfree_skb(rx_priv->skb);
  366. rx_priv->skb = skb;
  367. rx_priv->data_size = data_size;
  368. vxge_re_pre_post(dtr, ring, rx_priv);
  369. vxge_post(&dtr_cnt, &first_dtr, dtr,
  370. ringh);
  371. ring->stats.rx_dropped++;
  372. break;
  373. }
  374. } else {
  375. vxge_re_pre_post(dtr, ring, rx_priv);
  376. vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
  377. ring->stats.rx_dropped++;
  378. break;
  379. }
  380. } else {
  381. struct sk_buff *skb_up;
  382. skb_up = netdev_alloc_skb(dev, pkt_length +
  383. VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
  384. if (skb_up != NULL) {
  385. skb_reserve(skb_up,
  386. VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
  387. pci_dma_sync_single_for_cpu(ring->pdev,
  388. data_dma, data_size,
  389. PCI_DMA_FROMDEVICE);
  390. vxge_debug_mem(VXGE_TRACE,
  391. "%s: %s:%d skb_up = %p",
  392. ring->ndev->name, __func__,
  393. __LINE__, skb);
  394. memcpy(skb_up->data, skb->data, pkt_length);
  395. vxge_re_pre_post(dtr, ring, rx_priv);
  396. vxge_post(&dtr_cnt, &first_dtr, dtr,
  397. ringh);
  398. /* will netif_rx small SKB instead */
  399. skb = skb_up;
  400. skb_put(skb, pkt_length);
  401. } else {
  402. vxge_re_pre_post(dtr, ring, rx_priv);
  403. vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
  404. vxge_debug_rx(VXGE_ERR,
  405. "%s: vxge_rx_1b_compl: out of "
  406. "memory", dev->name);
  407. ring->stats.skb_alloc_fail++;
  408. break;
  409. }
  410. }
  411. if ((ext_info.proto & VXGE_HW_FRAME_PROTO_TCP_OR_UDP) &&
  412. !(ext_info.proto & VXGE_HW_FRAME_PROTO_IP_FRAG) &&
  413. (dev->features & NETIF_F_RXCSUM) && /* Offload Rx side CSUM */
  414. ext_info.l3_cksum == VXGE_HW_L3_CKSUM_OK &&
  415. ext_info.l4_cksum == VXGE_HW_L4_CKSUM_OK)
  416. skb->ip_summed = CHECKSUM_UNNECESSARY;
  417. else
  418. skb_checksum_none_assert(skb);
  419. if (ring->rx_hwts) {
  420. struct skb_shared_hwtstamps *skb_hwts;
  421. u32 ns = *(u32 *)(skb->head + pkt_length);
  422. skb_hwts = skb_hwtstamps(skb);
  423. skb_hwts->hwtstamp = ns_to_ktime(ns);
  424. }
  425. /* rth_hash_type and rth_it_hit are non-zero regardless of
  426. * whether rss is enabled. Only the rth_value is zero/non-zero
  427. * if rss is disabled/enabled, so key off of that.
  428. */
  429. if (ext_info.rth_value)
  430. skb_set_hash(skb, ext_info.rth_value,
  431. PKT_HASH_TYPE_L3);
  432. vxge_rx_complete(ring, skb, ext_info.vlan,
  433. pkt_length, &ext_info);
  434. ring->budget--;
  435. ring->pkts_processed++;
  436. if (!ring->budget)
  437. break;
  438. } while (vxge_hw_ring_rxd_next_completed(ringh, &dtr,
  439. &t_code) == VXGE_HW_OK);
  440. if (first_dtr)
  441. vxge_hw_ring_rxd_post_post_wmb(ringh, first_dtr);
  442. out:
  443. vxge_debug_entryexit(VXGE_TRACE,
  444. "%s:%d Exiting...",
  445. __func__, __LINE__);
  446. return VXGE_HW_OK;
  447. }
  448. /*
  449. * vxge_xmit_compl
  450. *
  451. * If an interrupt was raised to indicate DMA complete of the Tx packet,
  452. * this function is called. It identifies the last TxD whose buffer was
  453. * freed and frees all skbs whose data have already DMA'ed into the NICs
  454. * internal memory.
  455. */
  456. static enum vxge_hw_status
  457. vxge_xmit_compl(struct __vxge_hw_fifo *fifo_hw, void *dtr,
  458. enum vxge_hw_fifo_tcode t_code, void *userdata,
  459. struct sk_buff ***skb_ptr, int nr_skb, int *more)
  460. {
  461. struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
  462. struct sk_buff *skb, **done_skb = *skb_ptr;
  463. int pkt_cnt = 0;
  464. vxge_debug_entryexit(VXGE_TRACE,
  465. "%s:%d Entered....", __func__, __LINE__);
  466. do {
  467. int frg_cnt;
  468. skb_frag_t *frag;
  469. int i = 0, j;
  470. struct vxge_tx_priv *txd_priv =
  471. vxge_hw_fifo_txdl_private_get(dtr);
  472. skb = txd_priv->skb;
  473. frg_cnt = skb_shinfo(skb)->nr_frags;
  474. frag = &skb_shinfo(skb)->frags[0];
  475. vxge_debug_tx(VXGE_TRACE,
  476. "%s: %s:%d fifo_hw = %p dtr = %p "
  477. "tcode = 0x%x", fifo->ndev->name, __func__,
  478. __LINE__, fifo_hw, dtr, t_code);
  479. /* check skb validity */
  480. vxge_assert(skb);
  481. vxge_debug_tx(VXGE_TRACE,
  482. "%s: %s:%d skb = %p itxd_priv = %p frg_cnt = %d",
  483. fifo->ndev->name, __func__, __LINE__,
  484. skb, txd_priv, frg_cnt);
  485. if (unlikely(t_code)) {
  486. fifo->stats.tx_errors++;
  487. vxge_debug_tx(VXGE_ERR,
  488. "%s: tx: dtr %p completed due to "
  489. "error t_code %01x", fifo->ndev->name,
  490. dtr, t_code);
  491. vxge_hw_fifo_handle_tcode(fifo_hw, dtr, t_code);
  492. }
  493. /* for unfragmented skb */
  494. pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
  495. skb_headlen(skb), PCI_DMA_TODEVICE);
  496. for (j = 0; j < frg_cnt; j++) {
  497. pci_unmap_page(fifo->pdev,
  498. txd_priv->dma_buffers[i++],
  499. skb_frag_size(frag), PCI_DMA_TODEVICE);
  500. frag += 1;
  501. }
  502. vxge_hw_fifo_txdl_free(fifo_hw, dtr);
  503. /* Updating the statistics block */
  504. u64_stats_update_begin(&fifo->stats.syncp);
  505. fifo->stats.tx_frms++;
  506. fifo->stats.tx_bytes += skb->len;
  507. u64_stats_update_end(&fifo->stats.syncp);
  508. *done_skb++ = skb;
  509. if (--nr_skb <= 0) {
  510. *more = 1;
  511. break;
  512. }
  513. pkt_cnt++;
  514. if (pkt_cnt > fifo->indicate_max_pkts)
  515. break;
  516. } while (vxge_hw_fifo_txdl_next_completed(fifo_hw,
  517. &dtr, &t_code) == VXGE_HW_OK);
  518. *skb_ptr = done_skb;
  519. if (netif_tx_queue_stopped(fifo->txq))
  520. netif_tx_wake_queue(fifo->txq);
  521. vxge_debug_entryexit(VXGE_TRACE,
  522. "%s: %s:%d Exiting...",
  523. fifo->ndev->name, __func__, __LINE__);
  524. return VXGE_HW_OK;
  525. }
  526. /* select a vpath to transmit the packet */
  527. static u32 vxge_get_vpath_no(struct vxgedev *vdev, struct sk_buff *skb)
  528. {
  529. u16 queue_len, counter = 0;
  530. if (skb->protocol == htons(ETH_P_IP)) {
  531. struct iphdr *ip;
  532. struct tcphdr *th;
  533. ip = ip_hdr(skb);
  534. if (!ip_is_fragment(ip)) {
  535. th = (struct tcphdr *)(((unsigned char *)ip) +
  536. ip->ihl*4);
  537. queue_len = vdev->no_of_vpath;
  538. counter = (ntohs(th->source) +
  539. ntohs(th->dest)) &
  540. vdev->vpath_selector[queue_len - 1];
  541. if (counter >= queue_len)
  542. counter = queue_len - 1;
  543. }
  544. }
  545. return counter;
  546. }
  547. static enum vxge_hw_status vxge_search_mac_addr_in_list(
  548. struct vxge_vpath *vpath, u64 del_mac)
  549. {
  550. struct list_head *entry, *next;
  551. list_for_each_safe(entry, next, &vpath->mac_addr_list) {
  552. if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac)
  553. return TRUE;
  554. }
  555. return FALSE;
  556. }
  557. static int vxge_mac_list_add(struct vxge_vpath *vpath, struct macInfo *mac)
  558. {
  559. struct vxge_mac_addrs *new_mac_entry;
  560. u8 *mac_address = NULL;
  561. if (vpath->mac_addr_cnt >= VXGE_MAX_LEARN_MAC_ADDR_CNT)
  562. return TRUE;
  563. new_mac_entry = kzalloc(sizeof(struct vxge_mac_addrs), GFP_ATOMIC);
  564. if (!new_mac_entry) {
  565. vxge_debug_mem(VXGE_ERR,
  566. "%s: memory allocation failed",
  567. VXGE_DRIVER_NAME);
  568. return FALSE;
  569. }
  570. list_add(&new_mac_entry->item, &vpath->mac_addr_list);
  571. /* Copy the new mac address to the list */
  572. mac_address = (u8 *)&new_mac_entry->macaddr;
  573. memcpy(mac_address, mac->macaddr, ETH_ALEN);
  574. new_mac_entry->state = mac->state;
  575. vpath->mac_addr_cnt++;
  576. if (is_multicast_ether_addr(mac->macaddr))
  577. vpath->mcast_addr_cnt++;
  578. return TRUE;
  579. }
  580. /* Add a mac address to DA table */
  581. static enum vxge_hw_status
  582. vxge_add_mac_addr(struct vxgedev *vdev, struct macInfo *mac)
  583. {
  584. enum vxge_hw_status status = VXGE_HW_OK;
  585. struct vxge_vpath *vpath;
  586. enum vxge_hw_vpath_mac_addr_add_mode duplicate_mode;
  587. if (is_multicast_ether_addr(mac->macaddr))
  588. duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE;
  589. else
  590. duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_REPLACE_DUPLICATE;
  591. vpath = &vdev->vpaths[mac->vpath_no];
  592. status = vxge_hw_vpath_mac_addr_add(vpath->handle, mac->macaddr,
  593. mac->macmask, duplicate_mode);
  594. if (status != VXGE_HW_OK) {
  595. vxge_debug_init(VXGE_ERR,
  596. "DA config add entry failed for vpath:%d",
  597. vpath->device_id);
  598. } else
  599. if (FALSE == vxge_mac_list_add(vpath, mac))
  600. status = -EPERM;
  601. return status;
  602. }
  603. static int vxge_learn_mac(struct vxgedev *vdev, u8 *mac_header)
  604. {
  605. struct macInfo mac_info;
  606. u8 *mac_address = NULL;
  607. u64 mac_addr = 0, vpath_vector = 0;
  608. int vpath_idx = 0;
  609. enum vxge_hw_status status = VXGE_HW_OK;
  610. struct vxge_vpath *vpath = NULL;
  611. mac_address = (u8 *)&mac_addr;
  612. memcpy(mac_address, mac_header, ETH_ALEN);
  613. /* Is this mac address already in the list? */
  614. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  615. vpath = &vdev->vpaths[vpath_idx];
  616. if (vxge_search_mac_addr_in_list(vpath, mac_addr))
  617. return vpath_idx;
  618. }
  619. memset(&mac_info, 0, sizeof(struct macInfo));
  620. memcpy(mac_info.macaddr, mac_header, ETH_ALEN);
  621. /* Any vpath has room to add mac address to its da table? */
  622. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  623. vpath = &vdev->vpaths[vpath_idx];
  624. if (vpath->mac_addr_cnt < vpath->max_mac_addr_cnt) {
  625. /* Add this mac address to this vpath */
  626. mac_info.vpath_no = vpath_idx;
  627. mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
  628. status = vxge_add_mac_addr(vdev, &mac_info);
  629. if (status != VXGE_HW_OK)
  630. return -EPERM;
  631. return vpath_idx;
  632. }
  633. }
  634. mac_info.state = VXGE_LL_MAC_ADDR_IN_LIST;
  635. vpath_idx = 0;
  636. mac_info.vpath_no = vpath_idx;
  637. /* Is the first vpath already selected as catch-basin ? */
  638. vpath = &vdev->vpaths[vpath_idx];
  639. if (vpath->mac_addr_cnt > vpath->max_mac_addr_cnt) {
  640. /* Add this mac address to this vpath */
  641. if (FALSE == vxge_mac_list_add(vpath, &mac_info))
  642. return -EPERM;
  643. return vpath_idx;
  644. }
  645. /* Select first vpath as catch-basin */
  646. vpath_vector = vxge_mBIT(vpath->device_id);
  647. status = vxge_hw_mgmt_reg_write(vpath->vdev->devh,
  648. vxge_hw_mgmt_reg_type_mrpcim,
  649. 0,
  650. (ulong)offsetof(
  651. struct vxge_hw_mrpcim_reg,
  652. rts_mgr_cbasin_cfg),
  653. vpath_vector);
  654. if (status != VXGE_HW_OK) {
  655. vxge_debug_tx(VXGE_ERR,
  656. "%s: Unable to set the vpath-%d in catch-basin mode",
  657. VXGE_DRIVER_NAME, vpath->device_id);
  658. return -EPERM;
  659. }
  660. if (FALSE == vxge_mac_list_add(vpath, &mac_info))
  661. return -EPERM;
  662. return vpath_idx;
  663. }
  664. /**
  665. * vxge_xmit
  666. * @skb : the socket buffer containing the Tx data.
  667. * @dev : device pointer.
  668. *
  669. * This function is the Tx entry point of the driver. Neterion NIC supports
  670. * certain protocol assist features on Tx side, namely CSO, S/G, LSO.
  671. */
  672. static netdev_tx_t
  673. vxge_xmit(struct sk_buff *skb, struct net_device *dev)
  674. {
  675. struct vxge_fifo *fifo = NULL;
  676. void *dtr_priv;
  677. void *dtr = NULL;
  678. struct vxgedev *vdev = NULL;
  679. enum vxge_hw_status status;
  680. int frg_cnt, first_frg_len;
  681. skb_frag_t *frag;
  682. int i = 0, j = 0, avail;
  683. u64 dma_pointer;
  684. struct vxge_tx_priv *txdl_priv = NULL;
  685. struct __vxge_hw_fifo *fifo_hw;
  686. int offload_type;
  687. int vpath_no = 0;
  688. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  689. dev->name, __func__, __LINE__);
  690. /* A buffer with no data will be dropped */
  691. if (unlikely(skb->len <= 0)) {
  692. vxge_debug_tx(VXGE_ERR,
  693. "%s: Buffer has no data..", dev->name);
  694. dev_kfree_skb_any(skb);
  695. return NETDEV_TX_OK;
  696. }
  697. vdev = netdev_priv(dev);
  698. if (unlikely(!is_vxge_card_up(vdev))) {
  699. vxge_debug_tx(VXGE_ERR,
  700. "%s: vdev not initialized", dev->name);
  701. dev_kfree_skb_any(skb);
  702. return NETDEV_TX_OK;
  703. }
  704. if (vdev->config.addr_learn_en) {
  705. vpath_no = vxge_learn_mac(vdev, skb->data + ETH_ALEN);
  706. if (vpath_no == -EPERM) {
  707. vxge_debug_tx(VXGE_ERR,
  708. "%s: Failed to store the mac address",
  709. dev->name);
  710. dev_kfree_skb_any(skb);
  711. return NETDEV_TX_OK;
  712. }
  713. }
  714. if (vdev->config.tx_steering_type == TX_MULTIQ_STEERING)
  715. vpath_no = skb_get_queue_mapping(skb);
  716. else if (vdev->config.tx_steering_type == TX_PORT_STEERING)
  717. vpath_no = vxge_get_vpath_no(vdev, skb);
  718. vxge_debug_tx(VXGE_TRACE, "%s: vpath_no= %d", dev->name, vpath_no);
  719. if (vpath_no >= vdev->no_of_vpath)
  720. vpath_no = 0;
  721. fifo = &vdev->vpaths[vpath_no].fifo;
  722. fifo_hw = fifo->handle;
  723. if (netif_tx_queue_stopped(fifo->txq))
  724. return NETDEV_TX_BUSY;
  725. avail = vxge_hw_fifo_free_txdl_count_get(fifo_hw);
  726. if (avail == 0) {
  727. vxge_debug_tx(VXGE_ERR,
  728. "%s: No free TXDs available", dev->name);
  729. fifo->stats.txd_not_free++;
  730. goto _exit0;
  731. }
  732. /* Last TXD? Stop tx queue to avoid dropping packets. TX
  733. * completion will resume the queue.
  734. */
  735. if (avail == 1)
  736. netif_tx_stop_queue(fifo->txq);
  737. status = vxge_hw_fifo_txdl_reserve(fifo_hw, &dtr, &dtr_priv);
  738. if (unlikely(status != VXGE_HW_OK)) {
  739. vxge_debug_tx(VXGE_ERR,
  740. "%s: Out of descriptors .", dev->name);
  741. fifo->stats.txd_out_of_desc++;
  742. goto _exit0;
  743. }
  744. vxge_debug_tx(VXGE_TRACE,
  745. "%s: %s:%d fifo_hw = %p dtr = %p dtr_priv = %p",
  746. dev->name, __func__, __LINE__,
  747. fifo_hw, dtr, dtr_priv);
  748. if (skb_vlan_tag_present(skb)) {
  749. u16 vlan_tag = skb_vlan_tag_get(skb);
  750. vxge_hw_fifo_txdl_vlan_set(dtr, vlan_tag);
  751. }
  752. first_frg_len = skb_headlen(skb);
  753. dma_pointer = pci_map_single(fifo->pdev, skb->data, first_frg_len,
  754. PCI_DMA_TODEVICE);
  755. if (unlikely(pci_dma_mapping_error(fifo->pdev, dma_pointer))) {
  756. vxge_hw_fifo_txdl_free(fifo_hw, dtr);
  757. fifo->stats.pci_map_fail++;
  758. goto _exit0;
  759. }
  760. txdl_priv = vxge_hw_fifo_txdl_private_get(dtr);
  761. txdl_priv->skb = skb;
  762. txdl_priv->dma_buffers[j] = dma_pointer;
  763. frg_cnt = skb_shinfo(skb)->nr_frags;
  764. vxge_debug_tx(VXGE_TRACE,
  765. "%s: %s:%d skb = %p txdl_priv = %p "
  766. "frag_cnt = %d dma_pointer = 0x%llx", dev->name,
  767. __func__, __LINE__, skb, txdl_priv,
  768. frg_cnt, (unsigned long long)dma_pointer);
  769. vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
  770. first_frg_len);
  771. frag = &skb_shinfo(skb)->frags[0];
  772. for (i = 0; i < frg_cnt; i++) {
  773. /* ignore 0 length fragment */
  774. if (!skb_frag_size(frag))
  775. continue;
  776. dma_pointer = (u64)skb_frag_dma_map(&fifo->pdev->dev, frag,
  777. 0, skb_frag_size(frag),
  778. DMA_TO_DEVICE);
  779. if (unlikely(dma_mapping_error(&fifo->pdev->dev, dma_pointer)))
  780. goto _exit2;
  781. vxge_debug_tx(VXGE_TRACE,
  782. "%s: %s:%d frag = %d dma_pointer = 0x%llx",
  783. dev->name, __func__, __LINE__, i,
  784. (unsigned long long)dma_pointer);
  785. txdl_priv->dma_buffers[j] = dma_pointer;
  786. vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
  787. skb_frag_size(frag));
  788. frag += 1;
  789. }
  790. offload_type = vxge_offload_type(skb);
  791. if (offload_type & (SKB_GSO_TCPV4 | SKB_GSO_TCPV6)) {
  792. int mss = vxge_tcp_mss(skb);
  793. if (mss) {
  794. vxge_debug_tx(VXGE_TRACE, "%s: %s:%d mss = %d",
  795. dev->name, __func__, __LINE__, mss);
  796. vxge_hw_fifo_txdl_mss_set(dtr, mss);
  797. } else {
  798. vxge_assert(skb->len <=
  799. dev->mtu + VXGE_HW_MAC_HEADER_MAX_SIZE);
  800. vxge_assert(0);
  801. goto _exit1;
  802. }
  803. }
  804. if (skb->ip_summed == CHECKSUM_PARTIAL)
  805. vxge_hw_fifo_txdl_cksum_set_bits(dtr,
  806. VXGE_HW_FIFO_TXD_TX_CKO_IPV4_EN |
  807. VXGE_HW_FIFO_TXD_TX_CKO_TCP_EN |
  808. VXGE_HW_FIFO_TXD_TX_CKO_UDP_EN);
  809. vxge_hw_fifo_txdl_post(fifo_hw, dtr);
  810. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
  811. dev->name, __func__, __LINE__);
  812. return NETDEV_TX_OK;
  813. _exit2:
  814. vxge_debug_tx(VXGE_TRACE, "%s: pci_map_page failed", dev->name);
  815. _exit1:
  816. j = 0;
  817. frag = &skb_shinfo(skb)->frags[0];
  818. pci_unmap_single(fifo->pdev, txdl_priv->dma_buffers[j++],
  819. skb_headlen(skb), PCI_DMA_TODEVICE);
  820. for (; j < i; j++) {
  821. pci_unmap_page(fifo->pdev, txdl_priv->dma_buffers[j],
  822. skb_frag_size(frag), PCI_DMA_TODEVICE);
  823. frag += 1;
  824. }
  825. vxge_hw_fifo_txdl_free(fifo_hw, dtr);
  826. _exit0:
  827. netif_tx_stop_queue(fifo->txq);
  828. dev_kfree_skb_any(skb);
  829. return NETDEV_TX_OK;
  830. }
  831. /*
  832. * vxge_rx_term
  833. *
  834. * Function will be called by hw function to abort all outstanding receive
  835. * descriptors.
  836. */
  837. static void
  838. vxge_rx_term(void *dtrh, enum vxge_hw_rxd_state state, void *userdata)
  839. {
  840. struct vxge_ring *ring = (struct vxge_ring *)userdata;
  841. struct vxge_rx_priv *rx_priv =
  842. vxge_hw_ring_rxd_private_get(dtrh);
  843. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  844. ring->ndev->name, __func__, __LINE__);
  845. if (state != VXGE_HW_RXD_STATE_POSTED)
  846. return;
  847. pci_unmap_single(ring->pdev, rx_priv->data_dma,
  848. rx_priv->data_size, PCI_DMA_FROMDEVICE);
  849. dev_kfree_skb(rx_priv->skb);
  850. rx_priv->skb_data = NULL;
  851. vxge_debug_entryexit(VXGE_TRACE,
  852. "%s: %s:%d Exiting...",
  853. ring->ndev->name, __func__, __LINE__);
  854. }
  855. /*
  856. * vxge_tx_term
  857. *
  858. * Function will be called to abort all outstanding tx descriptors
  859. */
  860. static void
  861. vxge_tx_term(void *dtrh, enum vxge_hw_txdl_state state, void *userdata)
  862. {
  863. struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
  864. skb_frag_t *frag;
  865. int i = 0, j, frg_cnt;
  866. struct vxge_tx_priv *txd_priv = vxge_hw_fifo_txdl_private_get(dtrh);
  867. struct sk_buff *skb = txd_priv->skb;
  868. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  869. if (state != VXGE_HW_TXDL_STATE_POSTED)
  870. return;
  871. /* check skb validity */
  872. vxge_assert(skb);
  873. frg_cnt = skb_shinfo(skb)->nr_frags;
  874. frag = &skb_shinfo(skb)->frags[0];
  875. /* for unfragmented skb */
  876. pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
  877. skb_headlen(skb), PCI_DMA_TODEVICE);
  878. for (j = 0; j < frg_cnt; j++) {
  879. pci_unmap_page(fifo->pdev, txd_priv->dma_buffers[i++],
  880. skb_frag_size(frag), PCI_DMA_TODEVICE);
  881. frag += 1;
  882. }
  883. dev_kfree_skb(skb);
  884. vxge_debug_entryexit(VXGE_TRACE,
  885. "%s:%d Exiting...", __func__, __LINE__);
  886. }
  887. static int vxge_mac_list_del(struct vxge_vpath *vpath, struct macInfo *mac)
  888. {
  889. struct list_head *entry, *next;
  890. u64 del_mac = 0;
  891. u8 *mac_address = (u8 *) (&del_mac);
  892. /* Copy the mac address to delete from the list */
  893. memcpy(mac_address, mac->macaddr, ETH_ALEN);
  894. list_for_each_safe(entry, next, &vpath->mac_addr_list) {
  895. if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac) {
  896. list_del(entry);
  897. kfree((struct vxge_mac_addrs *)entry);
  898. vpath->mac_addr_cnt--;
  899. if (is_multicast_ether_addr(mac->macaddr))
  900. vpath->mcast_addr_cnt--;
  901. return TRUE;
  902. }
  903. }
  904. return FALSE;
  905. }
  906. /* delete a mac address from DA table */
  907. static enum vxge_hw_status
  908. vxge_del_mac_addr(struct vxgedev *vdev, struct macInfo *mac)
  909. {
  910. enum vxge_hw_status status = VXGE_HW_OK;
  911. struct vxge_vpath *vpath;
  912. vpath = &vdev->vpaths[mac->vpath_no];
  913. status = vxge_hw_vpath_mac_addr_delete(vpath->handle, mac->macaddr,
  914. mac->macmask);
  915. if (status != VXGE_HW_OK) {
  916. vxge_debug_init(VXGE_ERR,
  917. "DA config delete entry failed for vpath:%d",
  918. vpath->device_id);
  919. } else
  920. vxge_mac_list_del(vpath, mac);
  921. return status;
  922. }
  923. /**
  924. * vxge_set_multicast
  925. * @dev: pointer to the device structure
  926. *
  927. * Entry point for multicast address enable/disable
  928. * This function is a driver entry point which gets called by the kernel
  929. * whenever multicast addresses must be enabled/disabled. This also gets
  930. * called to set/reset promiscuous mode. Depending on the deivce flag, we
  931. * determine, if multicast address must be enabled or if promiscuous mode
  932. * is to be disabled etc.
  933. */
  934. static void vxge_set_multicast(struct net_device *dev)
  935. {
  936. struct netdev_hw_addr *ha;
  937. struct vxgedev *vdev;
  938. int i, mcast_cnt = 0;
  939. struct __vxge_hw_device *hldev;
  940. struct vxge_vpath *vpath;
  941. enum vxge_hw_status status = VXGE_HW_OK;
  942. struct macInfo mac_info;
  943. int vpath_idx = 0;
  944. struct vxge_mac_addrs *mac_entry;
  945. struct list_head *list_head;
  946. struct list_head *entry, *next;
  947. u8 *mac_address = NULL;
  948. vxge_debug_entryexit(VXGE_TRACE,
  949. "%s:%d", __func__, __LINE__);
  950. vdev = netdev_priv(dev);
  951. hldev = vdev->devh;
  952. if (unlikely(!is_vxge_card_up(vdev)))
  953. return;
  954. if ((dev->flags & IFF_ALLMULTI) && (!vdev->all_multi_flg)) {
  955. for (i = 0; i < vdev->no_of_vpath; i++) {
  956. vpath = &vdev->vpaths[i];
  957. vxge_assert(vpath->is_open);
  958. status = vxge_hw_vpath_mcast_enable(vpath->handle);
  959. if (status != VXGE_HW_OK)
  960. vxge_debug_init(VXGE_ERR, "failed to enable "
  961. "multicast, status %d", status);
  962. vdev->all_multi_flg = 1;
  963. }
  964. } else if (!(dev->flags & IFF_ALLMULTI) && (vdev->all_multi_flg)) {
  965. for (i = 0; i < vdev->no_of_vpath; i++) {
  966. vpath = &vdev->vpaths[i];
  967. vxge_assert(vpath->is_open);
  968. status = vxge_hw_vpath_mcast_disable(vpath->handle);
  969. if (status != VXGE_HW_OK)
  970. vxge_debug_init(VXGE_ERR, "failed to disable "
  971. "multicast, status %d", status);
  972. vdev->all_multi_flg = 0;
  973. }
  974. }
  975. if (!vdev->config.addr_learn_en) {
  976. for (i = 0; i < vdev->no_of_vpath; i++) {
  977. vpath = &vdev->vpaths[i];
  978. vxge_assert(vpath->is_open);
  979. if (dev->flags & IFF_PROMISC)
  980. status = vxge_hw_vpath_promisc_enable(
  981. vpath->handle);
  982. else
  983. status = vxge_hw_vpath_promisc_disable(
  984. vpath->handle);
  985. if (status != VXGE_HW_OK)
  986. vxge_debug_init(VXGE_ERR, "failed to %s promisc"
  987. ", status %d", dev->flags&IFF_PROMISC ?
  988. "enable" : "disable", status);
  989. }
  990. }
  991. memset(&mac_info, 0, sizeof(struct macInfo));
  992. /* Update individual M_CAST address list */
  993. if ((!vdev->all_multi_flg) && netdev_mc_count(dev)) {
  994. mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
  995. list_head = &vdev->vpaths[0].mac_addr_list;
  996. if ((netdev_mc_count(dev) +
  997. (vdev->vpaths[0].mac_addr_cnt - mcast_cnt)) >
  998. vdev->vpaths[0].max_mac_addr_cnt)
  999. goto _set_all_mcast;
  1000. /* Delete previous MC's */
  1001. for (i = 0; i < mcast_cnt; i++) {
  1002. list_for_each_safe(entry, next, list_head) {
  1003. mac_entry = (struct vxge_mac_addrs *)entry;
  1004. /* Copy the mac address to delete */
  1005. mac_address = (u8 *)&mac_entry->macaddr;
  1006. memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
  1007. if (is_multicast_ether_addr(mac_info.macaddr)) {
  1008. for (vpath_idx = 0; vpath_idx <
  1009. vdev->no_of_vpath;
  1010. vpath_idx++) {
  1011. mac_info.vpath_no = vpath_idx;
  1012. status = vxge_del_mac_addr(
  1013. vdev,
  1014. &mac_info);
  1015. }
  1016. }
  1017. }
  1018. }
  1019. /* Add new ones */
  1020. netdev_for_each_mc_addr(ha, dev) {
  1021. memcpy(mac_info.macaddr, ha->addr, ETH_ALEN);
  1022. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
  1023. vpath_idx++) {
  1024. mac_info.vpath_no = vpath_idx;
  1025. mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
  1026. status = vxge_add_mac_addr(vdev, &mac_info);
  1027. if (status != VXGE_HW_OK) {
  1028. vxge_debug_init(VXGE_ERR,
  1029. "%s:%d Setting individual"
  1030. "multicast address failed",
  1031. __func__, __LINE__);
  1032. goto _set_all_mcast;
  1033. }
  1034. }
  1035. }
  1036. return;
  1037. _set_all_mcast:
  1038. mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
  1039. /* Delete previous MC's */
  1040. for (i = 0; i < mcast_cnt; i++) {
  1041. list_for_each_safe(entry, next, list_head) {
  1042. mac_entry = (struct vxge_mac_addrs *)entry;
  1043. /* Copy the mac address to delete */
  1044. mac_address = (u8 *)&mac_entry->macaddr;
  1045. memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
  1046. if (is_multicast_ether_addr(mac_info.macaddr))
  1047. break;
  1048. }
  1049. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
  1050. vpath_idx++) {
  1051. mac_info.vpath_no = vpath_idx;
  1052. status = vxge_del_mac_addr(vdev, &mac_info);
  1053. }
  1054. }
  1055. /* Enable all multicast */
  1056. for (i = 0; i < vdev->no_of_vpath; i++) {
  1057. vpath = &vdev->vpaths[i];
  1058. vxge_assert(vpath->is_open);
  1059. status = vxge_hw_vpath_mcast_enable(vpath->handle);
  1060. if (status != VXGE_HW_OK) {
  1061. vxge_debug_init(VXGE_ERR,
  1062. "%s:%d Enabling all multicasts failed",
  1063. __func__, __LINE__);
  1064. }
  1065. vdev->all_multi_flg = 1;
  1066. }
  1067. dev->flags |= IFF_ALLMULTI;
  1068. }
  1069. vxge_debug_entryexit(VXGE_TRACE,
  1070. "%s:%d Exiting...", __func__, __LINE__);
  1071. }
  1072. /**
  1073. * vxge_set_mac_addr
  1074. * @dev: pointer to the device structure
  1075. *
  1076. * Update entry "0" (default MAC addr)
  1077. */
  1078. static int vxge_set_mac_addr(struct net_device *dev, void *p)
  1079. {
  1080. struct sockaddr *addr = p;
  1081. struct vxgedev *vdev;
  1082. struct __vxge_hw_device *hldev;
  1083. enum vxge_hw_status status = VXGE_HW_OK;
  1084. struct macInfo mac_info_new, mac_info_old;
  1085. int vpath_idx = 0;
  1086. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  1087. vdev = netdev_priv(dev);
  1088. hldev = vdev->devh;
  1089. if (!is_valid_ether_addr(addr->sa_data))
  1090. return -EINVAL;
  1091. memset(&mac_info_new, 0, sizeof(struct macInfo));
  1092. memset(&mac_info_old, 0, sizeof(struct macInfo));
  1093. vxge_debug_entryexit(VXGE_TRACE, "%s:%d Exiting...",
  1094. __func__, __LINE__);
  1095. /* Get the old address */
  1096. memcpy(mac_info_old.macaddr, dev->dev_addr, dev->addr_len);
  1097. /* Copy the new address */
  1098. memcpy(mac_info_new.macaddr, addr->sa_data, dev->addr_len);
  1099. /* First delete the old mac address from all the vpaths
  1100. as we can't specify the index while adding new mac address */
  1101. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  1102. struct vxge_vpath *vpath = &vdev->vpaths[vpath_idx];
  1103. if (!vpath->is_open) {
  1104. /* This can happen when this interface is added/removed
  1105. to the bonding interface. Delete this station address
  1106. from the linked list */
  1107. vxge_mac_list_del(vpath, &mac_info_old);
  1108. /* Add this new address to the linked list
  1109. for later restoring */
  1110. vxge_mac_list_add(vpath, &mac_info_new);
  1111. continue;
  1112. }
  1113. /* Delete the station address */
  1114. mac_info_old.vpath_no = vpath_idx;
  1115. status = vxge_del_mac_addr(vdev, &mac_info_old);
  1116. }
  1117. if (unlikely(!is_vxge_card_up(vdev))) {
  1118. memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
  1119. return VXGE_HW_OK;
  1120. }
  1121. /* Set this mac address to all the vpaths */
  1122. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  1123. mac_info_new.vpath_no = vpath_idx;
  1124. mac_info_new.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
  1125. status = vxge_add_mac_addr(vdev, &mac_info_new);
  1126. if (status != VXGE_HW_OK)
  1127. return -EINVAL;
  1128. }
  1129. memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
  1130. return status;
  1131. }
  1132. /*
  1133. * vxge_vpath_intr_enable
  1134. * @vdev: pointer to vdev
  1135. * @vp_id: vpath for which to enable the interrupts
  1136. *
  1137. * Enables the interrupts for the vpath
  1138. */
  1139. static void vxge_vpath_intr_enable(struct vxgedev *vdev, int vp_id)
  1140. {
  1141. struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
  1142. int msix_id = 0;
  1143. int tim_msix_id[4] = {0, 1, 0, 0};
  1144. int alarm_msix_id = VXGE_ALARM_MSIX_ID;
  1145. vxge_hw_vpath_intr_enable(vpath->handle);
  1146. if (vdev->config.intr_type == INTA)
  1147. vxge_hw_vpath_inta_unmask_tx_rx(vpath->handle);
  1148. else {
  1149. vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
  1150. alarm_msix_id);
  1151. msix_id = vpath->device_id * VXGE_HW_VPATH_MSIX_ACTIVE;
  1152. vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
  1153. vxge_hw_vpath_msix_unmask(vpath->handle, msix_id + 1);
  1154. /* enable the alarm vector */
  1155. msix_id = (vpath->handle->vpath->hldev->first_vp_id *
  1156. VXGE_HW_VPATH_MSIX_ACTIVE) + alarm_msix_id;
  1157. vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
  1158. }
  1159. }
  1160. /*
  1161. * vxge_vpath_intr_disable
  1162. * @vdev: pointer to vdev
  1163. * @vp_id: vpath for which to disable the interrupts
  1164. *
  1165. * Disables the interrupts for the vpath
  1166. */
  1167. static void vxge_vpath_intr_disable(struct vxgedev *vdev, int vp_id)
  1168. {
  1169. struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
  1170. struct __vxge_hw_device *hldev;
  1171. int msix_id;
  1172. hldev = pci_get_drvdata(vdev->pdev);
  1173. vxge_hw_vpath_wait_receive_idle(hldev, vpath->device_id);
  1174. vxge_hw_vpath_intr_disable(vpath->handle);
  1175. if (vdev->config.intr_type == INTA)
  1176. vxge_hw_vpath_inta_mask_tx_rx(vpath->handle);
  1177. else {
  1178. msix_id = vpath->device_id * VXGE_HW_VPATH_MSIX_ACTIVE;
  1179. vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
  1180. vxge_hw_vpath_msix_mask(vpath->handle, msix_id + 1);
  1181. /* disable the alarm vector */
  1182. msix_id = (vpath->handle->vpath->hldev->first_vp_id *
  1183. VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
  1184. vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
  1185. }
  1186. }
  1187. /* list all mac addresses from DA table */
  1188. static enum vxge_hw_status
  1189. vxge_search_mac_addr_in_da_table(struct vxge_vpath *vpath, struct macInfo *mac)
  1190. {
  1191. enum vxge_hw_status status = VXGE_HW_OK;
  1192. unsigned char macmask[ETH_ALEN];
  1193. unsigned char macaddr[ETH_ALEN];
  1194. status = vxge_hw_vpath_mac_addr_get(vpath->handle,
  1195. macaddr, macmask);
  1196. if (status != VXGE_HW_OK) {
  1197. vxge_debug_init(VXGE_ERR,
  1198. "DA config list entry failed for vpath:%d",
  1199. vpath->device_id);
  1200. return status;
  1201. }
  1202. while (!ether_addr_equal(mac->macaddr, macaddr)) {
  1203. status = vxge_hw_vpath_mac_addr_get_next(vpath->handle,
  1204. macaddr, macmask);
  1205. if (status != VXGE_HW_OK)
  1206. break;
  1207. }
  1208. return status;
  1209. }
  1210. /* Store all mac addresses from the list to the DA table */
  1211. static enum vxge_hw_status vxge_restore_vpath_mac_addr(struct vxge_vpath *vpath)
  1212. {
  1213. enum vxge_hw_status status = VXGE_HW_OK;
  1214. struct macInfo mac_info;
  1215. u8 *mac_address = NULL;
  1216. struct list_head *entry, *next;
  1217. memset(&mac_info, 0, sizeof(struct macInfo));
  1218. if (vpath->is_open) {
  1219. list_for_each_safe(entry, next, &vpath->mac_addr_list) {
  1220. mac_address =
  1221. (u8 *)&
  1222. ((struct vxge_mac_addrs *)entry)->macaddr;
  1223. memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
  1224. ((struct vxge_mac_addrs *)entry)->state =
  1225. VXGE_LL_MAC_ADDR_IN_DA_TABLE;
  1226. /* does this mac address already exist in da table? */
  1227. status = vxge_search_mac_addr_in_da_table(vpath,
  1228. &mac_info);
  1229. if (status != VXGE_HW_OK) {
  1230. /* Add this mac address to the DA table */
  1231. status = vxge_hw_vpath_mac_addr_add(
  1232. vpath->handle, mac_info.macaddr,
  1233. mac_info.macmask,
  1234. VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE);
  1235. if (status != VXGE_HW_OK) {
  1236. vxge_debug_init(VXGE_ERR,
  1237. "DA add entry failed for vpath:%d",
  1238. vpath->device_id);
  1239. ((struct vxge_mac_addrs *)entry)->state
  1240. = VXGE_LL_MAC_ADDR_IN_LIST;
  1241. }
  1242. }
  1243. }
  1244. }
  1245. return status;
  1246. }
  1247. /* Store all vlan ids from the list to the vid table */
  1248. static enum vxge_hw_status
  1249. vxge_restore_vpath_vid_table(struct vxge_vpath *vpath)
  1250. {
  1251. enum vxge_hw_status status = VXGE_HW_OK;
  1252. struct vxgedev *vdev = vpath->vdev;
  1253. u16 vid;
  1254. if (!vpath->is_open)
  1255. return status;
  1256. for_each_set_bit(vid, vdev->active_vlans, VLAN_N_VID)
  1257. status = vxge_hw_vpath_vid_add(vpath->handle, vid);
  1258. return status;
  1259. }
  1260. /*
  1261. * vxge_reset_vpath
  1262. * @vdev: pointer to vdev
  1263. * @vp_id: vpath to reset
  1264. *
  1265. * Resets the vpath
  1266. */
  1267. static int vxge_reset_vpath(struct vxgedev *vdev, int vp_id)
  1268. {
  1269. enum vxge_hw_status status = VXGE_HW_OK;
  1270. struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
  1271. int ret = 0;
  1272. /* check if device is down already */
  1273. if (unlikely(!is_vxge_card_up(vdev)))
  1274. return 0;
  1275. /* is device reset already scheduled */
  1276. if (test_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
  1277. return 0;
  1278. if (vpath->handle) {
  1279. if (vxge_hw_vpath_reset(vpath->handle) == VXGE_HW_OK) {
  1280. if (is_vxge_card_up(vdev) &&
  1281. vxge_hw_vpath_recover_from_reset(vpath->handle)
  1282. != VXGE_HW_OK) {
  1283. vxge_debug_init(VXGE_ERR,
  1284. "vxge_hw_vpath_recover_from_reset"
  1285. "failed for vpath:%d", vp_id);
  1286. return status;
  1287. }
  1288. } else {
  1289. vxge_debug_init(VXGE_ERR,
  1290. "vxge_hw_vpath_reset failed for"
  1291. "vpath:%d", vp_id);
  1292. return status;
  1293. }
  1294. } else
  1295. return VXGE_HW_FAIL;
  1296. vxge_restore_vpath_mac_addr(vpath);
  1297. vxge_restore_vpath_vid_table(vpath);
  1298. /* Enable all broadcast */
  1299. vxge_hw_vpath_bcast_enable(vpath->handle);
  1300. /* Enable all multicast */
  1301. if (vdev->all_multi_flg) {
  1302. status = vxge_hw_vpath_mcast_enable(vpath->handle);
  1303. if (status != VXGE_HW_OK)
  1304. vxge_debug_init(VXGE_ERR,
  1305. "%s:%d Enabling multicast failed",
  1306. __func__, __LINE__);
  1307. }
  1308. /* Enable the interrupts */
  1309. vxge_vpath_intr_enable(vdev, vp_id);
  1310. smp_wmb();
  1311. /* Enable the flow of traffic through the vpath */
  1312. vxge_hw_vpath_enable(vpath->handle);
  1313. smp_wmb();
  1314. vxge_hw_vpath_rx_doorbell_init(vpath->handle);
  1315. vpath->ring.last_status = VXGE_HW_OK;
  1316. /* Vpath reset done */
  1317. clear_bit(vp_id, &vdev->vp_reset);
  1318. /* Start the vpath queue */
  1319. if (netif_tx_queue_stopped(vpath->fifo.txq))
  1320. netif_tx_wake_queue(vpath->fifo.txq);
  1321. return ret;
  1322. }
  1323. /* Configure CI */
  1324. static void vxge_config_ci_for_tti_rti(struct vxgedev *vdev)
  1325. {
  1326. int i = 0;
  1327. /* Enable CI for RTI */
  1328. if (vdev->config.intr_type == MSI_X) {
  1329. for (i = 0; i < vdev->no_of_vpath; i++) {
  1330. struct __vxge_hw_ring *hw_ring;
  1331. hw_ring = vdev->vpaths[i].ring.handle;
  1332. vxge_hw_vpath_dynamic_rti_ci_set(hw_ring);
  1333. }
  1334. }
  1335. /* Enable CI for TTI */
  1336. for (i = 0; i < vdev->no_of_vpath; i++) {
  1337. struct __vxge_hw_fifo *hw_fifo = vdev->vpaths[i].fifo.handle;
  1338. vxge_hw_vpath_tti_ci_set(hw_fifo);
  1339. /*
  1340. * For Inta (with or without napi), Set CI ON for only one
  1341. * vpath. (Have only one free running timer).
  1342. */
  1343. if ((vdev->config.intr_type == INTA) && (i == 0))
  1344. break;
  1345. }
  1346. return;
  1347. }
  1348. static int do_vxge_reset(struct vxgedev *vdev, int event)
  1349. {
  1350. enum vxge_hw_status status;
  1351. int ret = 0, vp_id, i;
  1352. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  1353. if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET)) {
  1354. /* check if device is down already */
  1355. if (unlikely(!is_vxge_card_up(vdev)))
  1356. return 0;
  1357. /* is reset already scheduled */
  1358. if (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
  1359. return 0;
  1360. }
  1361. if (event == VXGE_LL_FULL_RESET) {
  1362. netif_carrier_off(vdev->ndev);
  1363. /* wait for all the vpath reset to complete */
  1364. for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
  1365. while (test_bit(vp_id, &vdev->vp_reset))
  1366. msleep(50);
  1367. }
  1368. netif_carrier_on(vdev->ndev);
  1369. /* if execution mode is set to debug, don't reset the adapter */
  1370. if (unlikely(vdev->exec_mode)) {
  1371. vxge_debug_init(VXGE_ERR,
  1372. "%s: execution mode is debug, returning..",
  1373. vdev->ndev->name);
  1374. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  1375. netif_tx_stop_all_queues(vdev->ndev);
  1376. return 0;
  1377. }
  1378. }
  1379. if (event == VXGE_LL_FULL_RESET) {
  1380. vxge_hw_device_wait_receive_idle(vdev->devh);
  1381. vxge_hw_device_intr_disable(vdev->devh);
  1382. switch (vdev->cric_err_event) {
  1383. case VXGE_HW_EVENT_UNKNOWN:
  1384. netif_tx_stop_all_queues(vdev->ndev);
  1385. vxge_debug_init(VXGE_ERR,
  1386. "fatal: %s: Disabling device due to"
  1387. "unknown error",
  1388. vdev->ndev->name);
  1389. ret = -EPERM;
  1390. goto out;
  1391. case VXGE_HW_EVENT_RESET_START:
  1392. break;
  1393. case VXGE_HW_EVENT_RESET_COMPLETE:
  1394. case VXGE_HW_EVENT_LINK_DOWN:
  1395. case VXGE_HW_EVENT_LINK_UP:
  1396. case VXGE_HW_EVENT_ALARM_CLEARED:
  1397. case VXGE_HW_EVENT_ECCERR:
  1398. case VXGE_HW_EVENT_MRPCIM_ECCERR:
  1399. ret = -EPERM;
  1400. goto out;
  1401. case VXGE_HW_EVENT_FIFO_ERR:
  1402. case VXGE_HW_EVENT_VPATH_ERR:
  1403. break;
  1404. case VXGE_HW_EVENT_CRITICAL_ERR:
  1405. netif_tx_stop_all_queues(vdev->ndev);
  1406. vxge_debug_init(VXGE_ERR,
  1407. "fatal: %s: Disabling device due to"
  1408. "serious error",
  1409. vdev->ndev->name);
  1410. /* SOP or device reset required */
  1411. /* This event is not currently used */
  1412. ret = -EPERM;
  1413. goto out;
  1414. case VXGE_HW_EVENT_SERR:
  1415. netif_tx_stop_all_queues(vdev->ndev);
  1416. vxge_debug_init(VXGE_ERR,
  1417. "fatal: %s: Disabling device due to"
  1418. "serious error",
  1419. vdev->ndev->name);
  1420. ret = -EPERM;
  1421. goto out;
  1422. case VXGE_HW_EVENT_SRPCIM_SERR:
  1423. case VXGE_HW_EVENT_MRPCIM_SERR:
  1424. ret = -EPERM;
  1425. goto out;
  1426. case VXGE_HW_EVENT_SLOT_FREEZE:
  1427. netif_tx_stop_all_queues(vdev->ndev);
  1428. vxge_debug_init(VXGE_ERR,
  1429. "fatal: %s: Disabling device due to"
  1430. "slot freeze",
  1431. vdev->ndev->name);
  1432. ret = -EPERM;
  1433. goto out;
  1434. default:
  1435. break;
  1436. }
  1437. }
  1438. if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET))
  1439. netif_tx_stop_all_queues(vdev->ndev);
  1440. if (event == VXGE_LL_FULL_RESET) {
  1441. status = vxge_reset_all_vpaths(vdev);
  1442. if (status != VXGE_HW_OK) {
  1443. vxge_debug_init(VXGE_ERR,
  1444. "fatal: %s: can not reset vpaths",
  1445. vdev->ndev->name);
  1446. ret = -EPERM;
  1447. goto out;
  1448. }
  1449. }
  1450. if (event == VXGE_LL_COMPL_RESET) {
  1451. for (i = 0; i < vdev->no_of_vpath; i++)
  1452. if (vdev->vpaths[i].handle) {
  1453. if (vxge_hw_vpath_recover_from_reset(
  1454. vdev->vpaths[i].handle)
  1455. != VXGE_HW_OK) {
  1456. vxge_debug_init(VXGE_ERR,
  1457. "vxge_hw_vpath_recover_"
  1458. "from_reset failed for vpath: "
  1459. "%d", i);
  1460. ret = -EPERM;
  1461. goto out;
  1462. }
  1463. } else {
  1464. vxge_debug_init(VXGE_ERR,
  1465. "vxge_hw_vpath_reset failed for "
  1466. "vpath:%d", i);
  1467. ret = -EPERM;
  1468. goto out;
  1469. }
  1470. }
  1471. if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET)) {
  1472. /* Reprogram the DA table with populated mac addresses */
  1473. for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
  1474. vxge_restore_vpath_mac_addr(&vdev->vpaths[vp_id]);
  1475. vxge_restore_vpath_vid_table(&vdev->vpaths[vp_id]);
  1476. }
  1477. /* enable vpath interrupts */
  1478. for (i = 0; i < vdev->no_of_vpath; i++)
  1479. vxge_vpath_intr_enable(vdev, i);
  1480. vxge_hw_device_intr_enable(vdev->devh);
  1481. smp_wmb();
  1482. /* Indicate card up */
  1483. set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  1484. /* Get the traffic to flow through the vpaths */
  1485. for (i = 0; i < vdev->no_of_vpath; i++) {
  1486. vxge_hw_vpath_enable(vdev->vpaths[i].handle);
  1487. smp_wmb();
  1488. vxge_hw_vpath_rx_doorbell_init(vdev->vpaths[i].handle);
  1489. }
  1490. netif_tx_wake_all_queues(vdev->ndev);
  1491. }
  1492. /* configure CI */
  1493. vxge_config_ci_for_tti_rti(vdev);
  1494. out:
  1495. vxge_debug_entryexit(VXGE_TRACE,
  1496. "%s:%d Exiting...", __func__, __LINE__);
  1497. /* Indicate reset done */
  1498. if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET))
  1499. clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
  1500. return ret;
  1501. }
  1502. /*
  1503. * vxge_reset
  1504. * @vdev: pointer to ll device
  1505. *
  1506. * driver may reset the chip on events of serr, eccerr, etc
  1507. */
  1508. static void vxge_reset(struct work_struct *work)
  1509. {
  1510. struct vxgedev *vdev = container_of(work, struct vxgedev, reset_task);
  1511. if (!netif_running(vdev->ndev))
  1512. return;
  1513. do_vxge_reset(vdev, VXGE_LL_FULL_RESET);
  1514. }
  1515. /**
  1516. * vxge_poll - Receive handler when Receive Polling is used.
  1517. * @dev: pointer to the device structure.
  1518. * @budget: Number of packets budgeted to be processed in this iteration.
  1519. *
  1520. * This function comes into picture only if Receive side is being handled
  1521. * through polling (called NAPI in linux). It mostly does what the normal
  1522. * Rx interrupt handler does in terms of descriptor and packet processing
  1523. * but not in an interrupt context. Also it will process a specified number
  1524. * of packets at most in one iteration. This value is passed down by the
  1525. * kernel as the function argument 'budget'.
  1526. */
  1527. static int vxge_poll_msix(struct napi_struct *napi, int budget)
  1528. {
  1529. struct vxge_ring *ring = container_of(napi, struct vxge_ring, napi);
  1530. int pkts_processed;
  1531. int budget_org = budget;
  1532. ring->budget = budget;
  1533. ring->pkts_processed = 0;
  1534. vxge_hw_vpath_poll_rx(ring->handle);
  1535. pkts_processed = ring->pkts_processed;
  1536. if (ring->pkts_processed < budget_org) {
  1537. napi_complete(napi);
  1538. /* Re enable the Rx interrupts for the vpath */
  1539. vxge_hw_channel_msix_unmask(
  1540. (struct __vxge_hw_channel *)ring->handle,
  1541. ring->rx_vector_no);
  1542. mmiowb();
  1543. }
  1544. /* We are copying and returning the local variable, in case if after
  1545. * clearing the msix interrupt above, if the interrupt fires right
  1546. * away which can preempt this NAPI thread */
  1547. return pkts_processed;
  1548. }
  1549. static int vxge_poll_inta(struct napi_struct *napi, int budget)
  1550. {
  1551. struct vxgedev *vdev = container_of(napi, struct vxgedev, napi);
  1552. int pkts_processed = 0;
  1553. int i;
  1554. int budget_org = budget;
  1555. struct vxge_ring *ring;
  1556. struct __vxge_hw_device *hldev = pci_get_drvdata(vdev->pdev);
  1557. for (i = 0; i < vdev->no_of_vpath; i++) {
  1558. ring = &vdev->vpaths[i].ring;
  1559. ring->budget = budget;
  1560. ring->pkts_processed = 0;
  1561. vxge_hw_vpath_poll_rx(ring->handle);
  1562. pkts_processed += ring->pkts_processed;
  1563. budget -= ring->pkts_processed;
  1564. if (budget <= 0)
  1565. break;
  1566. }
  1567. VXGE_COMPLETE_ALL_TX(vdev);
  1568. if (pkts_processed < budget_org) {
  1569. napi_complete(napi);
  1570. /* Re enable the Rx interrupts for the ring */
  1571. vxge_hw_device_unmask_all(hldev);
  1572. vxge_hw_device_flush_io(hldev);
  1573. }
  1574. return pkts_processed;
  1575. }
  1576. #ifdef CONFIG_NET_POLL_CONTROLLER
  1577. /**
  1578. * vxge_netpoll - netpoll event handler entry point
  1579. * @dev : pointer to the device structure.
  1580. * Description:
  1581. * This function will be called by upper layer to check for events on the
  1582. * interface in situations where interrupts are disabled. It is used for
  1583. * specific in-kernel networking tasks, such as remote consoles and kernel
  1584. * debugging over the network (example netdump in RedHat).
  1585. */
  1586. static void vxge_netpoll(struct net_device *dev)
  1587. {
  1588. struct vxgedev *vdev = netdev_priv(dev);
  1589. struct pci_dev *pdev = vdev->pdev;
  1590. struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
  1591. const int irq = pdev->irq;
  1592. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  1593. if (pci_channel_offline(pdev))
  1594. return;
  1595. disable_irq(irq);
  1596. vxge_hw_device_clear_tx_rx(hldev);
  1597. vxge_hw_device_clear_tx_rx(hldev);
  1598. VXGE_COMPLETE_ALL_RX(vdev);
  1599. VXGE_COMPLETE_ALL_TX(vdev);
  1600. enable_irq(irq);
  1601. vxge_debug_entryexit(VXGE_TRACE,
  1602. "%s:%d Exiting...", __func__, __LINE__);
  1603. }
  1604. #endif
  1605. /* RTH configuration */
  1606. static enum vxge_hw_status vxge_rth_configure(struct vxgedev *vdev)
  1607. {
  1608. enum vxge_hw_status status = VXGE_HW_OK;
  1609. struct vxge_hw_rth_hash_types hash_types;
  1610. u8 itable[256] = {0}; /* indirection table */
  1611. u8 mtable[256] = {0}; /* CPU to vpath mapping */
  1612. int index;
  1613. /*
  1614. * Filling
  1615. * - itable with bucket numbers
  1616. * - mtable with bucket-to-vpath mapping
  1617. */
  1618. for (index = 0; index < (1 << vdev->config.rth_bkt_sz); index++) {
  1619. itable[index] = index;
  1620. mtable[index] = index % vdev->no_of_vpath;
  1621. }
  1622. /* set indirection table, bucket-to-vpath mapping */
  1623. status = vxge_hw_vpath_rts_rth_itable_set(vdev->vp_handles,
  1624. vdev->no_of_vpath,
  1625. mtable, itable,
  1626. vdev->config.rth_bkt_sz);
  1627. if (status != VXGE_HW_OK) {
  1628. vxge_debug_init(VXGE_ERR,
  1629. "RTH indirection table configuration failed "
  1630. "for vpath:%d", vdev->vpaths[0].device_id);
  1631. return status;
  1632. }
  1633. /* Fill RTH hash types */
  1634. hash_types.hash_type_tcpipv4_en = vdev->config.rth_hash_type_tcpipv4;
  1635. hash_types.hash_type_ipv4_en = vdev->config.rth_hash_type_ipv4;
  1636. hash_types.hash_type_tcpipv6_en = vdev->config.rth_hash_type_tcpipv6;
  1637. hash_types.hash_type_ipv6_en = vdev->config.rth_hash_type_ipv6;
  1638. hash_types.hash_type_tcpipv6ex_en =
  1639. vdev->config.rth_hash_type_tcpipv6ex;
  1640. hash_types.hash_type_ipv6ex_en = vdev->config.rth_hash_type_ipv6ex;
  1641. /*
  1642. * Because the itable_set() method uses the active_table field
  1643. * for the target virtual path the RTH config should be updated
  1644. * for all VPATHs. The h/w only uses the lowest numbered VPATH
  1645. * when steering frames.
  1646. */
  1647. for (index = 0; index < vdev->no_of_vpath; index++) {
  1648. status = vxge_hw_vpath_rts_rth_set(
  1649. vdev->vpaths[index].handle,
  1650. vdev->config.rth_algorithm,
  1651. &hash_types,
  1652. vdev->config.rth_bkt_sz);
  1653. if (status != VXGE_HW_OK) {
  1654. vxge_debug_init(VXGE_ERR,
  1655. "RTH configuration failed for vpath:%d",
  1656. vdev->vpaths[index].device_id);
  1657. return status;
  1658. }
  1659. }
  1660. return status;
  1661. }
  1662. /* reset vpaths */
  1663. static enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev)
  1664. {
  1665. enum vxge_hw_status status = VXGE_HW_OK;
  1666. struct vxge_vpath *vpath;
  1667. int i;
  1668. for (i = 0; i < vdev->no_of_vpath; i++) {
  1669. vpath = &vdev->vpaths[i];
  1670. if (vpath->handle) {
  1671. if (vxge_hw_vpath_reset(vpath->handle) == VXGE_HW_OK) {
  1672. if (is_vxge_card_up(vdev) &&
  1673. vxge_hw_vpath_recover_from_reset(
  1674. vpath->handle) != VXGE_HW_OK) {
  1675. vxge_debug_init(VXGE_ERR,
  1676. "vxge_hw_vpath_recover_"
  1677. "from_reset failed for vpath: "
  1678. "%d", i);
  1679. return status;
  1680. }
  1681. } else {
  1682. vxge_debug_init(VXGE_ERR,
  1683. "vxge_hw_vpath_reset failed for "
  1684. "vpath:%d", i);
  1685. return status;
  1686. }
  1687. }
  1688. }
  1689. return status;
  1690. }
  1691. /* close vpaths */
  1692. static void vxge_close_vpaths(struct vxgedev *vdev, int index)
  1693. {
  1694. struct vxge_vpath *vpath;
  1695. int i;
  1696. for (i = index; i < vdev->no_of_vpath; i++) {
  1697. vpath = &vdev->vpaths[i];
  1698. if (vpath->handle && vpath->is_open) {
  1699. vxge_hw_vpath_close(vpath->handle);
  1700. vdev->stats.vpaths_open--;
  1701. }
  1702. vpath->is_open = 0;
  1703. vpath->handle = NULL;
  1704. }
  1705. }
  1706. /* open vpaths */
  1707. static int vxge_open_vpaths(struct vxgedev *vdev)
  1708. {
  1709. struct vxge_hw_vpath_attr attr;
  1710. enum vxge_hw_status status;
  1711. struct vxge_vpath *vpath;
  1712. u32 vp_id = 0;
  1713. int i;
  1714. for (i = 0; i < vdev->no_of_vpath; i++) {
  1715. vpath = &vdev->vpaths[i];
  1716. vxge_assert(vpath->is_configured);
  1717. if (!vdev->titan1) {
  1718. struct vxge_hw_vp_config *vcfg;
  1719. vcfg = &vdev->devh->config.vp_config[vpath->device_id];
  1720. vcfg->rti.urange_a = RTI_T1A_RX_URANGE_A;
  1721. vcfg->rti.urange_b = RTI_T1A_RX_URANGE_B;
  1722. vcfg->rti.urange_c = RTI_T1A_RX_URANGE_C;
  1723. vcfg->tti.uec_a = TTI_T1A_TX_UFC_A;
  1724. vcfg->tti.uec_b = TTI_T1A_TX_UFC_B;
  1725. vcfg->tti.uec_c = TTI_T1A_TX_UFC_C(vdev->mtu);
  1726. vcfg->tti.uec_d = TTI_T1A_TX_UFC_D(vdev->mtu);
  1727. vcfg->tti.ltimer_val = VXGE_T1A_TTI_LTIMER_VAL;
  1728. vcfg->tti.rtimer_val = VXGE_T1A_TTI_RTIMER_VAL;
  1729. }
  1730. attr.vp_id = vpath->device_id;
  1731. attr.fifo_attr.callback = vxge_xmit_compl;
  1732. attr.fifo_attr.txdl_term = vxge_tx_term;
  1733. attr.fifo_attr.per_txdl_space = sizeof(struct vxge_tx_priv);
  1734. attr.fifo_attr.userdata = &vpath->fifo;
  1735. attr.ring_attr.callback = vxge_rx_1b_compl;
  1736. attr.ring_attr.rxd_init = vxge_rx_initial_replenish;
  1737. attr.ring_attr.rxd_term = vxge_rx_term;
  1738. attr.ring_attr.per_rxd_space = sizeof(struct vxge_rx_priv);
  1739. attr.ring_attr.userdata = &vpath->ring;
  1740. vpath->ring.ndev = vdev->ndev;
  1741. vpath->ring.pdev = vdev->pdev;
  1742. status = vxge_hw_vpath_open(vdev->devh, &attr, &vpath->handle);
  1743. if (status == VXGE_HW_OK) {
  1744. vpath->fifo.handle =
  1745. (struct __vxge_hw_fifo *)attr.fifo_attr.userdata;
  1746. vpath->ring.handle =
  1747. (struct __vxge_hw_ring *)attr.ring_attr.userdata;
  1748. vpath->fifo.tx_steering_type =
  1749. vdev->config.tx_steering_type;
  1750. vpath->fifo.ndev = vdev->ndev;
  1751. vpath->fifo.pdev = vdev->pdev;
  1752. u64_stats_init(&vpath->fifo.stats.syncp);
  1753. u64_stats_init(&vpath->ring.stats.syncp);
  1754. if (vdev->config.tx_steering_type)
  1755. vpath->fifo.txq =
  1756. netdev_get_tx_queue(vdev->ndev, i);
  1757. else
  1758. vpath->fifo.txq =
  1759. netdev_get_tx_queue(vdev->ndev, 0);
  1760. vpath->fifo.indicate_max_pkts =
  1761. vdev->config.fifo_indicate_max_pkts;
  1762. vpath->fifo.tx_vector_no = 0;
  1763. vpath->ring.rx_vector_no = 0;
  1764. vpath->ring.rx_hwts = vdev->rx_hwts;
  1765. vpath->is_open = 1;
  1766. vdev->vp_handles[i] = vpath->handle;
  1767. vpath->ring.vlan_tag_strip = vdev->vlan_tag_strip;
  1768. vdev->stats.vpaths_open++;
  1769. } else {
  1770. vdev->stats.vpath_open_fail++;
  1771. vxge_debug_init(VXGE_ERR, "%s: vpath: %d failed to "
  1772. "open with status: %d",
  1773. vdev->ndev->name, vpath->device_id,
  1774. status);
  1775. vxge_close_vpaths(vdev, 0);
  1776. return -EPERM;
  1777. }
  1778. vp_id = vpath->handle->vpath->vp_id;
  1779. vdev->vpaths_deployed |= vxge_mBIT(vp_id);
  1780. }
  1781. return VXGE_HW_OK;
  1782. }
  1783. /**
  1784. * adaptive_coalesce_tx_interrupts - Changes the interrupt coalescing
  1785. * if the interrupts are not within a range
  1786. * @fifo: pointer to transmit fifo structure
  1787. * Description: The function changes boundary timer and restriction timer
  1788. * value depends on the traffic
  1789. * Return Value: None
  1790. */
  1791. static void adaptive_coalesce_tx_interrupts(struct vxge_fifo *fifo)
  1792. {
  1793. fifo->interrupt_count++;
  1794. if (time_before(fifo->jiffies + HZ / 100, jiffies)) {
  1795. struct __vxge_hw_fifo *hw_fifo = fifo->handle;
  1796. fifo->jiffies = jiffies;
  1797. if (fifo->interrupt_count > VXGE_T1A_MAX_TX_INTERRUPT_COUNT &&
  1798. hw_fifo->rtimer != VXGE_TTI_RTIMER_ADAPT_VAL) {
  1799. hw_fifo->rtimer = VXGE_TTI_RTIMER_ADAPT_VAL;
  1800. vxge_hw_vpath_dynamic_tti_rtimer_set(hw_fifo);
  1801. } else if (hw_fifo->rtimer != 0) {
  1802. hw_fifo->rtimer = 0;
  1803. vxge_hw_vpath_dynamic_tti_rtimer_set(hw_fifo);
  1804. }
  1805. fifo->interrupt_count = 0;
  1806. }
  1807. }
  1808. /**
  1809. * adaptive_coalesce_rx_interrupts - Changes the interrupt coalescing
  1810. * if the interrupts are not within a range
  1811. * @ring: pointer to receive ring structure
  1812. * Description: The function increases of decreases the packet counts within
  1813. * the ranges of traffic utilization, if the interrupts due to this ring are
  1814. * not within a fixed range.
  1815. * Return Value: Nothing
  1816. */
  1817. static void adaptive_coalesce_rx_interrupts(struct vxge_ring *ring)
  1818. {
  1819. ring->interrupt_count++;
  1820. if (time_before(ring->jiffies + HZ / 100, jiffies)) {
  1821. struct __vxge_hw_ring *hw_ring = ring->handle;
  1822. ring->jiffies = jiffies;
  1823. if (ring->interrupt_count > VXGE_T1A_MAX_INTERRUPT_COUNT &&
  1824. hw_ring->rtimer != VXGE_RTI_RTIMER_ADAPT_VAL) {
  1825. hw_ring->rtimer = VXGE_RTI_RTIMER_ADAPT_VAL;
  1826. vxge_hw_vpath_dynamic_rti_rtimer_set(hw_ring);
  1827. } else if (hw_ring->rtimer != 0) {
  1828. hw_ring->rtimer = 0;
  1829. vxge_hw_vpath_dynamic_rti_rtimer_set(hw_ring);
  1830. }
  1831. ring->interrupt_count = 0;
  1832. }
  1833. }
  1834. /*
  1835. * vxge_isr_napi
  1836. * @irq: the irq of the device.
  1837. * @dev_id: a void pointer to the hldev structure of the Titan device
  1838. * @ptregs: pointer to the registers pushed on the stack.
  1839. *
  1840. * This function is the ISR handler of the device when napi is enabled. It
  1841. * identifies the reason for the interrupt and calls the relevant service
  1842. * routines.
  1843. */
  1844. static irqreturn_t vxge_isr_napi(int irq, void *dev_id)
  1845. {
  1846. struct net_device *dev;
  1847. struct __vxge_hw_device *hldev;
  1848. u64 reason;
  1849. enum vxge_hw_status status;
  1850. struct vxgedev *vdev = (struct vxgedev *)dev_id;
  1851. vxge_debug_intr(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  1852. dev = vdev->ndev;
  1853. hldev = pci_get_drvdata(vdev->pdev);
  1854. if (pci_channel_offline(vdev->pdev))
  1855. return IRQ_NONE;
  1856. if (unlikely(!is_vxge_card_up(vdev)))
  1857. return IRQ_HANDLED;
  1858. status = vxge_hw_device_begin_irq(hldev, vdev->exec_mode, &reason);
  1859. if (status == VXGE_HW_OK) {
  1860. vxge_hw_device_mask_all(hldev);
  1861. if (reason &
  1862. VXGE_HW_TITAN_GENERAL_INT_STATUS_VPATH_TRAFFIC_INT(
  1863. vdev->vpaths_deployed >>
  1864. (64 - VXGE_HW_MAX_VIRTUAL_PATHS))) {
  1865. vxge_hw_device_clear_tx_rx(hldev);
  1866. napi_schedule(&vdev->napi);
  1867. vxge_debug_intr(VXGE_TRACE,
  1868. "%s:%d Exiting...", __func__, __LINE__);
  1869. return IRQ_HANDLED;
  1870. } else
  1871. vxge_hw_device_unmask_all(hldev);
  1872. } else if (unlikely((status == VXGE_HW_ERR_VPATH) ||
  1873. (status == VXGE_HW_ERR_CRITICAL) ||
  1874. (status == VXGE_HW_ERR_FIFO))) {
  1875. vxge_hw_device_mask_all(hldev);
  1876. vxge_hw_device_flush_io(hldev);
  1877. return IRQ_HANDLED;
  1878. } else if (unlikely(status == VXGE_HW_ERR_SLOT_FREEZE))
  1879. return IRQ_HANDLED;
  1880. vxge_debug_intr(VXGE_TRACE, "%s:%d Exiting...", __func__, __LINE__);
  1881. return IRQ_NONE;
  1882. }
  1883. static irqreturn_t vxge_tx_msix_handle(int irq, void *dev_id)
  1884. {
  1885. struct vxge_fifo *fifo = (struct vxge_fifo *)dev_id;
  1886. adaptive_coalesce_tx_interrupts(fifo);
  1887. vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)fifo->handle,
  1888. fifo->tx_vector_no);
  1889. vxge_hw_channel_msix_clear((struct __vxge_hw_channel *)fifo->handle,
  1890. fifo->tx_vector_no);
  1891. VXGE_COMPLETE_VPATH_TX(fifo);
  1892. vxge_hw_channel_msix_unmask((struct __vxge_hw_channel *)fifo->handle,
  1893. fifo->tx_vector_no);
  1894. mmiowb();
  1895. return IRQ_HANDLED;
  1896. }
  1897. static irqreturn_t vxge_rx_msix_napi_handle(int irq, void *dev_id)
  1898. {
  1899. struct vxge_ring *ring = (struct vxge_ring *)dev_id;
  1900. adaptive_coalesce_rx_interrupts(ring);
  1901. vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)ring->handle,
  1902. ring->rx_vector_no);
  1903. vxge_hw_channel_msix_clear((struct __vxge_hw_channel *)ring->handle,
  1904. ring->rx_vector_no);
  1905. napi_schedule(&ring->napi);
  1906. return IRQ_HANDLED;
  1907. }
  1908. static irqreturn_t
  1909. vxge_alarm_msix_handle(int irq, void *dev_id)
  1910. {
  1911. int i;
  1912. enum vxge_hw_status status;
  1913. struct vxge_vpath *vpath = (struct vxge_vpath *)dev_id;
  1914. struct vxgedev *vdev = vpath->vdev;
  1915. int msix_id = (vpath->handle->vpath->vp_id *
  1916. VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
  1917. for (i = 0; i < vdev->no_of_vpath; i++) {
  1918. /* Reduce the chance of losing alarm interrupts by masking
  1919. * the vector. A pending bit will be set if an alarm is
  1920. * generated and on unmask the interrupt will be fired.
  1921. */
  1922. vxge_hw_vpath_msix_mask(vdev->vpaths[i].handle, msix_id);
  1923. vxge_hw_vpath_msix_clear(vdev->vpaths[i].handle, msix_id);
  1924. mmiowb();
  1925. status = vxge_hw_vpath_alarm_process(vdev->vpaths[i].handle,
  1926. vdev->exec_mode);
  1927. if (status == VXGE_HW_OK) {
  1928. vxge_hw_vpath_msix_unmask(vdev->vpaths[i].handle,
  1929. msix_id);
  1930. mmiowb();
  1931. continue;
  1932. }
  1933. vxge_debug_intr(VXGE_ERR,
  1934. "%s: vxge_hw_vpath_alarm_process failed %x ",
  1935. VXGE_DRIVER_NAME, status);
  1936. }
  1937. return IRQ_HANDLED;
  1938. }
  1939. static int vxge_alloc_msix(struct vxgedev *vdev)
  1940. {
  1941. int j, i, ret = 0;
  1942. int msix_intr_vect = 0, temp;
  1943. vdev->intr_cnt = 0;
  1944. start:
  1945. /* Tx/Rx MSIX Vectors count */
  1946. vdev->intr_cnt = vdev->no_of_vpath * 2;
  1947. /* Alarm MSIX Vectors count */
  1948. vdev->intr_cnt++;
  1949. vdev->entries = kcalloc(vdev->intr_cnt, sizeof(struct msix_entry),
  1950. GFP_KERNEL);
  1951. if (!vdev->entries) {
  1952. vxge_debug_init(VXGE_ERR,
  1953. "%s: memory allocation failed",
  1954. VXGE_DRIVER_NAME);
  1955. ret = -ENOMEM;
  1956. goto alloc_entries_failed;
  1957. }
  1958. vdev->vxge_entries = kcalloc(vdev->intr_cnt,
  1959. sizeof(struct vxge_msix_entry),
  1960. GFP_KERNEL);
  1961. if (!vdev->vxge_entries) {
  1962. vxge_debug_init(VXGE_ERR, "%s: memory allocation failed",
  1963. VXGE_DRIVER_NAME);
  1964. ret = -ENOMEM;
  1965. goto alloc_vxge_entries_failed;
  1966. }
  1967. for (i = 0, j = 0; i < vdev->no_of_vpath; i++) {
  1968. msix_intr_vect = i * VXGE_HW_VPATH_MSIX_ACTIVE;
  1969. /* Initialize the fifo vector */
  1970. vdev->entries[j].entry = msix_intr_vect;
  1971. vdev->vxge_entries[j].entry = msix_intr_vect;
  1972. vdev->vxge_entries[j].in_use = 0;
  1973. j++;
  1974. /* Initialize the ring vector */
  1975. vdev->entries[j].entry = msix_intr_vect + 1;
  1976. vdev->vxge_entries[j].entry = msix_intr_vect + 1;
  1977. vdev->vxge_entries[j].in_use = 0;
  1978. j++;
  1979. }
  1980. /* Initialize the alarm vector */
  1981. vdev->entries[j].entry = VXGE_ALARM_MSIX_ID;
  1982. vdev->vxge_entries[j].entry = VXGE_ALARM_MSIX_ID;
  1983. vdev->vxge_entries[j].in_use = 0;
  1984. ret = pci_enable_msix_range(vdev->pdev,
  1985. vdev->entries, 3, vdev->intr_cnt);
  1986. if (ret < 0) {
  1987. ret = -ENODEV;
  1988. goto enable_msix_failed;
  1989. } else if (ret < vdev->intr_cnt) {
  1990. pci_disable_msix(vdev->pdev);
  1991. vxge_debug_init(VXGE_ERR,
  1992. "%s: MSI-X enable failed for %d vectors, ret: %d",
  1993. VXGE_DRIVER_NAME, vdev->intr_cnt, ret);
  1994. if (max_config_vpath != VXGE_USE_DEFAULT) {
  1995. ret = -ENODEV;
  1996. goto enable_msix_failed;
  1997. }
  1998. kfree(vdev->entries);
  1999. kfree(vdev->vxge_entries);
  2000. vdev->entries = NULL;
  2001. vdev->vxge_entries = NULL;
  2002. /* Try with less no of vector by reducing no of vpaths count */
  2003. temp = (ret - 1)/2;
  2004. vxge_close_vpaths(vdev, temp);
  2005. vdev->no_of_vpath = temp;
  2006. goto start;
  2007. }
  2008. return 0;
  2009. enable_msix_failed:
  2010. kfree(vdev->vxge_entries);
  2011. alloc_vxge_entries_failed:
  2012. kfree(vdev->entries);
  2013. alloc_entries_failed:
  2014. return ret;
  2015. }
  2016. static int vxge_enable_msix(struct vxgedev *vdev)
  2017. {
  2018. int i, ret = 0;
  2019. /* 0 - Tx, 1 - Rx */
  2020. int tim_msix_id[4] = {0, 1, 0, 0};
  2021. vdev->intr_cnt = 0;
  2022. /* allocate msix vectors */
  2023. ret = vxge_alloc_msix(vdev);
  2024. if (!ret) {
  2025. for (i = 0; i < vdev->no_of_vpath; i++) {
  2026. struct vxge_vpath *vpath = &vdev->vpaths[i];
  2027. /* If fifo or ring are not enabled, the MSIX vector for
  2028. * it should be set to 0.
  2029. */
  2030. vpath->ring.rx_vector_no = (vpath->device_id *
  2031. VXGE_HW_VPATH_MSIX_ACTIVE) + 1;
  2032. vpath->fifo.tx_vector_no = (vpath->device_id *
  2033. VXGE_HW_VPATH_MSIX_ACTIVE);
  2034. vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
  2035. VXGE_ALARM_MSIX_ID);
  2036. }
  2037. }
  2038. return ret;
  2039. }
  2040. static void vxge_rem_msix_isr(struct vxgedev *vdev)
  2041. {
  2042. int intr_cnt;
  2043. for (intr_cnt = 0; intr_cnt < (vdev->no_of_vpath * 2 + 1);
  2044. intr_cnt++) {
  2045. if (vdev->vxge_entries[intr_cnt].in_use) {
  2046. synchronize_irq(vdev->entries[intr_cnt].vector);
  2047. free_irq(vdev->entries[intr_cnt].vector,
  2048. vdev->vxge_entries[intr_cnt].arg);
  2049. vdev->vxge_entries[intr_cnt].in_use = 0;
  2050. }
  2051. }
  2052. kfree(vdev->entries);
  2053. kfree(vdev->vxge_entries);
  2054. vdev->entries = NULL;
  2055. vdev->vxge_entries = NULL;
  2056. if (vdev->config.intr_type == MSI_X)
  2057. pci_disable_msix(vdev->pdev);
  2058. }
  2059. static void vxge_rem_isr(struct vxgedev *vdev)
  2060. {
  2061. if (IS_ENABLED(CONFIG_PCI_MSI) &&
  2062. vdev->config.intr_type == MSI_X) {
  2063. vxge_rem_msix_isr(vdev);
  2064. } else if (vdev->config.intr_type == INTA) {
  2065. synchronize_irq(vdev->pdev->irq);
  2066. free_irq(vdev->pdev->irq, vdev);
  2067. }
  2068. }
  2069. static int vxge_add_isr(struct vxgedev *vdev)
  2070. {
  2071. int ret = 0;
  2072. int vp_idx = 0, intr_idx = 0, intr_cnt = 0, msix_idx = 0, irq_req = 0;
  2073. int pci_fun = PCI_FUNC(vdev->pdev->devfn);
  2074. if (IS_ENABLED(CONFIG_PCI_MSI) && vdev->config.intr_type == MSI_X)
  2075. ret = vxge_enable_msix(vdev);
  2076. if (ret) {
  2077. vxge_debug_init(VXGE_ERR,
  2078. "%s: Enabling MSI-X Failed", VXGE_DRIVER_NAME);
  2079. vxge_debug_init(VXGE_ERR,
  2080. "%s: Defaulting to INTA", VXGE_DRIVER_NAME);
  2081. vdev->config.intr_type = INTA;
  2082. }
  2083. if (IS_ENABLED(CONFIG_PCI_MSI) && vdev->config.intr_type == MSI_X) {
  2084. for (intr_idx = 0;
  2085. intr_idx < (vdev->no_of_vpath *
  2086. VXGE_HW_VPATH_MSIX_ACTIVE); intr_idx++) {
  2087. msix_idx = intr_idx % VXGE_HW_VPATH_MSIX_ACTIVE;
  2088. irq_req = 0;
  2089. switch (msix_idx) {
  2090. case 0:
  2091. snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
  2092. "%s:vxge:MSI-X %d - Tx - fn:%d vpath:%d",
  2093. vdev->ndev->name,
  2094. vdev->entries[intr_cnt].entry,
  2095. pci_fun, vp_idx);
  2096. ret = request_irq(
  2097. vdev->entries[intr_cnt].vector,
  2098. vxge_tx_msix_handle, 0,
  2099. vdev->desc[intr_cnt],
  2100. &vdev->vpaths[vp_idx].fifo);
  2101. vdev->vxge_entries[intr_cnt].arg =
  2102. &vdev->vpaths[vp_idx].fifo;
  2103. irq_req = 1;
  2104. break;
  2105. case 1:
  2106. snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
  2107. "%s:vxge:MSI-X %d - Rx - fn:%d vpath:%d",
  2108. vdev->ndev->name,
  2109. vdev->entries[intr_cnt].entry,
  2110. pci_fun, vp_idx);
  2111. ret = request_irq(
  2112. vdev->entries[intr_cnt].vector,
  2113. vxge_rx_msix_napi_handle,
  2114. 0,
  2115. vdev->desc[intr_cnt],
  2116. &vdev->vpaths[vp_idx].ring);
  2117. vdev->vxge_entries[intr_cnt].arg =
  2118. &vdev->vpaths[vp_idx].ring;
  2119. irq_req = 1;
  2120. break;
  2121. }
  2122. if (ret) {
  2123. vxge_debug_init(VXGE_ERR,
  2124. "%s: MSIX - %d Registration failed",
  2125. vdev->ndev->name, intr_cnt);
  2126. vxge_rem_msix_isr(vdev);
  2127. vdev->config.intr_type = INTA;
  2128. vxge_debug_init(VXGE_ERR,
  2129. "%s: Defaulting to INTA"
  2130. , vdev->ndev->name);
  2131. goto INTA_MODE;
  2132. }
  2133. if (irq_req) {
  2134. /* We requested for this msix interrupt */
  2135. vdev->vxge_entries[intr_cnt].in_use = 1;
  2136. msix_idx += vdev->vpaths[vp_idx].device_id *
  2137. VXGE_HW_VPATH_MSIX_ACTIVE;
  2138. vxge_hw_vpath_msix_unmask(
  2139. vdev->vpaths[vp_idx].handle,
  2140. msix_idx);
  2141. intr_cnt++;
  2142. }
  2143. /* Point to next vpath handler */
  2144. if (((intr_idx + 1) % VXGE_HW_VPATH_MSIX_ACTIVE == 0) &&
  2145. (vp_idx < (vdev->no_of_vpath - 1)))
  2146. vp_idx++;
  2147. }
  2148. intr_cnt = vdev->no_of_vpath * 2;
  2149. snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
  2150. "%s:vxge:MSI-X %d - Alarm - fn:%d",
  2151. vdev->ndev->name,
  2152. vdev->entries[intr_cnt].entry,
  2153. pci_fun);
  2154. /* For Alarm interrupts */
  2155. ret = request_irq(vdev->entries[intr_cnt].vector,
  2156. vxge_alarm_msix_handle, 0,
  2157. vdev->desc[intr_cnt],
  2158. &vdev->vpaths[0]);
  2159. if (ret) {
  2160. vxge_debug_init(VXGE_ERR,
  2161. "%s: MSIX - %d Registration failed",
  2162. vdev->ndev->name, intr_cnt);
  2163. vxge_rem_msix_isr(vdev);
  2164. vdev->config.intr_type = INTA;
  2165. vxge_debug_init(VXGE_ERR,
  2166. "%s: Defaulting to INTA",
  2167. vdev->ndev->name);
  2168. goto INTA_MODE;
  2169. }
  2170. msix_idx = (vdev->vpaths[0].handle->vpath->vp_id *
  2171. VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
  2172. vxge_hw_vpath_msix_unmask(vdev->vpaths[vp_idx].handle,
  2173. msix_idx);
  2174. vdev->vxge_entries[intr_cnt].in_use = 1;
  2175. vdev->vxge_entries[intr_cnt].arg = &vdev->vpaths[0];
  2176. }
  2177. INTA_MODE:
  2178. if (vdev->config.intr_type == INTA) {
  2179. snprintf(vdev->desc[0], VXGE_INTR_STRLEN,
  2180. "%s:vxge:INTA", vdev->ndev->name);
  2181. vxge_hw_device_set_intr_type(vdev->devh,
  2182. VXGE_HW_INTR_MODE_IRQLINE);
  2183. vxge_hw_vpath_tti_ci_set(vdev->vpaths[0].fifo.handle);
  2184. ret = request_irq((int) vdev->pdev->irq,
  2185. vxge_isr_napi,
  2186. IRQF_SHARED, vdev->desc[0], vdev);
  2187. if (ret) {
  2188. vxge_debug_init(VXGE_ERR,
  2189. "%s %s-%d: ISR registration failed",
  2190. VXGE_DRIVER_NAME, "IRQ", vdev->pdev->irq);
  2191. return -ENODEV;
  2192. }
  2193. vxge_debug_init(VXGE_TRACE,
  2194. "new %s-%d line allocated",
  2195. "IRQ", vdev->pdev->irq);
  2196. }
  2197. return VXGE_HW_OK;
  2198. }
  2199. static void vxge_poll_vp_reset(unsigned long data)
  2200. {
  2201. struct vxgedev *vdev = (struct vxgedev *)data;
  2202. int i, j = 0;
  2203. for (i = 0; i < vdev->no_of_vpath; i++) {
  2204. if (test_bit(i, &vdev->vp_reset)) {
  2205. vxge_reset_vpath(vdev, i);
  2206. j++;
  2207. }
  2208. }
  2209. if (j && (vdev->config.intr_type != MSI_X)) {
  2210. vxge_hw_device_unmask_all(vdev->devh);
  2211. vxge_hw_device_flush_io(vdev->devh);
  2212. }
  2213. mod_timer(&vdev->vp_reset_timer, jiffies + HZ / 2);
  2214. }
  2215. static void vxge_poll_vp_lockup(unsigned long data)
  2216. {
  2217. struct vxgedev *vdev = (struct vxgedev *)data;
  2218. enum vxge_hw_status status = VXGE_HW_OK;
  2219. struct vxge_vpath *vpath;
  2220. struct vxge_ring *ring;
  2221. int i;
  2222. unsigned long rx_frms;
  2223. for (i = 0; i < vdev->no_of_vpath; i++) {
  2224. ring = &vdev->vpaths[i].ring;
  2225. /* Truncated to machine word size number of frames */
  2226. rx_frms = ACCESS_ONCE(ring->stats.rx_frms);
  2227. /* Did this vpath received any packets */
  2228. if (ring->stats.prev_rx_frms == rx_frms) {
  2229. status = vxge_hw_vpath_check_leak(ring->handle);
  2230. /* Did it received any packets last time */
  2231. if ((VXGE_HW_FAIL == status) &&
  2232. (VXGE_HW_FAIL == ring->last_status)) {
  2233. /* schedule vpath reset */
  2234. if (!test_and_set_bit(i, &vdev->vp_reset)) {
  2235. vpath = &vdev->vpaths[i];
  2236. /* disable interrupts for this vpath */
  2237. vxge_vpath_intr_disable(vdev, i);
  2238. /* stop the queue for this vpath */
  2239. netif_tx_stop_queue(vpath->fifo.txq);
  2240. continue;
  2241. }
  2242. }
  2243. }
  2244. ring->stats.prev_rx_frms = rx_frms;
  2245. ring->last_status = status;
  2246. }
  2247. /* Check every 1 milli second */
  2248. mod_timer(&vdev->vp_lockup_timer, jiffies + HZ / 1000);
  2249. }
  2250. static netdev_features_t vxge_fix_features(struct net_device *dev,
  2251. netdev_features_t features)
  2252. {
  2253. netdev_features_t changed = dev->features ^ features;
  2254. /* Enabling RTH requires some of the logic in vxge_device_register and a
  2255. * vpath reset. Due to these restrictions, only allow modification
  2256. * while the interface is down.
  2257. */
  2258. if ((changed & NETIF_F_RXHASH) && netif_running(dev))
  2259. features ^= NETIF_F_RXHASH;
  2260. return features;
  2261. }
  2262. static int vxge_set_features(struct net_device *dev, netdev_features_t features)
  2263. {
  2264. struct vxgedev *vdev = netdev_priv(dev);
  2265. netdev_features_t changed = dev->features ^ features;
  2266. if (!(changed & NETIF_F_RXHASH))
  2267. return 0;
  2268. /* !netif_running() ensured by vxge_fix_features() */
  2269. vdev->devh->config.rth_en = !!(features & NETIF_F_RXHASH);
  2270. if (vxge_reset_all_vpaths(vdev) != VXGE_HW_OK) {
  2271. dev->features = features ^ NETIF_F_RXHASH;
  2272. vdev->devh->config.rth_en = !!(dev->features & NETIF_F_RXHASH);
  2273. return -EIO;
  2274. }
  2275. return 0;
  2276. }
  2277. /**
  2278. * vxge_open
  2279. * @dev: pointer to the device structure.
  2280. *
  2281. * This function is the open entry point of the driver. It mainly calls a
  2282. * function to allocate Rx buffers and inserts them into the buffer
  2283. * descriptors and then enables the Rx part of the NIC.
  2284. * Return value: '0' on success and an appropriate (-)ve integer as
  2285. * defined in errno.h file on failure.
  2286. */
  2287. static int vxge_open(struct net_device *dev)
  2288. {
  2289. enum vxge_hw_status status;
  2290. struct vxgedev *vdev;
  2291. struct __vxge_hw_device *hldev;
  2292. struct vxge_vpath *vpath;
  2293. int ret = 0;
  2294. int i;
  2295. u64 val64, function_mode;
  2296. vxge_debug_entryexit(VXGE_TRACE,
  2297. "%s: %s:%d", dev->name, __func__, __LINE__);
  2298. vdev = netdev_priv(dev);
  2299. hldev = pci_get_drvdata(vdev->pdev);
  2300. function_mode = vdev->config.device_hw_info.function_mode;
  2301. /* make sure you have link off by default every time Nic is
  2302. * initialized */
  2303. netif_carrier_off(dev);
  2304. /* Open VPATHs */
  2305. status = vxge_open_vpaths(vdev);
  2306. if (status != VXGE_HW_OK) {
  2307. vxge_debug_init(VXGE_ERR,
  2308. "%s: fatal: Vpath open failed", vdev->ndev->name);
  2309. ret = -EPERM;
  2310. goto out0;
  2311. }
  2312. vdev->mtu = dev->mtu;
  2313. status = vxge_add_isr(vdev);
  2314. if (status != VXGE_HW_OK) {
  2315. vxge_debug_init(VXGE_ERR,
  2316. "%s: fatal: ISR add failed", dev->name);
  2317. ret = -EPERM;
  2318. goto out1;
  2319. }
  2320. if (vdev->config.intr_type != MSI_X) {
  2321. netif_napi_add(dev, &vdev->napi, vxge_poll_inta,
  2322. vdev->config.napi_weight);
  2323. napi_enable(&vdev->napi);
  2324. for (i = 0; i < vdev->no_of_vpath; i++) {
  2325. vpath = &vdev->vpaths[i];
  2326. vpath->ring.napi_p = &vdev->napi;
  2327. }
  2328. } else {
  2329. for (i = 0; i < vdev->no_of_vpath; i++) {
  2330. vpath = &vdev->vpaths[i];
  2331. netif_napi_add(dev, &vpath->ring.napi,
  2332. vxge_poll_msix, vdev->config.napi_weight);
  2333. napi_enable(&vpath->ring.napi);
  2334. vpath->ring.napi_p = &vpath->ring.napi;
  2335. }
  2336. }
  2337. /* configure RTH */
  2338. if (vdev->config.rth_steering) {
  2339. status = vxge_rth_configure(vdev);
  2340. if (status != VXGE_HW_OK) {
  2341. vxge_debug_init(VXGE_ERR,
  2342. "%s: fatal: RTH configuration failed",
  2343. dev->name);
  2344. ret = -EPERM;
  2345. goto out2;
  2346. }
  2347. }
  2348. printk(KERN_INFO "%s: Receive Hashing Offload %s\n", dev->name,
  2349. hldev->config.rth_en ? "enabled" : "disabled");
  2350. for (i = 0; i < vdev->no_of_vpath; i++) {
  2351. vpath = &vdev->vpaths[i];
  2352. /* set initial mtu before enabling the device */
  2353. status = vxge_hw_vpath_mtu_set(vpath->handle, vdev->mtu);
  2354. if (status != VXGE_HW_OK) {
  2355. vxge_debug_init(VXGE_ERR,
  2356. "%s: fatal: can not set new MTU", dev->name);
  2357. ret = -EPERM;
  2358. goto out2;
  2359. }
  2360. }
  2361. VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_TRACE, VXGE_COMPONENT_LL, vdev);
  2362. vxge_debug_init(vdev->level_trace,
  2363. "%s: MTU is %d", vdev->ndev->name, vdev->mtu);
  2364. VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_ERR, VXGE_COMPONENT_LL, vdev);
  2365. /* Restore the DA, VID table and also multicast and promiscuous mode
  2366. * states
  2367. */
  2368. if (vdev->all_multi_flg) {
  2369. for (i = 0; i < vdev->no_of_vpath; i++) {
  2370. vpath = &vdev->vpaths[i];
  2371. vxge_restore_vpath_mac_addr(vpath);
  2372. vxge_restore_vpath_vid_table(vpath);
  2373. status = vxge_hw_vpath_mcast_enable(vpath->handle);
  2374. if (status != VXGE_HW_OK)
  2375. vxge_debug_init(VXGE_ERR,
  2376. "%s:%d Enabling multicast failed",
  2377. __func__, __LINE__);
  2378. }
  2379. }
  2380. /* Enable vpath to sniff all unicast/multicast traffic that not
  2381. * addressed to them. We allow promiscuous mode for PF only
  2382. */
  2383. val64 = 0;
  2384. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
  2385. val64 |= VXGE_HW_RXMAC_AUTHORIZE_ALL_ADDR_VP(i);
  2386. vxge_hw_mgmt_reg_write(vdev->devh,
  2387. vxge_hw_mgmt_reg_type_mrpcim,
  2388. 0,
  2389. (ulong)offsetof(struct vxge_hw_mrpcim_reg,
  2390. rxmac_authorize_all_addr),
  2391. val64);
  2392. vxge_hw_mgmt_reg_write(vdev->devh,
  2393. vxge_hw_mgmt_reg_type_mrpcim,
  2394. 0,
  2395. (ulong)offsetof(struct vxge_hw_mrpcim_reg,
  2396. rxmac_authorize_all_vid),
  2397. val64);
  2398. vxge_set_multicast(dev);
  2399. /* Enabling Bcast and mcast for all vpath */
  2400. for (i = 0; i < vdev->no_of_vpath; i++) {
  2401. vpath = &vdev->vpaths[i];
  2402. status = vxge_hw_vpath_bcast_enable(vpath->handle);
  2403. if (status != VXGE_HW_OK)
  2404. vxge_debug_init(VXGE_ERR,
  2405. "%s : Can not enable bcast for vpath "
  2406. "id %d", dev->name, i);
  2407. if (vdev->config.addr_learn_en) {
  2408. status = vxge_hw_vpath_mcast_enable(vpath->handle);
  2409. if (status != VXGE_HW_OK)
  2410. vxge_debug_init(VXGE_ERR,
  2411. "%s : Can not enable mcast for vpath "
  2412. "id %d", dev->name, i);
  2413. }
  2414. }
  2415. vxge_hw_device_setpause_data(vdev->devh, 0,
  2416. vdev->config.tx_pause_enable,
  2417. vdev->config.rx_pause_enable);
  2418. if (vdev->vp_reset_timer.function == NULL)
  2419. vxge_os_timer(&vdev->vp_reset_timer, vxge_poll_vp_reset, vdev,
  2420. HZ / 2);
  2421. /* There is no need to check for RxD leak and RxD lookup on Titan1A */
  2422. if (vdev->titan1 && vdev->vp_lockup_timer.function == NULL)
  2423. vxge_os_timer(&vdev->vp_lockup_timer, vxge_poll_vp_lockup, vdev,
  2424. HZ / 2);
  2425. set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  2426. smp_wmb();
  2427. if (vxge_hw_device_link_state_get(vdev->devh) == VXGE_HW_LINK_UP) {
  2428. netif_carrier_on(vdev->ndev);
  2429. netdev_notice(vdev->ndev, "Link Up\n");
  2430. vdev->stats.link_up++;
  2431. }
  2432. vxge_hw_device_intr_enable(vdev->devh);
  2433. smp_wmb();
  2434. for (i = 0; i < vdev->no_of_vpath; i++) {
  2435. vpath = &vdev->vpaths[i];
  2436. vxge_hw_vpath_enable(vpath->handle);
  2437. smp_wmb();
  2438. vxge_hw_vpath_rx_doorbell_init(vpath->handle);
  2439. }
  2440. netif_tx_start_all_queues(vdev->ndev);
  2441. /* configure CI */
  2442. vxge_config_ci_for_tti_rti(vdev);
  2443. goto out0;
  2444. out2:
  2445. vxge_rem_isr(vdev);
  2446. /* Disable napi */
  2447. if (vdev->config.intr_type != MSI_X)
  2448. napi_disable(&vdev->napi);
  2449. else {
  2450. for (i = 0; i < vdev->no_of_vpath; i++)
  2451. napi_disable(&vdev->vpaths[i].ring.napi);
  2452. }
  2453. out1:
  2454. vxge_close_vpaths(vdev, 0);
  2455. out0:
  2456. vxge_debug_entryexit(VXGE_TRACE,
  2457. "%s: %s:%d Exiting...",
  2458. dev->name, __func__, __LINE__);
  2459. return ret;
  2460. }
  2461. /* Loop through the mac address list and delete all the entries */
  2462. static void vxge_free_mac_add_list(struct vxge_vpath *vpath)
  2463. {
  2464. struct list_head *entry, *next;
  2465. if (list_empty(&vpath->mac_addr_list))
  2466. return;
  2467. list_for_each_safe(entry, next, &vpath->mac_addr_list) {
  2468. list_del(entry);
  2469. kfree((struct vxge_mac_addrs *)entry);
  2470. }
  2471. }
  2472. static void vxge_napi_del_all(struct vxgedev *vdev)
  2473. {
  2474. int i;
  2475. if (vdev->config.intr_type != MSI_X)
  2476. netif_napi_del(&vdev->napi);
  2477. else {
  2478. for (i = 0; i < vdev->no_of_vpath; i++)
  2479. netif_napi_del(&vdev->vpaths[i].ring.napi);
  2480. }
  2481. }
  2482. static int do_vxge_close(struct net_device *dev, int do_io)
  2483. {
  2484. enum vxge_hw_status status;
  2485. struct vxgedev *vdev;
  2486. struct __vxge_hw_device *hldev;
  2487. int i;
  2488. u64 val64, vpath_vector;
  2489. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  2490. dev->name, __func__, __LINE__);
  2491. vdev = netdev_priv(dev);
  2492. hldev = pci_get_drvdata(vdev->pdev);
  2493. if (unlikely(!is_vxge_card_up(vdev)))
  2494. return 0;
  2495. /* If vxge_handle_crit_err task is executing,
  2496. * wait till it completes. */
  2497. while (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
  2498. msleep(50);
  2499. if (do_io) {
  2500. /* Put the vpath back in normal mode */
  2501. vpath_vector = vxge_mBIT(vdev->vpaths[0].device_id);
  2502. status = vxge_hw_mgmt_reg_read(vdev->devh,
  2503. vxge_hw_mgmt_reg_type_mrpcim,
  2504. 0,
  2505. (ulong)offsetof(
  2506. struct vxge_hw_mrpcim_reg,
  2507. rts_mgr_cbasin_cfg),
  2508. &val64);
  2509. if (status == VXGE_HW_OK) {
  2510. val64 &= ~vpath_vector;
  2511. status = vxge_hw_mgmt_reg_write(vdev->devh,
  2512. vxge_hw_mgmt_reg_type_mrpcim,
  2513. 0,
  2514. (ulong)offsetof(
  2515. struct vxge_hw_mrpcim_reg,
  2516. rts_mgr_cbasin_cfg),
  2517. val64);
  2518. }
  2519. /* Remove the function 0 from promiscuous mode */
  2520. vxge_hw_mgmt_reg_write(vdev->devh,
  2521. vxge_hw_mgmt_reg_type_mrpcim,
  2522. 0,
  2523. (ulong)offsetof(struct vxge_hw_mrpcim_reg,
  2524. rxmac_authorize_all_addr),
  2525. 0);
  2526. vxge_hw_mgmt_reg_write(vdev->devh,
  2527. vxge_hw_mgmt_reg_type_mrpcim,
  2528. 0,
  2529. (ulong)offsetof(struct vxge_hw_mrpcim_reg,
  2530. rxmac_authorize_all_vid),
  2531. 0);
  2532. smp_wmb();
  2533. }
  2534. if (vdev->titan1)
  2535. del_timer_sync(&vdev->vp_lockup_timer);
  2536. del_timer_sync(&vdev->vp_reset_timer);
  2537. if (do_io)
  2538. vxge_hw_device_wait_receive_idle(hldev);
  2539. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  2540. /* Disable napi */
  2541. if (vdev->config.intr_type != MSI_X)
  2542. napi_disable(&vdev->napi);
  2543. else {
  2544. for (i = 0; i < vdev->no_of_vpath; i++)
  2545. napi_disable(&vdev->vpaths[i].ring.napi);
  2546. }
  2547. netif_carrier_off(vdev->ndev);
  2548. netdev_notice(vdev->ndev, "Link Down\n");
  2549. netif_tx_stop_all_queues(vdev->ndev);
  2550. /* Note that at this point xmit() is stopped by upper layer */
  2551. if (do_io)
  2552. vxge_hw_device_intr_disable(vdev->devh);
  2553. vxge_rem_isr(vdev);
  2554. vxge_napi_del_all(vdev);
  2555. if (do_io)
  2556. vxge_reset_all_vpaths(vdev);
  2557. vxge_close_vpaths(vdev, 0);
  2558. vxge_debug_entryexit(VXGE_TRACE,
  2559. "%s: %s:%d Exiting...", dev->name, __func__, __LINE__);
  2560. clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
  2561. return 0;
  2562. }
  2563. /**
  2564. * vxge_close
  2565. * @dev: device pointer.
  2566. *
  2567. * This is the stop entry point of the driver. It needs to undo exactly
  2568. * whatever was done by the open entry point, thus it's usually referred to
  2569. * as the close function.Among other things this function mainly stops the
  2570. * Rx side of the NIC and frees all the Rx buffers in the Rx rings.
  2571. * Return value: '0' on success and an appropriate (-)ve integer as
  2572. * defined in errno.h file on failure.
  2573. */
  2574. static int vxge_close(struct net_device *dev)
  2575. {
  2576. do_vxge_close(dev, 1);
  2577. return 0;
  2578. }
  2579. /**
  2580. * vxge_change_mtu
  2581. * @dev: net device pointer.
  2582. * @new_mtu :the new MTU size for the device.
  2583. *
  2584. * A driver entry point to change MTU size for the device. Before changing
  2585. * the MTU the device must be stopped.
  2586. */
  2587. static int vxge_change_mtu(struct net_device *dev, int new_mtu)
  2588. {
  2589. struct vxgedev *vdev = netdev_priv(dev);
  2590. vxge_debug_entryexit(vdev->level_trace,
  2591. "%s:%d", __func__, __LINE__);
  2592. if ((new_mtu < VXGE_HW_MIN_MTU) || (new_mtu > VXGE_HW_MAX_MTU)) {
  2593. vxge_debug_init(vdev->level_err,
  2594. "%s: mtu size is invalid", dev->name);
  2595. return -EPERM;
  2596. }
  2597. /* check if device is down already */
  2598. if (unlikely(!is_vxge_card_up(vdev))) {
  2599. /* just store new value, will use later on open() */
  2600. dev->mtu = new_mtu;
  2601. vxge_debug_init(vdev->level_err,
  2602. "%s", "device is down on MTU change");
  2603. return 0;
  2604. }
  2605. vxge_debug_init(vdev->level_trace,
  2606. "trying to apply new MTU %d", new_mtu);
  2607. if (vxge_close(dev))
  2608. return -EIO;
  2609. dev->mtu = new_mtu;
  2610. vdev->mtu = new_mtu;
  2611. if (vxge_open(dev))
  2612. return -EIO;
  2613. vxge_debug_init(vdev->level_trace,
  2614. "%s: MTU changed to %d", vdev->ndev->name, new_mtu);
  2615. vxge_debug_entryexit(vdev->level_trace,
  2616. "%s:%d Exiting...", __func__, __LINE__);
  2617. return 0;
  2618. }
  2619. /**
  2620. * vxge_get_stats64
  2621. * @dev: pointer to the device structure
  2622. * @stats: pointer to struct rtnl_link_stats64
  2623. *
  2624. */
  2625. static struct rtnl_link_stats64 *
  2626. vxge_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *net_stats)
  2627. {
  2628. struct vxgedev *vdev = netdev_priv(dev);
  2629. int k;
  2630. /* net_stats already zeroed by caller */
  2631. for (k = 0; k < vdev->no_of_vpath; k++) {
  2632. struct vxge_ring_stats *rxstats = &vdev->vpaths[k].ring.stats;
  2633. struct vxge_fifo_stats *txstats = &vdev->vpaths[k].fifo.stats;
  2634. unsigned int start;
  2635. u64 packets, bytes, multicast;
  2636. do {
  2637. start = u64_stats_fetch_begin_irq(&rxstats->syncp);
  2638. packets = rxstats->rx_frms;
  2639. multicast = rxstats->rx_mcast;
  2640. bytes = rxstats->rx_bytes;
  2641. } while (u64_stats_fetch_retry_irq(&rxstats->syncp, start));
  2642. net_stats->rx_packets += packets;
  2643. net_stats->rx_bytes += bytes;
  2644. net_stats->multicast += multicast;
  2645. net_stats->rx_errors += rxstats->rx_errors;
  2646. net_stats->rx_dropped += rxstats->rx_dropped;
  2647. do {
  2648. start = u64_stats_fetch_begin_irq(&txstats->syncp);
  2649. packets = txstats->tx_frms;
  2650. bytes = txstats->tx_bytes;
  2651. } while (u64_stats_fetch_retry_irq(&txstats->syncp, start));
  2652. net_stats->tx_packets += packets;
  2653. net_stats->tx_bytes += bytes;
  2654. net_stats->tx_errors += txstats->tx_errors;
  2655. }
  2656. return net_stats;
  2657. }
  2658. static enum vxge_hw_status vxge_timestamp_config(struct __vxge_hw_device *devh)
  2659. {
  2660. enum vxge_hw_status status;
  2661. u64 val64;
  2662. /* Timestamp is passed to the driver via the FCS, therefore we
  2663. * must disable the FCS stripping by the adapter. Since this is
  2664. * required for the driver to load (due to a hardware bug),
  2665. * there is no need to do anything special here.
  2666. */
  2667. val64 = VXGE_HW_XMAC_TIMESTAMP_EN |
  2668. VXGE_HW_XMAC_TIMESTAMP_USE_LINK_ID(0) |
  2669. VXGE_HW_XMAC_TIMESTAMP_INTERVAL(0);
  2670. status = vxge_hw_mgmt_reg_write(devh,
  2671. vxge_hw_mgmt_reg_type_mrpcim,
  2672. 0,
  2673. offsetof(struct vxge_hw_mrpcim_reg,
  2674. xmac_timestamp),
  2675. val64);
  2676. vxge_hw_device_flush_io(devh);
  2677. devh->config.hwts_en = VXGE_HW_HWTS_ENABLE;
  2678. return status;
  2679. }
  2680. static int vxge_hwtstamp_set(struct vxgedev *vdev, void __user *data)
  2681. {
  2682. struct hwtstamp_config config;
  2683. int i;
  2684. if (copy_from_user(&config, data, sizeof(config)))
  2685. return -EFAULT;
  2686. /* reserved for future extensions */
  2687. if (config.flags)
  2688. return -EINVAL;
  2689. /* Transmit HW Timestamp not supported */
  2690. switch (config.tx_type) {
  2691. case HWTSTAMP_TX_OFF:
  2692. break;
  2693. case HWTSTAMP_TX_ON:
  2694. default:
  2695. return -ERANGE;
  2696. }
  2697. switch (config.rx_filter) {
  2698. case HWTSTAMP_FILTER_NONE:
  2699. vdev->rx_hwts = 0;
  2700. config.rx_filter = HWTSTAMP_FILTER_NONE;
  2701. break;
  2702. case HWTSTAMP_FILTER_ALL:
  2703. case HWTSTAMP_FILTER_SOME:
  2704. case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
  2705. case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
  2706. case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
  2707. case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
  2708. case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
  2709. case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
  2710. case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
  2711. case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
  2712. case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
  2713. case HWTSTAMP_FILTER_PTP_V2_EVENT:
  2714. case HWTSTAMP_FILTER_PTP_V2_SYNC:
  2715. case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
  2716. if (vdev->devh->config.hwts_en != VXGE_HW_HWTS_ENABLE)
  2717. return -EFAULT;
  2718. vdev->rx_hwts = 1;
  2719. config.rx_filter = HWTSTAMP_FILTER_ALL;
  2720. break;
  2721. default:
  2722. return -ERANGE;
  2723. }
  2724. for (i = 0; i < vdev->no_of_vpath; i++)
  2725. vdev->vpaths[i].ring.rx_hwts = vdev->rx_hwts;
  2726. if (copy_to_user(data, &config, sizeof(config)))
  2727. return -EFAULT;
  2728. return 0;
  2729. }
  2730. static int vxge_hwtstamp_get(struct vxgedev *vdev, void __user *data)
  2731. {
  2732. struct hwtstamp_config config;
  2733. config.flags = 0;
  2734. config.tx_type = HWTSTAMP_TX_OFF;
  2735. config.rx_filter = (vdev->rx_hwts ?
  2736. HWTSTAMP_FILTER_ALL : HWTSTAMP_FILTER_NONE);
  2737. if (copy_to_user(data, &config, sizeof(config)))
  2738. return -EFAULT;
  2739. return 0;
  2740. }
  2741. /**
  2742. * vxge_ioctl
  2743. * @dev: Device pointer.
  2744. * @ifr: An IOCTL specific structure, that can contain a pointer to
  2745. * a proprietary structure used to pass information to the driver.
  2746. * @cmd: This is used to distinguish between the different commands that
  2747. * can be passed to the IOCTL functions.
  2748. *
  2749. * Entry point for the Ioctl.
  2750. */
  2751. static int vxge_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  2752. {
  2753. struct vxgedev *vdev = netdev_priv(dev);
  2754. switch (cmd) {
  2755. case SIOCSHWTSTAMP:
  2756. return vxge_hwtstamp_set(vdev, rq->ifr_data);
  2757. case SIOCGHWTSTAMP:
  2758. return vxge_hwtstamp_get(vdev, rq->ifr_data);
  2759. default:
  2760. return -EOPNOTSUPP;
  2761. }
  2762. }
  2763. /**
  2764. * vxge_tx_watchdog
  2765. * @dev: pointer to net device structure
  2766. *
  2767. * Watchdog for transmit side.
  2768. * This function is triggered if the Tx Queue is stopped
  2769. * for a pre-defined amount of time when the Interface is still up.
  2770. */
  2771. static void vxge_tx_watchdog(struct net_device *dev)
  2772. {
  2773. struct vxgedev *vdev;
  2774. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  2775. vdev = netdev_priv(dev);
  2776. vdev->cric_err_event = VXGE_HW_EVENT_RESET_START;
  2777. schedule_work(&vdev->reset_task);
  2778. vxge_debug_entryexit(VXGE_TRACE,
  2779. "%s:%d Exiting...", __func__, __LINE__);
  2780. }
  2781. /**
  2782. * vxge_vlan_rx_add_vid
  2783. * @dev: net device pointer.
  2784. * @proto: vlan protocol
  2785. * @vid: vid
  2786. *
  2787. * Add the vlan id to the devices vlan id table
  2788. */
  2789. static int
  2790. vxge_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
  2791. {
  2792. struct vxgedev *vdev = netdev_priv(dev);
  2793. struct vxge_vpath *vpath;
  2794. int vp_id;
  2795. /* Add these vlan to the vid table */
  2796. for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
  2797. vpath = &vdev->vpaths[vp_id];
  2798. if (!vpath->is_open)
  2799. continue;
  2800. vxge_hw_vpath_vid_add(vpath->handle, vid);
  2801. }
  2802. set_bit(vid, vdev->active_vlans);
  2803. return 0;
  2804. }
  2805. /**
  2806. * vxge_vlan_rx_kill_vid
  2807. * @dev: net device pointer.
  2808. * @proto: vlan protocol
  2809. * @vid: vid
  2810. *
  2811. * Remove the vlan id from the device's vlan id table
  2812. */
  2813. static int
  2814. vxge_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
  2815. {
  2816. struct vxgedev *vdev = netdev_priv(dev);
  2817. struct vxge_vpath *vpath;
  2818. int vp_id;
  2819. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  2820. /* Delete this vlan from the vid table */
  2821. for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
  2822. vpath = &vdev->vpaths[vp_id];
  2823. if (!vpath->is_open)
  2824. continue;
  2825. vxge_hw_vpath_vid_delete(vpath->handle, vid);
  2826. }
  2827. vxge_debug_entryexit(VXGE_TRACE,
  2828. "%s:%d Exiting...", __func__, __LINE__);
  2829. clear_bit(vid, vdev->active_vlans);
  2830. return 0;
  2831. }
  2832. static const struct net_device_ops vxge_netdev_ops = {
  2833. .ndo_open = vxge_open,
  2834. .ndo_stop = vxge_close,
  2835. .ndo_get_stats64 = vxge_get_stats64,
  2836. .ndo_start_xmit = vxge_xmit,
  2837. .ndo_validate_addr = eth_validate_addr,
  2838. .ndo_set_rx_mode = vxge_set_multicast,
  2839. .ndo_do_ioctl = vxge_ioctl,
  2840. .ndo_set_mac_address = vxge_set_mac_addr,
  2841. .ndo_change_mtu = vxge_change_mtu,
  2842. .ndo_fix_features = vxge_fix_features,
  2843. .ndo_set_features = vxge_set_features,
  2844. .ndo_vlan_rx_kill_vid = vxge_vlan_rx_kill_vid,
  2845. .ndo_vlan_rx_add_vid = vxge_vlan_rx_add_vid,
  2846. .ndo_tx_timeout = vxge_tx_watchdog,
  2847. #ifdef CONFIG_NET_POLL_CONTROLLER
  2848. .ndo_poll_controller = vxge_netpoll,
  2849. #endif
  2850. };
  2851. static int vxge_device_register(struct __vxge_hw_device *hldev,
  2852. struct vxge_config *config, int high_dma,
  2853. int no_of_vpath, struct vxgedev **vdev_out)
  2854. {
  2855. struct net_device *ndev;
  2856. enum vxge_hw_status status = VXGE_HW_OK;
  2857. struct vxgedev *vdev;
  2858. int ret = 0, no_of_queue = 1;
  2859. u64 stat;
  2860. *vdev_out = NULL;
  2861. if (config->tx_steering_type)
  2862. no_of_queue = no_of_vpath;
  2863. ndev = alloc_etherdev_mq(sizeof(struct vxgedev),
  2864. no_of_queue);
  2865. if (ndev == NULL) {
  2866. vxge_debug_init(
  2867. vxge_hw_device_trace_level_get(hldev),
  2868. "%s : device allocation failed", __func__);
  2869. ret = -ENODEV;
  2870. goto _out0;
  2871. }
  2872. vxge_debug_entryexit(
  2873. vxge_hw_device_trace_level_get(hldev),
  2874. "%s: %s:%d Entering...",
  2875. ndev->name, __func__, __LINE__);
  2876. vdev = netdev_priv(ndev);
  2877. memset(vdev, 0, sizeof(struct vxgedev));
  2878. vdev->ndev = ndev;
  2879. vdev->devh = hldev;
  2880. vdev->pdev = hldev->pdev;
  2881. memcpy(&vdev->config, config, sizeof(struct vxge_config));
  2882. vdev->rx_hwts = 0;
  2883. vdev->titan1 = (vdev->pdev->revision == VXGE_HW_TITAN1_PCI_REVISION);
  2884. SET_NETDEV_DEV(ndev, &vdev->pdev->dev);
  2885. ndev->hw_features = NETIF_F_RXCSUM | NETIF_F_SG |
  2886. NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
  2887. NETIF_F_TSO | NETIF_F_TSO6 |
  2888. NETIF_F_HW_VLAN_CTAG_TX;
  2889. if (vdev->config.rth_steering != NO_STEERING)
  2890. ndev->hw_features |= NETIF_F_RXHASH;
  2891. ndev->features |= ndev->hw_features |
  2892. NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_FILTER;
  2893. ndev->netdev_ops = &vxge_netdev_ops;
  2894. ndev->watchdog_timeo = VXGE_LL_WATCH_DOG_TIMEOUT;
  2895. INIT_WORK(&vdev->reset_task, vxge_reset);
  2896. vxge_initialize_ethtool_ops(ndev);
  2897. /* Allocate memory for vpath */
  2898. vdev->vpaths = kzalloc((sizeof(struct vxge_vpath)) *
  2899. no_of_vpath, GFP_KERNEL);
  2900. if (!vdev->vpaths) {
  2901. vxge_debug_init(VXGE_ERR,
  2902. "%s: vpath memory allocation failed",
  2903. vdev->ndev->name);
  2904. ret = -ENOMEM;
  2905. goto _out1;
  2906. }
  2907. vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
  2908. "%s : checksumming enabled", __func__);
  2909. if (high_dma) {
  2910. ndev->features |= NETIF_F_HIGHDMA;
  2911. vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
  2912. "%s : using High DMA", __func__);
  2913. }
  2914. ret = register_netdev(ndev);
  2915. if (ret) {
  2916. vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
  2917. "%s: %s : device registration failed!",
  2918. ndev->name, __func__);
  2919. goto _out2;
  2920. }
  2921. /* Set the factory defined MAC address initially */
  2922. ndev->addr_len = ETH_ALEN;
  2923. /* Make Link state as off at this point, when the Link change
  2924. * interrupt comes the state will be automatically changed to
  2925. * the right state.
  2926. */
  2927. netif_carrier_off(ndev);
  2928. vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
  2929. "%s: Ethernet device registered",
  2930. ndev->name);
  2931. hldev->ndev = ndev;
  2932. *vdev_out = vdev;
  2933. /* Resetting the Device stats */
  2934. status = vxge_hw_mrpcim_stats_access(
  2935. hldev,
  2936. VXGE_HW_STATS_OP_CLEAR_ALL_STATS,
  2937. 0,
  2938. 0,
  2939. &stat);
  2940. if (status == VXGE_HW_ERR_PRIVILAGED_OPEARATION)
  2941. vxge_debug_init(
  2942. vxge_hw_device_trace_level_get(hldev),
  2943. "%s: device stats clear returns"
  2944. "VXGE_HW_ERR_PRIVILAGED_OPEARATION", ndev->name);
  2945. vxge_debug_entryexit(vxge_hw_device_trace_level_get(hldev),
  2946. "%s: %s:%d Exiting...",
  2947. ndev->name, __func__, __LINE__);
  2948. return ret;
  2949. _out2:
  2950. kfree(vdev->vpaths);
  2951. _out1:
  2952. free_netdev(ndev);
  2953. _out0:
  2954. return ret;
  2955. }
  2956. /*
  2957. * vxge_device_unregister
  2958. *
  2959. * This function will unregister and free network device
  2960. */
  2961. static void vxge_device_unregister(struct __vxge_hw_device *hldev)
  2962. {
  2963. struct vxgedev *vdev;
  2964. struct net_device *dev;
  2965. char buf[IFNAMSIZ];
  2966. dev = hldev->ndev;
  2967. vdev = netdev_priv(dev);
  2968. vxge_debug_entryexit(vdev->level_trace, "%s: %s:%d", vdev->ndev->name,
  2969. __func__, __LINE__);
  2970. strlcpy(buf, dev->name, IFNAMSIZ);
  2971. flush_work(&vdev->reset_task);
  2972. /* in 2.6 will call stop() if device is up */
  2973. unregister_netdev(dev);
  2974. kfree(vdev->vpaths);
  2975. /* we are safe to free it now */
  2976. free_netdev(dev);
  2977. vxge_debug_init(vdev->level_trace, "%s: ethernet device unregistered",
  2978. buf);
  2979. vxge_debug_entryexit(vdev->level_trace, "%s: %s:%d Exiting...", buf,
  2980. __func__, __LINE__);
  2981. }
  2982. /*
  2983. * vxge_callback_crit_err
  2984. *
  2985. * This function is called by the alarm handler in interrupt context.
  2986. * Driver must analyze it based on the event type.
  2987. */
  2988. static void
  2989. vxge_callback_crit_err(struct __vxge_hw_device *hldev,
  2990. enum vxge_hw_event type, u64 vp_id)
  2991. {
  2992. struct net_device *dev = hldev->ndev;
  2993. struct vxgedev *vdev = netdev_priv(dev);
  2994. struct vxge_vpath *vpath = NULL;
  2995. int vpath_idx;
  2996. vxge_debug_entryexit(vdev->level_trace,
  2997. "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
  2998. /* Note: This event type should be used for device wide
  2999. * indications only - Serious errors, Slot freeze and critical errors
  3000. */
  3001. vdev->cric_err_event = type;
  3002. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  3003. vpath = &vdev->vpaths[vpath_idx];
  3004. if (vpath->device_id == vp_id)
  3005. break;
  3006. }
  3007. if (!test_bit(__VXGE_STATE_RESET_CARD, &vdev->state)) {
  3008. if (type == VXGE_HW_EVENT_SLOT_FREEZE) {
  3009. vxge_debug_init(VXGE_ERR,
  3010. "%s: Slot is frozen", vdev->ndev->name);
  3011. } else if (type == VXGE_HW_EVENT_SERR) {
  3012. vxge_debug_init(VXGE_ERR,
  3013. "%s: Encountered Serious Error",
  3014. vdev->ndev->name);
  3015. } else if (type == VXGE_HW_EVENT_CRITICAL_ERR)
  3016. vxge_debug_init(VXGE_ERR,
  3017. "%s: Encountered Critical Error",
  3018. vdev->ndev->name);
  3019. }
  3020. if ((type == VXGE_HW_EVENT_SERR) ||
  3021. (type == VXGE_HW_EVENT_SLOT_FREEZE)) {
  3022. if (unlikely(vdev->exec_mode))
  3023. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  3024. } else if (type == VXGE_HW_EVENT_CRITICAL_ERR) {
  3025. vxge_hw_device_mask_all(hldev);
  3026. if (unlikely(vdev->exec_mode))
  3027. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  3028. } else if ((type == VXGE_HW_EVENT_FIFO_ERR) ||
  3029. (type == VXGE_HW_EVENT_VPATH_ERR)) {
  3030. if (unlikely(vdev->exec_mode))
  3031. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  3032. else {
  3033. /* check if this vpath is already set for reset */
  3034. if (!test_and_set_bit(vpath_idx, &vdev->vp_reset)) {
  3035. /* disable interrupts for this vpath */
  3036. vxge_vpath_intr_disable(vdev, vpath_idx);
  3037. /* stop the queue for this vpath */
  3038. netif_tx_stop_queue(vpath->fifo.txq);
  3039. }
  3040. }
  3041. }
  3042. vxge_debug_entryexit(vdev->level_trace,
  3043. "%s: %s:%d Exiting...",
  3044. vdev->ndev->name, __func__, __LINE__);
  3045. }
  3046. static void verify_bandwidth(void)
  3047. {
  3048. int i, band_width, total = 0, equal_priority = 0;
  3049. /* 1. If user enters 0 for some fifo, give equal priority to all */
  3050. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3051. if (bw_percentage[i] == 0) {
  3052. equal_priority = 1;
  3053. break;
  3054. }
  3055. }
  3056. if (!equal_priority) {
  3057. /* 2. If sum exceeds 100, give equal priority to all */
  3058. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3059. if (bw_percentage[i] == 0xFF)
  3060. break;
  3061. total += bw_percentage[i];
  3062. if (total > VXGE_HW_VPATH_BANDWIDTH_MAX) {
  3063. equal_priority = 1;
  3064. break;
  3065. }
  3066. }
  3067. }
  3068. if (!equal_priority) {
  3069. /* Is all the bandwidth consumed? */
  3070. if (total < VXGE_HW_VPATH_BANDWIDTH_MAX) {
  3071. if (i < VXGE_HW_MAX_VIRTUAL_PATHS) {
  3072. /* Split rest of bw equally among next VPs*/
  3073. band_width =
  3074. (VXGE_HW_VPATH_BANDWIDTH_MAX - total) /
  3075. (VXGE_HW_MAX_VIRTUAL_PATHS - i);
  3076. if (band_width < 2) /* min of 2% */
  3077. equal_priority = 1;
  3078. else {
  3079. for (; i < VXGE_HW_MAX_VIRTUAL_PATHS;
  3080. i++)
  3081. bw_percentage[i] =
  3082. band_width;
  3083. }
  3084. }
  3085. } else if (i < VXGE_HW_MAX_VIRTUAL_PATHS)
  3086. equal_priority = 1;
  3087. }
  3088. if (equal_priority) {
  3089. vxge_debug_init(VXGE_ERR,
  3090. "%s: Assigning equal bandwidth to all the vpaths",
  3091. VXGE_DRIVER_NAME);
  3092. bw_percentage[0] = VXGE_HW_VPATH_BANDWIDTH_MAX /
  3093. VXGE_HW_MAX_VIRTUAL_PATHS;
  3094. for (i = 1; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
  3095. bw_percentage[i] = bw_percentage[0];
  3096. }
  3097. }
  3098. /*
  3099. * Vpath configuration
  3100. */
  3101. static int vxge_config_vpaths(struct vxge_hw_device_config *device_config,
  3102. u64 vpath_mask, struct vxge_config *config_param)
  3103. {
  3104. int i, no_of_vpaths = 0, default_no_vpath = 0, temp;
  3105. u32 txdl_size, txdl_per_memblock;
  3106. temp = driver_config->vpath_per_dev;
  3107. if ((driver_config->vpath_per_dev == VXGE_USE_DEFAULT) &&
  3108. (max_config_dev == VXGE_MAX_CONFIG_DEV)) {
  3109. /* No more CPU. Return vpath number as zero.*/
  3110. if (driver_config->g_no_cpus == -1)
  3111. return 0;
  3112. if (!driver_config->g_no_cpus)
  3113. driver_config->g_no_cpus =
  3114. netif_get_num_default_rss_queues();
  3115. driver_config->vpath_per_dev = driver_config->g_no_cpus >> 1;
  3116. if (!driver_config->vpath_per_dev)
  3117. driver_config->vpath_per_dev = 1;
  3118. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
  3119. if (!vxge_bVALn(vpath_mask, i, 1))
  3120. continue;
  3121. else
  3122. default_no_vpath++;
  3123. if (default_no_vpath < driver_config->vpath_per_dev)
  3124. driver_config->vpath_per_dev = default_no_vpath;
  3125. driver_config->g_no_cpus = driver_config->g_no_cpus -
  3126. (driver_config->vpath_per_dev * 2);
  3127. if (driver_config->g_no_cpus <= 0)
  3128. driver_config->g_no_cpus = -1;
  3129. }
  3130. if (driver_config->vpath_per_dev == 1) {
  3131. vxge_debug_ll_config(VXGE_TRACE,
  3132. "%s: Disable tx and rx steering, "
  3133. "as single vpath is configured", VXGE_DRIVER_NAME);
  3134. config_param->rth_steering = NO_STEERING;
  3135. config_param->tx_steering_type = NO_STEERING;
  3136. device_config->rth_en = 0;
  3137. }
  3138. /* configure bandwidth */
  3139. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
  3140. device_config->vp_config[i].min_bandwidth = bw_percentage[i];
  3141. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3142. device_config->vp_config[i].vp_id = i;
  3143. device_config->vp_config[i].mtu = VXGE_HW_DEFAULT_MTU;
  3144. if (no_of_vpaths < driver_config->vpath_per_dev) {
  3145. if (!vxge_bVALn(vpath_mask, i, 1)) {
  3146. vxge_debug_ll_config(VXGE_TRACE,
  3147. "%s: vpath: %d is not available",
  3148. VXGE_DRIVER_NAME, i);
  3149. continue;
  3150. } else {
  3151. vxge_debug_ll_config(VXGE_TRACE,
  3152. "%s: vpath: %d available",
  3153. VXGE_DRIVER_NAME, i);
  3154. no_of_vpaths++;
  3155. }
  3156. } else {
  3157. vxge_debug_ll_config(VXGE_TRACE,
  3158. "%s: vpath: %d is not configured, "
  3159. "max_config_vpath exceeded",
  3160. VXGE_DRIVER_NAME, i);
  3161. break;
  3162. }
  3163. /* Configure Tx fifo's */
  3164. device_config->vp_config[i].fifo.enable =
  3165. VXGE_HW_FIFO_ENABLE;
  3166. device_config->vp_config[i].fifo.max_frags =
  3167. MAX_SKB_FRAGS + 1;
  3168. device_config->vp_config[i].fifo.memblock_size =
  3169. VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE;
  3170. txdl_size = device_config->vp_config[i].fifo.max_frags *
  3171. sizeof(struct vxge_hw_fifo_txd);
  3172. txdl_per_memblock = VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE / txdl_size;
  3173. device_config->vp_config[i].fifo.fifo_blocks =
  3174. ((VXGE_DEF_FIFO_LENGTH - 1) / txdl_per_memblock) + 1;
  3175. device_config->vp_config[i].fifo.intr =
  3176. VXGE_HW_FIFO_QUEUE_INTR_DISABLE;
  3177. /* Configure tti properties */
  3178. device_config->vp_config[i].tti.intr_enable =
  3179. VXGE_HW_TIM_INTR_ENABLE;
  3180. device_config->vp_config[i].tti.btimer_val =
  3181. (VXGE_TTI_BTIMER_VAL * 1000) / 272;
  3182. device_config->vp_config[i].tti.timer_ac_en =
  3183. VXGE_HW_TIM_TIMER_AC_ENABLE;
  3184. /* For msi-x with napi (each vector has a handler of its own) -
  3185. * Set CI to OFF for all vpaths
  3186. */
  3187. device_config->vp_config[i].tti.timer_ci_en =
  3188. VXGE_HW_TIM_TIMER_CI_DISABLE;
  3189. device_config->vp_config[i].tti.timer_ri_en =
  3190. VXGE_HW_TIM_TIMER_RI_DISABLE;
  3191. device_config->vp_config[i].tti.util_sel =
  3192. VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_NET_UTIL;
  3193. device_config->vp_config[i].tti.ltimer_val =
  3194. (VXGE_TTI_LTIMER_VAL * 1000) / 272;
  3195. device_config->vp_config[i].tti.rtimer_val =
  3196. (VXGE_TTI_RTIMER_VAL * 1000) / 272;
  3197. device_config->vp_config[i].tti.urange_a = TTI_TX_URANGE_A;
  3198. device_config->vp_config[i].tti.urange_b = TTI_TX_URANGE_B;
  3199. device_config->vp_config[i].tti.urange_c = TTI_TX_URANGE_C;
  3200. device_config->vp_config[i].tti.uec_a = TTI_TX_UFC_A;
  3201. device_config->vp_config[i].tti.uec_b = TTI_TX_UFC_B;
  3202. device_config->vp_config[i].tti.uec_c = TTI_TX_UFC_C;
  3203. device_config->vp_config[i].tti.uec_d = TTI_TX_UFC_D;
  3204. /* Configure Rx rings */
  3205. device_config->vp_config[i].ring.enable =
  3206. VXGE_HW_RING_ENABLE;
  3207. device_config->vp_config[i].ring.ring_blocks =
  3208. VXGE_HW_DEF_RING_BLOCKS;
  3209. device_config->vp_config[i].ring.buffer_mode =
  3210. VXGE_HW_RING_RXD_BUFFER_MODE_1;
  3211. device_config->vp_config[i].ring.rxds_limit =
  3212. VXGE_HW_DEF_RING_RXDS_LIMIT;
  3213. device_config->vp_config[i].ring.scatter_mode =
  3214. VXGE_HW_RING_SCATTER_MODE_A;
  3215. /* Configure rti properties */
  3216. device_config->vp_config[i].rti.intr_enable =
  3217. VXGE_HW_TIM_INTR_ENABLE;
  3218. device_config->vp_config[i].rti.btimer_val =
  3219. (VXGE_RTI_BTIMER_VAL * 1000)/272;
  3220. device_config->vp_config[i].rti.timer_ac_en =
  3221. VXGE_HW_TIM_TIMER_AC_ENABLE;
  3222. device_config->vp_config[i].rti.timer_ci_en =
  3223. VXGE_HW_TIM_TIMER_CI_DISABLE;
  3224. device_config->vp_config[i].rti.timer_ri_en =
  3225. VXGE_HW_TIM_TIMER_RI_DISABLE;
  3226. device_config->vp_config[i].rti.util_sel =
  3227. VXGE_HW_TIM_UTIL_SEL_LEGACY_RX_NET_UTIL;
  3228. device_config->vp_config[i].rti.urange_a =
  3229. RTI_RX_URANGE_A;
  3230. device_config->vp_config[i].rti.urange_b =
  3231. RTI_RX_URANGE_B;
  3232. device_config->vp_config[i].rti.urange_c =
  3233. RTI_RX_URANGE_C;
  3234. device_config->vp_config[i].rti.uec_a = RTI_RX_UFC_A;
  3235. device_config->vp_config[i].rti.uec_b = RTI_RX_UFC_B;
  3236. device_config->vp_config[i].rti.uec_c = RTI_RX_UFC_C;
  3237. device_config->vp_config[i].rti.uec_d = RTI_RX_UFC_D;
  3238. device_config->vp_config[i].rti.rtimer_val =
  3239. (VXGE_RTI_RTIMER_VAL * 1000) / 272;
  3240. device_config->vp_config[i].rti.ltimer_val =
  3241. (VXGE_RTI_LTIMER_VAL * 1000) / 272;
  3242. device_config->vp_config[i].rpa_strip_vlan_tag =
  3243. vlan_tag_strip;
  3244. }
  3245. driver_config->vpath_per_dev = temp;
  3246. return no_of_vpaths;
  3247. }
  3248. /* initialize device configuratrions */
  3249. static void vxge_device_config_init(struct vxge_hw_device_config *device_config,
  3250. int *intr_type)
  3251. {
  3252. /* Used for CQRQ/SRQ. */
  3253. device_config->dma_blockpool_initial =
  3254. VXGE_HW_INITIAL_DMA_BLOCK_POOL_SIZE;
  3255. device_config->dma_blockpool_max =
  3256. VXGE_HW_MAX_DMA_BLOCK_POOL_SIZE;
  3257. if (max_mac_vpath > VXGE_MAX_MAC_ADDR_COUNT)
  3258. max_mac_vpath = VXGE_MAX_MAC_ADDR_COUNT;
  3259. if (!IS_ENABLED(CONFIG_PCI_MSI)) {
  3260. vxge_debug_init(VXGE_ERR,
  3261. "%s: This Kernel does not support "
  3262. "MSI-X. Defaulting to INTA", VXGE_DRIVER_NAME);
  3263. *intr_type = INTA;
  3264. }
  3265. /* Configure whether MSI-X or IRQL. */
  3266. switch (*intr_type) {
  3267. case INTA:
  3268. device_config->intr_mode = VXGE_HW_INTR_MODE_IRQLINE;
  3269. break;
  3270. case MSI_X:
  3271. device_config->intr_mode = VXGE_HW_INTR_MODE_MSIX_ONE_SHOT;
  3272. break;
  3273. }
  3274. /* Timer period between device poll */
  3275. device_config->device_poll_millis = VXGE_TIMER_DELAY;
  3276. /* Configure mac based steering. */
  3277. device_config->rts_mac_en = addr_learn_en;
  3278. /* Configure Vpaths */
  3279. device_config->rth_it_type = VXGE_HW_RTH_IT_TYPE_MULTI_IT;
  3280. vxge_debug_ll_config(VXGE_TRACE, "%s : Device Config Params ",
  3281. __func__);
  3282. vxge_debug_ll_config(VXGE_TRACE, "intr_mode : %d",
  3283. device_config->intr_mode);
  3284. vxge_debug_ll_config(VXGE_TRACE, "device_poll_millis : %d",
  3285. device_config->device_poll_millis);
  3286. vxge_debug_ll_config(VXGE_TRACE, "rth_en : %d",
  3287. device_config->rth_en);
  3288. vxge_debug_ll_config(VXGE_TRACE, "rth_it_type : %d",
  3289. device_config->rth_it_type);
  3290. }
  3291. static void vxge_print_parm(struct vxgedev *vdev, u64 vpath_mask)
  3292. {
  3293. int i;
  3294. vxge_debug_init(VXGE_TRACE,
  3295. "%s: %d Vpath(s) opened",
  3296. vdev->ndev->name, vdev->no_of_vpath);
  3297. switch (vdev->config.intr_type) {
  3298. case INTA:
  3299. vxge_debug_init(VXGE_TRACE,
  3300. "%s: Interrupt type INTA", vdev->ndev->name);
  3301. break;
  3302. case MSI_X:
  3303. vxge_debug_init(VXGE_TRACE,
  3304. "%s: Interrupt type MSI-X", vdev->ndev->name);
  3305. break;
  3306. }
  3307. if (vdev->config.rth_steering) {
  3308. vxge_debug_init(VXGE_TRACE,
  3309. "%s: RTH steering enabled for TCP_IPV4",
  3310. vdev->ndev->name);
  3311. } else {
  3312. vxge_debug_init(VXGE_TRACE,
  3313. "%s: RTH steering disabled", vdev->ndev->name);
  3314. }
  3315. switch (vdev->config.tx_steering_type) {
  3316. case NO_STEERING:
  3317. vxge_debug_init(VXGE_TRACE,
  3318. "%s: Tx steering disabled", vdev->ndev->name);
  3319. break;
  3320. case TX_PRIORITY_STEERING:
  3321. vxge_debug_init(VXGE_TRACE,
  3322. "%s: Unsupported tx steering option",
  3323. vdev->ndev->name);
  3324. vxge_debug_init(VXGE_TRACE,
  3325. "%s: Tx steering disabled", vdev->ndev->name);
  3326. vdev->config.tx_steering_type = 0;
  3327. break;
  3328. case TX_VLAN_STEERING:
  3329. vxge_debug_init(VXGE_TRACE,
  3330. "%s: Unsupported tx steering option",
  3331. vdev->ndev->name);
  3332. vxge_debug_init(VXGE_TRACE,
  3333. "%s: Tx steering disabled", vdev->ndev->name);
  3334. vdev->config.tx_steering_type = 0;
  3335. break;
  3336. case TX_MULTIQ_STEERING:
  3337. vxge_debug_init(VXGE_TRACE,
  3338. "%s: Tx multiqueue steering enabled",
  3339. vdev->ndev->name);
  3340. break;
  3341. case TX_PORT_STEERING:
  3342. vxge_debug_init(VXGE_TRACE,
  3343. "%s: Tx port steering enabled",
  3344. vdev->ndev->name);
  3345. break;
  3346. default:
  3347. vxge_debug_init(VXGE_ERR,
  3348. "%s: Unsupported tx steering type",
  3349. vdev->ndev->name);
  3350. vxge_debug_init(VXGE_TRACE,
  3351. "%s: Tx steering disabled", vdev->ndev->name);
  3352. vdev->config.tx_steering_type = 0;
  3353. }
  3354. if (vdev->config.addr_learn_en)
  3355. vxge_debug_init(VXGE_TRACE,
  3356. "%s: MAC Address learning enabled", vdev->ndev->name);
  3357. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3358. if (!vxge_bVALn(vpath_mask, i, 1))
  3359. continue;
  3360. vxge_debug_ll_config(VXGE_TRACE,
  3361. "%s: MTU size - %d", vdev->ndev->name,
  3362. ((vdev->devh))->
  3363. config.vp_config[i].mtu);
  3364. vxge_debug_init(VXGE_TRACE,
  3365. "%s: VLAN tag stripping %s", vdev->ndev->name,
  3366. ((vdev->devh))->
  3367. config.vp_config[i].rpa_strip_vlan_tag
  3368. ? "Enabled" : "Disabled");
  3369. vxge_debug_ll_config(VXGE_TRACE,
  3370. "%s: Max frags : %d", vdev->ndev->name,
  3371. ((vdev->devh))->
  3372. config.vp_config[i].fifo.max_frags);
  3373. break;
  3374. }
  3375. }
  3376. #ifdef CONFIG_PM
  3377. /**
  3378. * vxge_pm_suspend - vxge power management suspend entry point
  3379. *
  3380. */
  3381. static int vxge_pm_suspend(struct pci_dev *pdev, pm_message_t state)
  3382. {
  3383. return -ENOSYS;
  3384. }
  3385. /**
  3386. * vxge_pm_resume - vxge power management resume entry point
  3387. *
  3388. */
  3389. static int vxge_pm_resume(struct pci_dev *pdev)
  3390. {
  3391. return -ENOSYS;
  3392. }
  3393. #endif
  3394. /**
  3395. * vxge_io_error_detected - called when PCI error is detected
  3396. * @pdev: Pointer to PCI device
  3397. * @state: The current pci connection state
  3398. *
  3399. * This function is called after a PCI bus error affecting
  3400. * this device has been detected.
  3401. */
  3402. static pci_ers_result_t vxge_io_error_detected(struct pci_dev *pdev,
  3403. pci_channel_state_t state)
  3404. {
  3405. struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
  3406. struct net_device *netdev = hldev->ndev;
  3407. netif_device_detach(netdev);
  3408. if (state == pci_channel_io_perm_failure)
  3409. return PCI_ERS_RESULT_DISCONNECT;
  3410. if (netif_running(netdev)) {
  3411. /* Bring down the card, while avoiding PCI I/O */
  3412. do_vxge_close(netdev, 0);
  3413. }
  3414. pci_disable_device(pdev);
  3415. return PCI_ERS_RESULT_NEED_RESET;
  3416. }
  3417. /**
  3418. * vxge_io_slot_reset - called after the pci bus has been reset.
  3419. * @pdev: Pointer to PCI device
  3420. *
  3421. * Restart the card from scratch, as if from a cold-boot.
  3422. * At this point, the card has exprienced a hard reset,
  3423. * followed by fixups by BIOS, and has its config space
  3424. * set up identically to what it was at cold boot.
  3425. */
  3426. static pci_ers_result_t vxge_io_slot_reset(struct pci_dev *pdev)
  3427. {
  3428. struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
  3429. struct net_device *netdev = hldev->ndev;
  3430. struct vxgedev *vdev = netdev_priv(netdev);
  3431. if (pci_enable_device(pdev)) {
  3432. netdev_err(netdev, "Cannot re-enable device after reset\n");
  3433. return PCI_ERS_RESULT_DISCONNECT;
  3434. }
  3435. pci_set_master(pdev);
  3436. do_vxge_reset(vdev, VXGE_LL_FULL_RESET);
  3437. return PCI_ERS_RESULT_RECOVERED;
  3438. }
  3439. /**
  3440. * vxge_io_resume - called when traffic can start flowing again.
  3441. * @pdev: Pointer to PCI device
  3442. *
  3443. * This callback is called when the error recovery driver tells
  3444. * us that its OK to resume normal operation.
  3445. */
  3446. static void vxge_io_resume(struct pci_dev *pdev)
  3447. {
  3448. struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
  3449. struct net_device *netdev = hldev->ndev;
  3450. if (netif_running(netdev)) {
  3451. if (vxge_open(netdev)) {
  3452. netdev_err(netdev,
  3453. "Can't bring device back up after reset\n");
  3454. return;
  3455. }
  3456. }
  3457. netif_device_attach(netdev);
  3458. }
  3459. static inline u32 vxge_get_num_vfs(u64 function_mode)
  3460. {
  3461. u32 num_functions = 0;
  3462. switch (function_mode) {
  3463. case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
  3464. case VXGE_HW_FUNCTION_MODE_SRIOV_8:
  3465. num_functions = 8;
  3466. break;
  3467. case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
  3468. num_functions = 1;
  3469. break;
  3470. case VXGE_HW_FUNCTION_MODE_SRIOV:
  3471. case VXGE_HW_FUNCTION_MODE_MRIOV:
  3472. case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION_17:
  3473. num_functions = 17;
  3474. break;
  3475. case VXGE_HW_FUNCTION_MODE_SRIOV_4:
  3476. num_functions = 4;
  3477. break;
  3478. case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION_2:
  3479. num_functions = 2;
  3480. break;
  3481. case VXGE_HW_FUNCTION_MODE_MRIOV_8:
  3482. num_functions = 8; /* TODO */
  3483. break;
  3484. }
  3485. return num_functions;
  3486. }
  3487. int vxge_fw_upgrade(struct vxgedev *vdev, char *fw_name, int override)
  3488. {
  3489. struct __vxge_hw_device *hldev = vdev->devh;
  3490. u32 maj, min, bld, cmaj, cmin, cbld;
  3491. enum vxge_hw_status status;
  3492. const struct firmware *fw;
  3493. int ret;
  3494. ret = reject_firmware(&fw, fw_name, &vdev->pdev->dev);
  3495. if (ret) {
  3496. vxge_debug_init(VXGE_ERR, "%s: Firmware file '%s' not found",
  3497. VXGE_DRIVER_NAME, fw_name);
  3498. goto out;
  3499. }
  3500. /* Load the new firmware onto the adapter */
  3501. status = vxge_update_fw_image(hldev, fw->data, fw->size);
  3502. if (status != VXGE_HW_OK) {
  3503. vxge_debug_init(VXGE_ERR,
  3504. "%s: FW image download to adapter failed '%s'.",
  3505. VXGE_DRIVER_NAME, fw_name);
  3506. ret = -EIO;
  3507. goto out;
  3508. }
  3509. /* Read the version of the new firmware */
  3510. status = vxge_hw_upgrade_read_version(hldev, &maj, &min, &bld);
  3511. if (status != VXGE_HW_OK) {
  3512. vxge_debug_init(VXGE_ERR,
  3513. "%s: Upgrade read version failed '%s'.",
  3514. VXGE_DRIVER_NAME, fw_name);
  3515. ret = -EIO;
  3516. goto out;
  3517. }
  3518. cmaj = vdev->config.device_hw_info.fw_version.major;
  3519. cmin = vdev->config.device_hw_info.fw_version.minor;
  3520. cbld = vdev->config.device_hw_info.fw_version.build;
  3521. /* It's possible the version in /lib/firmware is not the latest version.
  3522. * If so, we could get into a loop of trying to upgrade to the latest
  3523. * and flashing the older version.
  3524. */
  3525. if (VXGE_FW_VER(maj, min, bld) == VXGE_FW_VER(cmaj, cmin, cbld) &&
  3526. !override) {
  3527. ret = -EINVAL;
  3528. goto out;
  3529. }
  3530. printk(KERN_NOTICE "Upgrade to firmware version %d.%d.%d commencing\n",
  3531. maj, min, bld);
  3532. /* Flash the adapter with the new firmware */
  3533. status = vxge_hw_flash_fw(hldev);
  3534. if (status != VXGE_HW_OK) {
  3535. vxge_debug_init(VXGE_ERR, "%s: Upgrade commit failed '%s'.",
  3536. VXGE_DRIVER_NAME, fw_name);
  3537. ret = -EIO;
  3538. goto out;
  3539. }
  3540. printk(KERN_NOTICE "Upgrade of firmware successful! Adapter must be "
  3541. "hard reset before using, thus requiring a system reboot or a "
  3542. "hotplug event.\n");
  3543. out:
  3544. release_firmware(fw);
  3545. return ret;
  3546. }
  3547. static int vxge_probe_fw_update(struct vxgedev *vdev)
  3548. {
  3549. u32 maj, min, bld;
  3550. int ret, gpxe = 0;
  3551. char *fw_name;
  3552. maj = vdev->config.device_hw_info.fw_version.major;
  3553. min = vdev->config.device_hw_info.fw_version.minor;
  3554. bld = vdev->config.device_hw_info.fw_version.build;
  3555. if (VXGE_FW_VER(maj, min, bld) == VXGE_CERT_FW_VER)
  3556. return 0;
  3557. /* Ignore the build number when determining if the current firmware is
  3558. * "too new" to load the driver
  3559. */
  3560. if (VXGE_FW_VER(maj, min, 0) > VXGE_CERT_FW_VER) {
  3561. vxge_debug_init(VXGE_ERR, "%s: Firmware newer than last known "
  3562. "version, unable to load driver\n",
  3563. VXGE_DRIVER_NAME);
  3564. return -EINVAL;
  3565. }
  3566. /* Firmware 1.4.4 and older cannot be upgraded, and is too ancient to
  3567. * work with this driver.
  3568. */
  3569. if (VXGE_FW_VER(maj, min, bld) <= VXGE_FW_DEAD_VER) {
  3570. vxge_debug_init(VXGE_ERR, "%s: Firmware %d.%d.%d cannot be "
  3571. "upgraded\n", VXGE_DRIVER_NAME, maj, min, bld);
  3572. return -EINVAL;
  3573. }
  3574. /* If file not specified, determine gPXE or not */
  3575. if (VXGE_FW_VER(maj, min, bld) >= VXGE_EPROM_FW_VER) {
  3576. int i;
  3577. for (i = 0; i < VXGE_HW_MAX_ROM_IMAGES; i++)
  3578. if (vdev->devh->eprom_versions[i]) {
  3579. gpxe = 1;
  3580. break;
  3581. }
  3582. }
  3583. if (gpxe)
  3584. fw_name = "/*(DEBLOBBED)*/";
  3585. else
  3586. fw_name = "/*(DEBLOBBED)*/";
  3587. ret = vxge_fw_upgrade(vdev, fw_name, 0);
  3588. /* -EINVAL and -ENOENT are not fatal errors for flashing firmware on
  3589. * probe, so ignore them
  3590. */
  3591. if (ret != -EINVAL && ret != -ENOENT)
  3592. return -EIO;
  3593. else
  3594. ret = 0;
  3595. if (VXGE_FW_VER(VXGE_CERT_FW_VER_MAJOR, VXGE_CERT_FW_VER_MINOR, 0) >
  3596. VXGE_FW_VER(maj, min, 0)) {
  3597. vxge_debug_init(VXGE_ERR, "%s: Firmware %d.%d.%d is too old to"
  3598. " be used with this driver.",
  3599. VXGE_DRIVER_NAME, maj, min, bld);
  3600. return -EINVAL;
  3601. }
  3602. return ret;
  3603. }
  3604. static int is_sriov_initialized(struct pci_dev *pdev)
  3605. {
  3606. int pos;
  3607. u16 ctrl;
  3608. pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
  3609. if (pos) {
  3610. pci_read_config_word(pdev, pos + PCI_SRIOV_CTRL, &ctrl);
  3611. if (ctrl & PCI_SRIOV_CTRL_VFE)
  3612. return 1;
  3613. }
  3614. return 0;
  3615. }
  3616. static const struct vxge_hw_uld_cbs vxge_callbacks = {
  3617. .link_up = vxge_callback_link_up,
  3618. .link_down = vxge_callback_link_down,
  3619. .crit_err = vxge_callback_crit_err,
  3620. };
  3621. /**
  3622. * vxge_probe
  3623. * @pdev : structure containing the PCI related information of the device.
  3624. * @pre: List of PCI devices supported by the driver listed in vxge_id_table.
  3625. * Description:
  3626. * This function is called when a new PCI device gets detected and initializes
  3627. * it.
  3628. * Return value:
  3629. * returns 0 on success and negative on failure.
  3630. *
  3631. */
  3632. static int
  3633. vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre)
  3634. {
  3635. struct __vxge_hw_device *hldev;
  3636. enum vxge_hw_status status;
  3637. int ret;
  3638. int high_dma = 0;
  3639. u64 vpath_mask = 0;
  3640. struct vxgedev *vdev;
  3641. struct vxge_config *ll_config = NULL;
  3642. struct vxge_hw_device_config *device_config = NULL;
  3643. struct vxge_hw_device_attr attr;
  3644. int i, j, no_of_vpath = 0, max_vpath_supported = 0;
  3645. u8 *macaddr;
  3646. struct vxge_mac_addrs *entry;
  3647. static int bus = -1, device = -1;
  3648. u32 host_type;
  3649. u8 new_device = 0;
  3650. enum vxge_hw_status is_privileged;
  3651. u32 function_mode;
  3652. u32 num_vfs = 0;
  3653. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  3654. attr.pdev = pdev;
  3655. /* In SRIOV-17 mode, functions of the same adapter
  3656. * can be deployed on different buses
  3657. */
  3658. if (((bus != pdev->bus->number) || (device != PCI_SLOT(pdev->devfn))) &&
  3659. !pdev->is_virtfn)
  3660. new_device = 1;
  3661. bus = pdev->bus->number;
  3662. device = PCI_SLOT(pdev->devfn);
  3663. if (new_device) {
  3664. if (driver_config->config_dev_cnt &&
  3665. (driver_config->config_dev_cnt !=
  3666. driver_config->total_dev_cnt))
  3667. vxge_debug_init(VXGE_ERR,
  3668. "%s: Configured %d of %d devices",
  3669. VXGE_DRIVER_NAME,
  3670. driver_config->config_dev_cnt,
  3671. driver_config->total_dev_cnt);
  3672. driver_config->config_dev_cnt = 0;
  3673. driver_config->total_dev_cnt = 0;
  3674. }
  3675. /* Now making the CPU based no of vpath calculation
  3676. * applicable for individual functions as well.
  3677. */
  3678. driver_config->g_no_cpus = 0;
  3679. driver_config->vpath_per_dev = max_config_vpath;
  3680. driver_config->total_dev_cnt++;
  3681. if (++driver_config->config_dev_cnt > max_config_dev) {
  3682. ret = 0;
  3683. goto _exit0;
  3684. }
  3685. device_config = kzalloc(sizeof(struct vxge_hw_device_config),
  3686. GFP_KERNEL);
  3687. if (!device_config) {
  3688. ret = -ENOMEM;
  3689. vxge_debug_init(VXGE_ERR,
  3690. "device_config : malloc failed %s %d",
  3691. __FILE__, __LINE__);
  3692. goto _exit0;
  3693. }
  3694. ll_config = kzalloc(sizeof(struct vxge_config), GFP_KERNEL);
  3695. if (!ll_config) {
  3696. ret = -ENOMEM;
  3697. vxge_debug_init(VXGE_ERR,
  3698. "device_config : malloc failed %s %d",
  3699. __FILE__, __LINE__);
  3700. goto _exit0;
  3701. }
  3702. ll_config->tx_steering_type = TX_MULTIQ_STEERING;
  3703. ll_config->intr_type = MSI_X;
  3704. ll_config->napi_weight = NEW_NAPI_WEIGHT;
  3705. ll_config->rth_steering = RTH_STEERING;
  3706. /* get the default configuration parameters */
  3707. vxge_hw_device_config_default_get(device_config);
  3708. /* initialize configuration parameters */
  3709. vxge_device_config_init(device_config, &ll_config->intr_type);
  3710. ret = pci_enable_device(pdev);
  3711. if (ret) {
  3712. vxge_debug_init(VXGE_ERR,
  3713. "%s : can not enable PCI device", __func__);
  3714. goto _exit0;
  3715. }
  3716. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
  3717. vxge_debug_ll_config(VXGE_TRACE,
  3718. "%s : using 64bit DMA", __func__);
  3719. high_dma = 1;
  3720. if (pci_set_consistent_dma_mask(pdev,
  3721. DMA_BIT_MASK(64))) {
  3722. vxge_debug_init(VXGE_ERR,
  3723. "%s : unable to obtain 64bit DMA for "
  3724. "consistent allocations", __func__);
  3725. ret = -ENOMEM;
  3726. goto _exit1;
  3727. }
  3728. } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
  3729. vxge_debug_ll_config(VXGE_TRACE,
  3730. "%s : using 32bit DMA", __func__);
  3731. } else {
  3732. ret = -ENOMEM;
  3733. goto _exit1;
  3734. }
  3735. ret = pci_request_region(pdev, 0, VXGE_DRIVER_NAME);
  3736. if (ret) {
  3737. vxge_debug_init(VXGE_ERR,
  3738. "%s : request regions failed", __func__);
  3739. goto _exit1;
  3740. }
  3741. pci_set_master(pdev);
  3742. attr.bar0 = pci_ioremap_bar(pdev, 0);
  3743. if (!attr.bar0) {
  3744. vxge_debug_init(VXGE_ERR,
  3745. "%s : cannot remap io memory bar0", __func__);
  3746. ret = -ENODEV;
  3747. goto _exit2;
  3748. }
  3749. vxge_debug_ll_config(VXGE_TRACE,
  3750. "pci ioremap bar0: %p:0x%llx",
  3751. attr.bar0,
  3752. (unsigned long long)pci_resource_start(pdev, 0));
  3753. status = vxge_hw_device_hw_info_get(attr.bar0,
  3754. &ll_config->device_hw_info);
  3755. if (status != VXGE_HW_OK) {
  3756. vxge_debug_init(VXGE_ERR,
  3757. "%s: Reading of hardware info failed."
  3758. "Please try upgrading the firmware.", VXGE_DRIVER_NAME);
  3759. ret = -EINVAL;
  3760. goto _exit3;
  3761. }
  3762. vpath_mask = ll_config->device_hw_info.vpath_mask;
  3763. if (vpath_mask == 0) {
  3764. vxge_debug_ll_config(VXGE_TRACE,
  3765. "%s: No vpaths available in device", VXGE_DRIVER_NAME);
  3766. ret = -EINVAL;
  3767. goto _exit3;
  3768. }
  3769. vxge_debug_ll_config(VXGE_TRACE,
  3770. "%s:%d Vpath mask = %llx", __func__, __LINE__,
  3771. (unsigned long long)vpath_mask);
  3772. function_mode = ll_config->device_hw_info.function_mode;
  3773. host_type = ll_config->device_hw_info.host_type;
  3774. is_privileged = __vxge_hw_device_is_privilaged(host_type,
  3775. ll_config->device_hw_info.func_id);
  3776. /* Check how many vpaths are available */
  3777. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3778. if (!((vpath_mask) & vxge_mBIT(i)))
  3779. continue;
  3780. max_vpath_supported++;
  3781. }
  3782. if (new_device)
  3783. num_vfs = vxge_get_num_vfs(function_mode) - 1;
  3784. /* Enable SRIOV mode, if firmware has SRIOV support and if it is a PF */
  3785. if (is_sriov(function_mode) && !is_sriov_initialized(pdev) &&
  3786. (ll_config->intr_type != INTA)) {
  3787. ret = pci_enable_sriov(pdev, num_vfs);
  3788. if (ret)
  3789. vxge_debug_ll_config(VXGE_ERR,
  3790. "Failed in enabling SRIOV mode: %d\n", ret);
  3791. /* No need to fail out, as an error here is non-fatal */
  3792. }
  3793. /*
  3794. * Configure vpaths and get driver configured number of vpaths
  3795. * which is less than or equal to the maximum vpaths per function.
  3796. */
  3797. no_of_vpath = vxge_config_vpaths(device_config, vpath_mask, ll_config);
  3798. if (!no_of_vpath) {
  3799. vxge_debug_ll_config(VXGE_ERR,
  3800. "%s: No more vpaths to configure", VXGE_DRIVER_NAME);
  3801. ret = 0;
  3802. goto _exit3;
  3803. }
  3804. /* Setting driver callbacks */
  3805. attr.uld_callbacks = &vxge_callbacks;
  3806. status = vxge_hw_device_initialize(&hldev, &attr, device_config);
  3807. if (status != VXGE_HW_OK) {
  3808. vxge_debug_init(VXGE_ERR,
  3809. "Failed to initialize device (%d)", status);
  3810. ret = -EINVAL;
  3811. goto _exit3;
  3812. }
  3813. if (VXGE_FW_VER(ll_config->device_hw_info.fw_version.major,
  3814. ll_config->device_hw_info.fw_version.minor,
  3815. ll_config->device_hw_info.fw_version.build) >=
  3816. VXGE_EPROM_FW_VER) {
  3817. struct eprom_image img[VXGE_HW_MAX_ROM_IMAGES];
  3818. status = vxge_hw_vpath_eprom_img_ver_get(hldev, img);
  3819. if (status != VXGE_HW_OK) {
  3820. vxge_debug_init(VXGE_ERR, "%s: Reading of EPROM failed",
  3821. VXGE_DRIVER_NAME);
  3822. /* This is a non-fatal error, continue */
  3823. }
  3824. for (i = 0; i < VXGE_HW_MAX_ROM_IMAGES; i++) {
  3825. hldev->eprom_versions[i] = img[i].version;
  3826. if (!img[i].is_valid)
  3827. break;
  3828. vxge_debug_init(VXGE_TRACE, "%s: EPROM %d, version "
  3829. "%d.%d.%d.%d", VXGE_DRIVER_NAME, i,
  3830. VXGE_EPROM_IMG_MAJOR(img[i].version),
  3831. VXGE_EPROM_IMG_MINOR(img[i].version),
  3832. VXGE_EPROM_IMG_FIX(img[i].version),
  3833. VXGE_EPROM_IMG_BUILD(img[i].version));
  3834. }
  3835. }
  3836. /* if FCS stripping is not disabled in MAC fail driver load */
  3837. status = vxge_hw_vpath_strip_fcs_check(hldev, vpath_mask);
  3838. if (status != VXGE_HW_OK) {
  3839. vxge_debug_init(VXGE_ERR, "%s: FCS stripping is enabled in MAC"
  3840. " failing driver load", VXGE_DRIVER_NAME);
  3841. ret = -EINVAL;
  3842. goto _exit4;
  3843. }
  3844. /* Always enable HWTS. This will always cause the FCS to be invalid,
  3845. * due to the fact that HWTS is using the FCS as the location of the
  3846. * timestamp. The HW FCS checking will still correctly determine if
  3847. * there is a valid checksum, and the FCS is being removed by the driver
  3848. * anyway. So no fucntionality is being lost. Since it is always
  3849. * enabled, we now simply use the ioctl call to set whether or not the
  3850. * driver should be paying attention to the HWTS.
  3851. */
  3852. if (is_privileged == VXGE_HW_OK) {
  3853. status = vxge_timestamp_config(hldev);
  3854. if (status != VXGE_HW_OK) {
  3855. vxge_debug_init(VXGE_ERR, "%s: HWTS enable failed",
  3856. VXGE_DRIVER_NAME);
  3857. ret = -EFAULT;
  3858. goto _exit4;
  3859. }
  3860. }
  3861. vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
  3862. /* set private device info */
  3863. pci_set_drvdata(pdev, hldev);
  3864. ll_config->fifo_indicate_max_pkts = VXGE_FIFO_INDICATE_MAX_PKTS;
  3865. ll_config->addr_learn_en = addr_learn_en;
  3866. ll_config->rth_algorithm = RTH_ALG_JENKINS;
  3867. ll_config->rth_hash_type_tcpipv4 = 1;
  3868. ll_config->rth_hash_type_ipv4 = 0;
  3869. ll_config->rth_hash_type_tcpipv6 = 0;
  3870. ll_config->rth_hash_type_ipv6 = 0;
  3871. ll_config->rth_hash_type_tcpipv6ex = 0;
  3872. ll_config->rth_hash_type_ipv6ex = 0;
  3873. ll_config->rth_bkt_sz = RTH_BUCKET_SIZE;
  3874. ll_config->tx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
  3875. ll_config->rx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
  3876. ret = vxge_device_register(hldev, ll_config, high_dma, no_of_vpath,
  3877. &vdev);
  3878. if (ret) {
  3879. ret = -EINVAL;
  3880. goto _exit4;
  3881. }
  3882. ret = vxge_probe_fw_update(vdev);
  3883. if (ret)
  3884. goto _exit5;
  3885. vxge_hw_device_debug_set(hldev, VXGE_TRACE, VXGE_COMPONENT_LL);
  3886. VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
  3887. vxge_hw_device_trace_level_get(hldev));
  3888. /* set private HW device info */
  3889. vdev->mtu = VXGE_HW_DEFAULT_MTU;
  3890. vdev->bar0 = attr.bar0;
  3891. vdev->max_vpath_supported = max_vpath_supported;
  3892. vdev->no_of_vpath = no_of_vpath;
  3893. /* Virtual Path count */
  3894. for (i = 0, j = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3895. if (!vxge_bVALn(vpath_mask, i, 1))
  3896. continue;
  3897. if (j >= vdev->no_of_vpath)
  3898. break;
  3899. vdev->vpaths[j].is_configured = 1;
  3900. vdev->vpaths[j].device_id = i;
  3901. vdev->vpaths[j].ring.driver_id = j;
  3902. vdev->vpaths[j].vdev = vdev;
  3903. vdev->vpaths[j].max_mac_addr_cnt = max_mac_vpath;
  3904. memcpy((u8 *)vdev->vpaths[j].macaddr,
  3905. ll_config->device_hw_info.mac_addrs[i],
  3906. ETH_ALEN);
  3907. /* Initialize the mac address list header */
  3908. INIT_LIST_HEAD(&vdev->vpaths[j].mac_addr_list);
  3909. vdev->vpaths[j].mac_addr_cnt = 0;
  3910. vdev->vpaths[j].mcast_addr_cnt = 0;
  3911. j++;
  3912. }
  3913. vdev->exec_mode = VXGE_EXEC_MODE_DISABLE;
  3914. vdev->max_config_port = max_config_port;
  3915. vdev->vlan_tag_strip = vlan_tag_strip;
  3916. /* map the hashing selector table to the configured vpaths */
  3917. for (i = 0; i < vdev->no_of_vpath; i++)
  3918. vdev->vpath_selector[i] = vpath_selector[i];
  3919. macaddr = (u8 *)vdev->vpaths[0].macaddr;
  3920. ll_config->device_hw_info.serial_number[VXGE_HW_INFO_LEN - 1] = '\0';
  3921. ll_config->device_hw_info.product_desc[VXGE_HW_INFO_LEN - 1] = '\0';
  3922. ll_config->device_hw_info.part_number[VXGE_HW_INFO_LEN - 1] = '\0';
  3923. vxge_debug_init(VXGE_TRACE, "%s: SERIAL NUMBER: %s",
  3924. vdev->ndev->name, ll_config->device_hw_info.serial_number);
  3925. vxge_debug_init(VXGE_TRACE, "%s: PART NUMBER: %s",
  3926. vdev->ndev->name, ll_config->device_hw_info.part_number);
  3927. vxge_debug_init(VXGE_TRACE, "%s: Neterion %s Server Adapter",
  3928. vdev->ndev->name, ll_config->device_hw_info.product_desc);
  3929. vxge_debug_init(VXGE_TRACE, "%s: MAC ADDR: %pM",
  3930. vdev->ndev->name, macaddr);
  3931. vxge_debug_init(VXGE_TRACE, "%s: Link Width x%d",
  3932. vdev->ndev->name, vxge_hw_device_link_width_get(hldev));
  3933. vxge_debug_init(VXGE_TRACE,
  3934. "%s: Firmware version : %s Date : %s", vdev->ndev->name,
  3935. ll_config->device_hw_info.fw_version.version,
  3936. ll_config->device_hw_info.fw_date.date);
  3937. if (new_device) {
  3938. switch (ll_config->device_hw_info.function_mode) {
  3939. case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
  3940. vxge_debug_init(VXGE_TRACE,
  3941. "%s: Single Function Mode Enabled", vdev->ndev->name);
  3942. break;
  3943. case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
  3944. vxge_debug_init(VXGE_TRACE,
  3945. "%s: Multi Function Mode Enabled", vdev->ndev->name);
  3946. break;
  3947. case VXGE_HW_FUNCTION_MODE_SRIOV:
  3948. vxge_debug_init(VXGE_TRACE,
  3949. "%s: Single Root IOV Mode Enabled", vdev->ndev->name);
  3950. break;
  3951. case VXGE_HW_FUNCTION_MODE_MRIOV:
  3952. vxge_debug_init(VXGE_TRACE,
  3953. "%s: Multi Root IOV Mode Enabled", vdev->ndev->name);
  3954. break;
  3955. }
  3956. }
  3957. vxge_print_parm(vdev, vpath_mask);
  3958. /* Store the fw version for ethttool option */
  3959. strcpy(vdev->fw_version, ll_config->device_hw_info.fw_version.version);
  3960. memcpy(vdev->ndev->dev_addr, (u8 *)vdev->vpaths[0].macaddr, ETH_ALEN);
  3961. /* Copy the station mac address to the list */
  3962. for (i = 0; i < vdev->no_of_vpath; i++) {
  3963. entry = kzalloc(sizeof(struct vxge_mac_addrs), GFP_KERNEL);
  3964. if (NULL == entry) {
  3965. vxge_debug_init(VXGE_ERR,
  3966. "%s: mac_addr_list : memory allocation failed",
  3967. vdev->ndev->name);
  3968. ret = -EPERM;
  3969. goto _exit6;
  3970. }
  3971. macaddr = (u8 *)&entry->macaddr;
  3972. memcpy(macaddr, vdev->ndev->dev_addr, ETH_ALEN);
  3973. list_add(&entry->item, &vdev->vpaths[i].mac_addr_list);
  3974. vdev->vpaths[i].mac_addr_cnt = 1;
  3975. }
  3976. kfree(device_config);
  3977. /*
  3978. * INTA is shared in multi-function mode. This is unlike the INTA
  3979. * implementation in MR mode, where each VH has its own INTA message.
  3980. * - INTA is masked (disabled) as long as at least one function sets
  3981. * its TITAN_MASK_ALL_INT.ALARM bit.
  3982. * - INTA is unmasked (enabled) when all enabled functions have cleared
  3983. * their own TITAN_MASK_ALL_INT.ALARM bit.
  3984. * The TITAN_MASK_ALL_INT ALARM & TRAFFIC bits are cleared on power up.
  3985. * Though this driver leaves the top level interrupts unmasked while
  3986. * leaving the required module interrupt bits masked on exit, there
  3987. * could be a rougue driver around that does not follow this procedure
  3988. * resulting in a failure to generate interrupts. The following code is
  3989. * present to prevent such a failure.
  3990. */
  3991. if (ll_config->device_hw_info.function_mode ==
  3992. VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION)
  3993. if (vdev->config.intr_type == INTA)
  3994. vxge_hw_device_unmask_all(hldev);
  3995. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
  3996. vdev->ndev->name, __func__, __LINE__);
  3997. vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
  3998. VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
  3999. vxge_hw_device_trace_level_get(hldev));
  4000. kfree(ll_config);
  4001. return 0;
  4002. _exit6:
  4003. for (i = 0; i < vdev->no_of_vpath; i++)
  4004. vxge_free_mac_add_list(&vdev->vpaths[i]);
  4005. _exit5:
  4006. vxge_device_unregister(hldev);
  4007. _exit4:
  4008. vxge_hw_device_terminate(hldev);
  4009. pci_disable_sriov(pdev);
  4010. _exit3:
  4011. iounmap(attr.bar0);
  4012. _exit2:
  4013. pci_release_region(pdev, 0);
  4014. _exit1:
  4015. pci_disable_device(pdev);
  4016. _exit0:
  4017. kfree(ll_config);
  4018. kfree(device_config);
  4019. driver_config->config_dev_cnt--;
  4020. driver_config->total_dev_cnt--;
  4021. return ret;
  4022. }
  4023. /**
  4024. * vxge_rem_nic - Free the PCI device
  4025. * @pdev: structure containing the PCI related information of the device.
  4026. * Description: This function is called by the Pci subsystem to release a
  4027. * PCI device and free up all resource held up by the device.
  4028. */
  4029. static void vxge_remove(struct pci_dev *pdev)
  4030. {
  4031. struct __vxge_hw_device *hldev;
  4032. struct vxgedev *vdev;
  4033. int i;
  4034. hldev = pci_get_drvdata(pdev);
  4035. if (hldev == NULL)
  4036. return;
  4037. vdev = netdev_priv(hldev->ndev);
  4038. vxge_debug_entryexit(vdev->level_trace, "%s:%d", __func__, __LINE__);
  4039. vxge_debug_init(vdev->level_trace, "%s : removing PCI device...",
  4040. __func__);
  4041. for (i = 0; i < vdev->no_of_vpath; i++)
  4042. vxge_free_mac_add_list(&vdev->vpaths[i]);
  4043. vxge_device_unregister(hldev);
  4044. /* Do not call pci_disable_sriov here, as it will break child devices */
  4045. vxge_hw_device_terminate(hldev);
  4046. iounmap(vdev->bar0);
  4047. pci_release_region(pdev, 0);
  4048. pci_disable_device(pdev);
  4049. driver_config->config_dev_cnt--;
  4050. driver_config->total_dev_cnt--;
  4051. vxge_debug_init(vdev->level_trace, "%s:%d Device unregistered",
  4052. __func__, __LINE__);
  4053. vxge_debug_entryexit(vdev->level_trace, "%s:%d Exiting...", __func__,
  4054. __LINE__);
  4055. }
  4056. static const struct pci_error_handlers vxge_err_handler = {
  4057. .error_detected = vxge_io_error_detected,
  4058. .slot_reset = vxge_io_slot_reset,
  4059. .resume = vxge_io_resume,
  4060. };
  4061. static struct pci_driver vxge_driver = {
  4062. .name = VXGE_DRIVER_NAME,
  4063. .id_table = vxge_id_table,
  4064. .probe = vxge_probe,
  4065. .remove = vxge_remove,
  4066. #ifdef CONFIG_PM
  4067. .suspend = vxge_pm_suspend,
  4068. .resume = vxge_pm_resume,
  4069. #endif
  4070. .err_handler = &vxge_err_handler,
  4071. };
  4072. static int __init
  4073. vxge_starter(void)
  4074. {
  4075. int ret = 0;
  4076. pr_info("Copyright(c) 2002-2010 Exar Corp.\n");
  4077. pr_info("Driver version: %s\n", DRV_VERSION);
  4078. verify_bandwidth();
  4079. driver_config = kzalloc(sizeof(struct vxge_drv_config), GFP_KERNEL);
  4080. if (!driver_config)
  4081. return -ENOMEM;
  4082. ret = pci_register_driver(&vxge_driver);
  4083. if (ret) {
  4084. kfree(driver_config);
  4085. goto err;
  4086. }
  4087. if (driver_config->config_dev_cnt &&
  4088. (driver_config->config_dev_cnt != driver_config->total_dev_cnt))
  4089. vxge_debug_init(VXGE_ERR,
  4090. "%s: Configured %d of %d devices",
  4091. VXGE_DRIVER_NAME, driver_config->config_dev_cnt,
  4092. driver_config->total_dev_cnt);
  4093. err:
  4094. return ret;
  4095. }
  4096. static void __exit
  4097. vxge_closer(void)
  4098. {
  4099. pci_unregister_driver(&vxge_driver);
  4100. kfree(driver_config);
  4101. }
  4102. module_init(vxge_starter);
  4103. module_exit(vxge_closer);