i40e_fcoe.h 4.1 KB

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  1. /*******************************************************************************
  2. *
  3. * Intel Ethernet Controller XL710 Family Linux Driver
  4. * Copyright(c) 2013 - 2014 Intel Corporation.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along
  16. * with this program. If not, see <http://www.gnu.org/licenses/>.
  17. *
  18. * The full GNU General Public License is included in this distribution in
  19. * the file called "COPYING".
  20. *
  21. * Contact Information:
  22. * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  23. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24. *
  25. ******************************************************************************/
  26. #ifndef _I40E_FCOE_H_
  27. #define _I40E_FCOE_H_
  28. /* FCoE HW context helper macros */
  29. #define I40E_DDP_CONTEXT_DESC(R, i) \
  30. (&(((struct i40e_fcoe_ddp_context_desc *)((R)->desc))[i]))
  31. #define I40E_QUEUE_CONTEXT_DESC(R, i) \
  32. (&(((struct i40e_fcoe_queue_context_desc *)((R)->desc))[i]))
  33. #define I40E_FILTER_CONTEXT_DESC(R, i) \
  34. (&(((struct i40e_fcoe_filter_context_desc *)((R)->desc))[i]))
  35. /* receive queue descriptor filter status for FCoE */
  36. #define I40E_RX_DESC_FLTSTAT_FCMASK 0x3
  37. #define I40E_RX_DESC_FLTSTAT_NOMTCH 0x0 /* no ddp context match */
  38. #define I40E_RX_DESC_FLTSTAT_NODDP 0x1 /* no ddp due to error */
  39. #define I40E_RX_DESC_FLTSTAT_DDP 0x2 /* DDPed payload, post header */
  40. #define I40E_RX_DESC_FLTSTAT_FCPRSP 0x3 /* FCP_RSP */
  41. /* receive queue descriptor error codes for FCoE */
  42. #define I40E_RX_DESC_FCOE_ERROR_MASK \
  43. (I40E_RX_DESC_ERROR_L3L4E_PROT | \
  44. I40E_RX_DESC_ERROR_L3L4E_FC | \
  45. I40E_RX_DESC_ERROR_L3L4E_DMAC_ERR | \
  46. I40E_RX_DESC_ERROR_L3L4E_DMAC_WARN)
  47. /* receive queue descriptor programming error */
  48. #define I40E_RX_PROG_FCOE_ERROR_TBL_FULL(e) \
  49. (((e) >> I40E_RX_PROG_STATUS_DESC_FCOE_TBL_FULL_SHIFT) & 0x1)
  50. #define I40E_RX_PROG_FCOE_ERROR_CONFLICT(e) \
  51. (((e) >> I40E_RX_PROG_STATUS_DESC_FCOE_CONFLICT_SHIFT) & 0x1)
  52. #define I40E_RX_PROG_FCOE_ERROR_TBL_FULL_BIT \
  53. BIT(I40E_RX_PROG_STATUS_DESC_FCOE_TBL_FULL_SHIFT)
  54. #define I40E_RX_PROG_FCOE_ERROR_CONFLICT_BIT \
  55. BIT(I40E_RX_PROG_STATUS_DESC_FCOE_CONFLICT_SHIFT)
  56. #define I40E_RX_PROG_FCOE_ERROR_INVLFAIL(e) \
  57. I40E_RX_PROG_FCOE_ERROR_CONFLICT(e)
  58. #define I40E_RX_PROG_FCOE_ERROR_INVLFAIL_BIT \
  59. I40E_RX_PROG_FCOE_ERROR_CONFLICT_BIT
  60. /* FCoE DDP related definitions */
  61. #define I40E_FCOE_MIN_XID 0x0000 /* the min xid supported by fcoe_sw */
  62. #define I40E_FCOE_MAX_XID 0x0FFF /* the max xid supported by fcoe_sw */
  63. #define I40E_FCOE_DDP_BUFFCNT_MAX 512 /* 9 bits bufcnt */
  64. #define I40E_FCOE_DDP_PTR_ALIGN 16
  65. #define I40E_FCOE_DDP_PTR_MAX (I40E_FCOE_DDP_BUFFCNT_MAX * sizeof(dma_addr_t))
  66. #define I40E_FCOE_DDP_BUF_MIN 4096
  67. #define I40E_FCOE_DDP_MAX 2048
  68. #define I40E_FCOE_FILTER_CTX_QW1_PCTYPE_SHIFT 8
  69. /* supported netdev features for FCoE */
  70. #define I40E_FCOE_NETIF_FEATURES (NETIF_F_ALL_FCOE | \
  71. NETIF_F_HW_VLAN_CTAG_TX | \
  72. NETIF_F_HW_VLAN_CTAG_RX | \
  73. NETIF_F_HW_VLAN_CTAG_FILTER)
  74. /* DDP context flags */
  75. enum i40e_fcoe_ddp_flags {
  76. __I40E_FCOE_DDP_NONE = 1,
  77. __I40E_FCOE_DDP_TARGET,
  78. __I40E_FCOE_DDP_INITALIZED,
  79. __I40E_FCOE_DDP_PROGRAMMED,
  80. __I40E_FCOE_DDP_DONE,
  81. __I40E_FCOE_DDP_ABORTED,
  82. __I40E_FCOE_DDP_UNMAPPED,
  83. };
  84. /* DDP SW context struct */
  85. struct i40e_fcoe_ddp {
  86. int len;
  87. u16 xid;
  88. u16 firstoff;
  89. u16 lastsize;
  90. u16 list_len;
  91. u8 fcerr;
  92. u8 prerr;
  93. unsigned long flags;
  94. unsigned int sgc;
  95. struct scatterlist *sgl;
  96. dma_addr_t udp;
  97. u64 *udl;
  98. struct dma_pool *pool;
  99. };
  100. struct i40e_fcoe_ddp_pool {
  101. struct dma_pool *pool;
  102. };
  103. struct i40e_fcoe {
  104. unsigned long mode;
  105. atomic_t refcnt;
  106. struct i40e_fcoe_ddp_pool __percpu *ddp_pool;
  107. struct i40e_fcoe_ddp ddp[I40E_FCOE_DDP_MAX];
  108. };
  109. #endif /* _I40E_FCOE_H_ */