cnic_if.h 9.5 KB

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  1. /* cnic_if.h: QLogic cnic core network driver.
  2. *
  3. * Copyright (c) 2006-2014 Broadcom Corporation
  4. * Copyright (c) 2014-2015 QLogic Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation.
  9. *
  10. */
  11. #ifndef CNIC_IF_H
  12. #define CNIC_IF_H
  13. #include "bnx2x/bnx2x_mfw_req.h"
  14. #define CNIC_MODULE_VERSION "2.5.22"
  15. #define CNIC_MODULE_RELDATE "July 20, 2015"
  16. #define CNIC_ULP_RDMA 0
  17. #define CNIC_ULP_ISCSI 1
  18. #define CNIC_ULP_FCOE 2
  19. #define CNIC_ULP_L4 3
  20. #define MAX_CNIC_ULP_TYPE_EXT 3
  21. #define MAX_CNIC_ULP_TYPE 4
  22. /* Use CPU native page size up to 16K for cnic ring sizes. */
  23. #if (PAGE_SHIFT > 14)
  24. #define CNIC_PAGE_BITS 14
  25. #else
  26. #define CNIC_PAGE_BITS PAGE_SHIFT
  27. #endif
  28. #define CNIC_PAGE_SIZE (1 << (CNIC_PAGE_BITS))
  29. #define CNIC_PAGE_ALIGN(addr) ALIGN(addr, CNIC_PAGE_SIZE)
  30. #define CNIC_PAGE_MASK (~((CNIC_PAGE_SIZE) - 1))
  31. struct kwqe {
  32. u32 kwqe_op_flag;
  33. #define KWQE_QID_SHIFT 8
  34. #define KWQE_OPCODE_MASK 0x00ff0000
  35. #define KWQE_OPCODE_SHIFT 16
  36. #define KWQE_OPCODE(x) ((x & KWQE_OPCODE_MASK) >> KWQE_OPCODE_SHIFT)
  37. #define KWQE_LAYER_MASK 0x70000000
  38. #define KWQE_LAYER_SHIFT 28
  39. #define KWQE_FLAGS_LAYER_MASK_L2 (2<<28)
  40. #define KWQE_FLAGS_LAYER_MASK_L3 (3<<28)
  41. #define KWQE_FLAGS_LAYER_MASK_L4 (4<<28)
  42. #define KWQE_FLAGS_LAYER_MASK_L5_RDMA (5<<28)
  43. #define KWQE_FLAGS_LAYER_MASK_L5_ISCSI (6<<28)
  44. #define KWQE_FLAGS_LAYER_MASK_L5_FCOE (7<<28)
  45. u32 kwqe_info0;
  46. u32 kwqe_info1;
  47. u32 kwqe_info2;
  48. u32 kwqe_info3;
  49. u32 kwqe_info4;
  50. u32 kwqe_info5;
  51. u32 kwqe_info6;
  52. };
  53. struct kwqe_16 {
  54. u32 kwqe_info0;
  55. u32 kwqe_info1;
  56. u32 kwqe_info2;
  57. u32 kwqe_info3;
  58. };
  59. struct kcqe {
  60. u32 kcqe_info0;
  61. u32 kcqe_info1;
  62. u32 kcqe_info2;
  63. u32 kcqe_info3;
  64. u32 kcqe_info4;
  65. u32 kcqe_info5;
  66. u32 kcqe_info6;
  67. u32 kcqe_op_flag;
  68. #define KCQE_RAMROD_COMPLETION (0x1<<27) /* Everest */
  69. #define KCQE_FLAGS_LAYER_MASK (0x7<<28)
  70. #define KCQE_FLAGS_LAYER_MASK_MISC (0<<28)
  71. #define KCQE_FLAGS_LAYER_MASK_L2 (2<<28)
  72. #define KCQE_FLAGS_LAYER_MASK_L3 (3<<28)
  73. #define KCQE_FLAGS_LAYER_MASK_L4 (4<<28)
  74. #define KCQE_FLAGS_LAYER_MASK_L5_RDMA (5<<28)
  75. #define KCQE_FLAGS_LAYER_MASK_L5_ISCSI (6<<28)
  76. #define KCQE_FLAGS_LAYER_MASK_L5_FCOE (7<<28)
  77. #define KCQE_FLAGS_NEXT (1<<31)
  78. #define KCQE_FLAGS_OPCODE_MASK (0xff<<16)
  79. #define KCQE_FLAGS_OPCODE_SHIFT (16)
  80. #define KCQE_OPCODE(op) \
  81. (((op) & KCQE_FLAGS_OPCODE_MASK) >> KCQE_FLAGS_OPCODE_SHIFT)
  82. };
  83. #define MAX_CNIC_CTL_DATA 64
  84. #define MAX_DRV_CTL_DATA 64
  85. #define CNIC_CTL_STOP_CMD 1
  86. #define CNIC_CTL_START_CMD 2
  87. #define CNIC_CTL_COMPLETION_CMD 3
  88. #define CNIC_CTL_STOP_ISCSI_CMD 4
  89. #define CNIC_CTL_FCOE_STATS_GET_CMD 5
  90. #define CNIC_CTL_ISCSI_STATS_GET_CMD 6
  91. #define DRV_CTL_IO_WR_CMD 0x101
  92. #define DRV_CTL_IO_RD_CMD 0x102
  93. #define DRV_CTL_CTX_WR_CMD 0x103
  94. #define DRV_CTL_CTXTBL_WR_CMD 0x104
  95. #define DRV_CTL_RET_L5_SPQ_CREDIT_CMD 0x105
  96. #define DRV_CTL_START_L2_CMD 0x106
  97. #define DRV_CTL_STOP_L2_CMD 0x107
  98. #define DRV_CTL_RET_L2_SPQ_CREDIT_CMD 0x10c
  99. #define DRV_CTL_ISCSI_STOPPED_CMD 0x10d
  100. #define DRV_CTL_ULP_REGISTER_CMD 0x10e
  101. #define DRV_CTL_ULP_UNREGISTER_CMD 0x10f
  102. struct cnic_ctl_completion {
  103. u32 cid;
  104. u8 opcode;
  105. u8 error;
  106. };
  107. struct cnic_ctl_info {
  108. int cmd;
  109. union {
  110. struct cnic_ctl_completion comp;
  111. char bytes[MAX_CNIC_CTL_DATA];
  112. } data;
  113. };
  114. struct drv_ctl_spq_credit {
  115. u32 credit_count;
  116. };
  117. struct drv_ctl_io {
  118. u32 cid_addr;
  119. u32 offset;
  120. u32 data;
  121. dma_addr_t dma_addr;
  122. };
  123. struct drv_ctl_l2_ring {
  124. u32 client_id;
  125. u32 cid;
  126. };
  127. struct drv_ctl_register_data {
  128. int ulp_type;
  129. struct fcoe_capabilities fcoe_features;
  130. };
  131. struct drv_ctl_info {
  132. int cmd;
  133. int drv_state;
  134. #define DRV_NOP 0
  135. #define DRV_ACTIVE 1
  136. #define DRV_INACTIVE 2
  137. #define DRV_UNLOADED 3
  138. union {
  139. struct drv_ctl_spq_credit credit;
  140. struct drv_ctl_io io;
  141. struct drv_ctl_l2_ring ring;
  142. int ulp_type;
  143. struct drv_ctl_register_data register_data;
  144. char bytes[MAX_DRV_CTL_DATA];
  145. } data;
  146. };
  147. #define MAX_NPIV_ENTRIES 64
  148. #define FC_NPIV_WWN_SIZE 8
  149. struct cnic_fc_npiv_tbl {
  150. u8 wwpn[MAX_NPIV_ENTRIES][FC_NPIV_WWN_SIZE];
  151. u8 wwnn[MAX_NPIV_ENTRIES][FC_NPIV_WWN_SIZE];
  152. u32 count;
  153. };
  154. struct cnic_ops {
  155. struct module *cnic_owner;
  156. /* Calls to these functions are protected by RCU. When
  157. * unregistering, we wait for any calls to complete before
  158. * continuing.
  159. */
  160. int (*cnic_handler)(void *, void *);
  161. int (*cnic_ctl)(void *, struct cnic_ctl_info *);
  162. };
  163. #define MAX_CNIC_VEC 8
  164. struct cnic_irq {
  165. unsigned int vector;
  166. void *status_blk;
  167. u32 status_blk_num;
  168. u32 status_blk_num2;
  169. u32 irq_flags;
  170. #define CNIC_IRQ_FL_MSIX 0x00000001
  171. };
  172. struct cnic_eth_dev {
  173. struct module *drv_owner;
  174. u32 drv_state;
  175. #define CNIC_DRV_STATE_REGD 0x00000001
  176. #define CNIC_DRV_STATE_USING_MSIX 0x00000002
  177. #define CNIC_DRV_STATE_NO_ISCSI_OOO 0x00000004
  178. #define CNIC_DRV_STATE_NO_ISCSI 0x00000008
  179. #define CNIC_DRV_STATE_NO_FCOE 0x00000010
  180. #define CNIC_DRV_STATE_HANDLES_IRQ 0x00000020
  181. u32 chip_id;
  182. u32 max_kwqe_pending;
  183. struct pci_dev *pdev;
  184. void __iomem *io_base;
  185. void __iomem *io_base2;
  186. const void *iro_arr;
  187. u32 ctx_tbl_offset;
  188. u32 ctx_tbl_len;
  189. int ctx_blk_size;
  190. u32 starting_cid;
  191. u32 max_iscsi_conn;
  192. u32 max_fcoe_conn;
  193. u32 max_rdma_conn;
  194. u32 fcoe_init_cid;
  195. u32 max_fcoe_exchanges;
  196. u32 fcoe_wwn_port_name_hi;
  197. u32 fcoe_wwn_port_name_lo;
  198. u32 fcoe_wwn_node_name_hi;
  199. u32 fcoe_wwn_node_name_lo;
  200. u16 iscsi_l2_client_id;
  201. u16 iscsi_l2_cid;
  202. u8 iscsi_mac[ETH_ALEN];
  203. int num_irq;
  204. struct cnic_irq irq_arr[MAX_CNIC_VEC];
  205. int (*drv_register_cnic)(struct net_device *,
  206. struct cnic_ops *, void *);
  207. int (*drv_unregister_cnic)(struct net_device *);
  208. int (*drv_submit_kwqes_32)(struct net_device *,
  209. struct kwqe *[], u32);
  210. int (*drv_submit_kwqes_16)(struct net_device *,
  211. struct kwqe_16 *[], u32);
  212. int (*drv_ctl)(struct net_device *, struct drv_ctl_info *);
  213. int (*drv_get_fc_npiv_tbl)(struct net_device *,
  214. struct cnic_fc_npiv_tbl *);
  215. unsigned long reserved1[2];
  216. union drv_info_to_mcp *addr_drv_info_to_mcp;
  217. };
  218. struct cnic_sockaddr {
  219. union {
  220. struct sockaddr_in v4;
  221. struct sockaddr_in6 v6;
  222. } local;
  223. union {
  224. struct sockaddr_in v4;
  225. struct sockaddr_in6 v6;
  226. } remote;
  227. };
  228. struct cnic_sock {
  229. struct cnic_dev *dev;
  230. void *context;
  231. u32 src_ip[4];
  232. u32 dst_ip[4];
  233. u16 src_port;
  234. u16 dst_port;
  235. u16 vlan_id;
  236. unsigned char old_ha[ETH_ALEN];
  237. unsigned char ha[ETH_ALEN];
  238. u32 mtu;
  239. u32 cid;
  240. u32 l5_cid;
  241. u32 pg_cid;
  242. int ulp_type;
  243. u32 ka_timeout;
  244. u32 ka_interval;
  245. u8 ka_max_probe_count;
  246. u8 tos;
  247. u8 ttl;
  248. u8 snd_seq_scale;
  249. u32 rcv_buf;
  250. u32 snd_buf;
  251. u32 seed;
  252. unsigned long tcp_flags;
  253. #define SK_TCP_NO_DELAY_ACK 0x1
  254. #define SK_TCP_KEEP_ALIVE 0x2
  255. #define SK_TCP_NAGLE 0x4
  256. #define SK_TCP_TIMESTAMP 0x8
  257. #define SK_TCP_SACK 0x10
  258. #define SK_TCP_SEG_SCALING 0x20
  259. unsigned long flags;
  260. #define SK_F_INUSE 0
  261. #define SK_F_OFFLD_COMPLETE 1
  262. #define SK_F_OFFLD_SCHED 2
  263. #define SK_F_PG_OFFLD_COMPLETE 3
  264. #define SK_F_CONNECT_START 4
  265. #define SK_F_IPV6 5
  266. #define SK_F_CLOSING 7
  267. #define SK_F_HW_ERR 8
  268. atomic_t ref_count;
  269. u32 state;
  270. struct kwqe kwqe1;
  271. struct kwqe kwqe2;
  272. struct kwqe kwqe3;
  273. };
  274. struct cnic_dev {
  275. struct net_device *netdev;
  276. struct pci_dev *pcidev;
  277. void __iomem *regview;
  278. struct list_head list;
  279. int (*register_device)(struct cnic_dev *dev, int ulp_type,
  280. void *ulp_ctx);
  281. int (*unregister_device)(struct cnic_dev *dev, int ulp_type);
  282. int (*submit_kwqes)(struct cnic_dev *dev, struct kwqe *wqes[],
  283. u32 num_wqes);
  284. int (*submit_kwqes_16)(struct cnic_dev *dev, struct kwqe_16 *wqes[],
  285. u32 num_wqes);
  286. int (*cm_create)(struct cnic_dev *, int, u32, u32, struct cnic_sock **,
  287. void *);
  288. int (*cm_destroy)(struct cnic_sock *);
  289. int (*cm_connect)(struct cnic_sock *, struct cnic_sockaddr *);
  290. int (*cm_abort)(struct cnic_sock *);
  291. int (*cm_close)(struct cnic_sock *);
  292. struct cnic_dev *(*cm_select_dev)(struct sockaddr_in *, int ulp_type);
  293. int (*iscsi_nl_msg_recv)(struct cnic_dev *dev, u32 msg_type,
  294. char *data, u16 data_size);
  295. int (*get_fc_npiv_tbl)(struct cnic_dev *, struct cnic_fc_npiv_tbl *);
  296. unsigned long flags;
  297. #define CNIC_F_CNIC_UP 1
  298. #define CNIC_F_BNX2_CLASS 3
  299. #define CNIC_F_BNX2X_CLASS 4
  300. atomic_t ref_count;
  301. u8 mac_addr[ETH_ALEN];
  302. int max_iscsi_conn;
  303. int max_fcoe_conn;
  304. int max_rdma_conn;
  305. int max_fcoe_exchanges;
  306. union drv_info_to_mcp *stats_addr;
  307. struct fcoe_capabilities *fcoe_cap;
  308. void *cnic_priv;
  309. };
  310. #define CNIC_WR(dev, off, val) writel(val, dev->regview + off)
  311. #define CNIC_WR16(dev, off, val) writew(val, dev->regview + off)
  312. #define CNIC_WR8(dev, off, val) writeb(val, dev->regview + off)
  313. #define CNIC_RD(dev, off) readl(dev->regview + off)
  314. #define CNIC_RD16(dev, off) readw(dev->regview + off)
  315. struct cnic_ulp_ops {
  316. /* Calls to these functions are protected by RCU. When
  317. * unregistering, we wait for any calls to complete before
  318. * continuing.
  319. */
  320. void (*cnic_init)(struct cnic_dev *dev);
  321. void (*cnic_exit)(struct cnic_dev *dev);
  322. void (*cnic_start)(void *ulp_ctx);
  323. void (*cnic_stop)(void *ulp_ctx);
  324. void (*indicate_kcqes)(void *ulp_ctx, struct kcqe *cqes[],
  325. u32 num_cqes);
  326. void (*indicate_netevent)(void *ulp_ctx, unsigned long event, u16 vid);
  327. void (*cm_connect_complete)(struct cnic_sock *);
  328. void (*cm_close_complete)(struct cnic_sock *);
  329. void (*cm_abort_complete)(struct cnic_sock *);
  330. void (*cm_remote_close)(struct cnic_sock *);
  331. void (*cm_remote_abort)(struct cnic_sock *);
  332. int (*iscsi_nl_send_msg)(void *ulp_ctx, u32 msg_type,
  333. char *data, u16 data_size);
  334. int (*cnic_get_stats)(void *ulp_ctx);
  335. struct module *owner;
  336. atomic_t ref_count;
  337. };
  338. int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops);
  339. int cnic_unregister_driver(int ulp_type);
  340. #endif