bnxt_ethtool.c 53 KB

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  1. /* Broadcom NetXtreme-C/E network driver.
  2. *
  3. * Copyright (c) 2014-2016 Broadcom Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation.
  8. */
  9. #include <linux/ctype.h>
  10. #include <linux/stringify.h>
  11. #include <linux/ethtool.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/pci.h>
  14. #include <linux/etherdevice.h>
  15. #include <linux/crc32.h>
  16. #include <linux/firmware.h>
  17. #include "bnxt_hsi.h"
  18. #include "bnxt.h"
  19. #include "bnxt_ethtool.h"
  20. #include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */
  21. #include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */
  22. #define FLASH_NVRAM_TIMEOUT ((HWRM_CMD_TIMEOUT) * 100)
  23. #define FLASH_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
  24. #define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
  25. static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen);
  26. static u32 bnxt_get_msglevel(struct net_device *dev)
  27. {
  28. struct bnxt *bp = netdev_priv(dev);
  29. return bp->msg_enable;
  30. }
  31. static void bnxt_set_msglevel(struct net_device *dev, u32 value)
  32. {
  33. struct bnxt *bp = netdev_priv(dev);
  34. bp->msg_enable = value;
  35. }
  36. static int bnxt_get_coalesce(struct net_device *dev,
  37. struct ethtool_coalesce *coal)
  38. {
  39. struct bnxt *bp = netdev_priv(dev);
  40. memset(coal, 0, sizeof(*coal));
  41. coal->rx_coalesce_usecs = bp->rx_coal_ticks;
  42. /* 2 completion records per rx packet */
  43. coal->rx_max_coalesced_frames = bp->rx_coal_bufs / 2;
  44. coal->rx_coalesce_usecs_irq = bp->rx_coal_ticks_irq;
  45. coal->rx_max_coalesced_frames_irq = bp->rx_coal_bufs_irq / 2;
  46. coal->tx_coalesce_usecs = bp->tx_coal_ticks;
  47. coal->tx_max_coalesced_frames = bp->tx_coal_bufs;
  48. coal->tx_coalesce_usecs_irq = bp->tx_coal_ticks_irq;
  49. coal->tx_max_coalesced_frames_irq = bp->tx_coal_bufs_irq;
  50. coal->stats_block_coalesce_usecs = bp->stats_coal_ticks;
  51. return 0;
  52. }
  53. static int bnxt_set_coalesce(struct net_device *dev,
  54. struct ethtool_coalesce *coal)
  55. {
  56. struct bnxt *bp = netdev_priv(dev);
  57. bool update_stats = false;
  58. int rc = 0;
  59. bp->rx_coal_ticks = coal->rx_coalesce_usecs;
  60. /* 2 completion records per rx packet */
  61. bp->rx_coal_bufs = coal->rx_max_coalesced_frames * 2;
  62. bp->rx_coal_ticks_irq = coal->rx_coalesce_usecs_irq;
  63. bp->rx_coal_bufs_irq = coal->rx_max_coalesced_frames_irq * 2;
  64. bp->tx_coal_ticks = coal->tx_coalesce_usecs;
  65. bp->tx_coal_bufs = coal->tx_max_coalesced_frames;
  66. bp->tx_coal_ticks_irq = coal->tx_coalesce_usecs_irq;
  67. bp->tx_coal_bufs_irq = coal->tx_max_coalesced_frames_irq;
  68. if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) {
  69. u32 stats_ticks = coal->stats_block_coalesce_usecs;
  70. stats_ticks = clamp_t(u32, stats_ticks,
  71. BNXT_MIN_STATS_COAL_TICKS,
  72. BNXT_MAX_STATS_COAL_TICKS);
  73. stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS);
  74. bp->stats_coal_ticks = stats_ticks;
  75. update_stats = true;
  76. }
  77. if (netif_running(dev)) {
  78. if (update_stats) {
  79. rc = bnxt_close_nic(bp, true, false);
  80. if (!rc)
  81. rc = bnxt_open_nic(bp, true, false);
  82. } else {
  83. rc = bnxt_hwrm_set_coal(bp);
  84. }
  85. }
  86. return rc;
  87. }
  88. #define BNXT_NUM_STATS 21
  89. #define BNXT_RX_STATS_OFFSET(counter) \
  90. (offsetof(struct rx_port_stats, counter) / 8)
  91. #define BNXT_RX_STATS_ENTRY(counter) \
  92. { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) }
  93. #define BNXT_TX_STATS_OFFSET(counter) \
  94. ((offsetof(struct tx_port_stats, counter) + \
  95. sizeof(struct rx_port_stats) + 512) / 8)
  96. #define BNXT_TX_STATS_ENTRY(counter) \
  97. { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) }
  98. static const struct {
  99. long offset;
  100. char string[ETH_GSTRING_LEN];
  101. } bnxt_port_stats_arr[] = {
  102. BNXT_RX_STATS_ENTRY(rx_64b_frames),
  103. BNXT_RX_STATS_ENTRY(rx_65b_127b_frames),
  104. BNXT_RX_STATS_ENTRY(rx_128b_255b_frames),
  105. BNXT_RX_STATS_ENTRY(rx_256b_511b_frames),
  106. BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames),
  107. BNXT_RX_STATS_ENTRY(rx_1024b_1518_frames),
  108. BNXT_RX_STATS_ENTRY(rx_good_vlan_frames),
  109. BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames),
  110. BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames),
  111. BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames),
  112. BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames),
  113. BNXT_RX_STATS_ENTRY(rx_total_frames),
  114. BNXT_RX_STATS_ENTRY(rx_ucast_frames),
  115. BNXT_RX_STATS_ENTRY(rx_mcast_frames),
  116. BNXT_RX_STATS_ENTRY(rx_bcast_frames),
  117. BNXT_RX_STATS_ENTRY(rx_fcs_err_frames),
  118. BNXT_RX_STATS_ENTRY(rx_ctrl_frames),
  119. BNXT_RX_STATS_ENTRY(rx_pause_frames),
  120. BNXT_RX_STATS_ENTRY(rx_pfc_frames),
  121. BNXT_RX_STATS_ENTRY(rx_align_err_frames),
  122. BNXT_RX_STATS_ENTRY(rx_ovrsz_frames),
  123. BNXT_RX_STATS_ENTRY(rx_jbr_frames),
  124. BNXT_RX_STATS_ENTRY(rx_mtu_err_frames),
  125. BNXT_RX_STATS_ENTRY(rx_tagged_frames),
  126. BNXT_RX_STATS_ENTRY(rx_double_tagged_frames),
  127. BNXT_RX_STATS_ENTRY(rx_good_frames),
  128. BNXT_RX_STATS_ENTRY(rx_undrsz_frames),
  129. BNXT_RX_STATS_ENTRY(rx_eee_lpi_events),
  130. BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration),
  131. BNXT_RX_STATS_ENTRY(rx_bytes),
  132. BNXT_RX_STATS_ENTRY(rx_runt_bytes),
  133. BNXT_RX_STATS_ENTRY(rx_runt_frames),
  134. BNXT_TX_STATS_ENTRY(tx_64b_frames),
  135. BNXT_TX_STATS_ENTRY(tx_65b_127b_frames),
  136. BNXT_TX_STATS_ENTRY(tx_128b_255b_frames),
  137. BNXT_TX_STATS_ENTRY(tx_256b_511b_frames),
  138. BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames),
  139. BNXT_TX_STATS_ENTRY(tx_1024b_1518_frames),
  140. BNXT_TX_STATS_ENTRY(tx_good_vlan_frames),
  141. BNXT_TX_STATS_ENTRY(tx_1519b_2047_frames),
  142. BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames),
  143. BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames),
  144. BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames),
  145. BNXT_TX_STATS_ENTRY(tx_good_frames),
  146. BNXT_TX_STATS_ENTRY(tx_total_frames),
  147. BNXT_TX_STATS_ENTRY(tx_ucast_frames),
  148. BNXT_TX_STATS_ENTRY(tx_mcast_frames),
  149. BNXT_TX_STATS_ENTRY(tx_bcast_frames),
  150. BNXT_TX_STATS_ENTRY(tx_pause_frames),
  151. BNXT_TX_STATS_ENTRY(tx_pfc_frames),
  152. BNXT_TX_STATS_ENTRY(tx_jabber_frames),
  153. BNXT_TX_STATS_ENTRY(tx_fcs_err_frames),
  154. BNXT_TX_STATS_ENTRY(tx_err),
  155. BNXT_TX_STATS_ENTRY(tx_fifo_underruns),
  156. BNXT_TX_STATS_ENTRY(tx_eee_lpi_events),
  157. BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration),
  158. BNXT_TX_STATS_ENTRY(tx_total_collisions),
  159. BNXT_TX_STATS_ENTRY(tx_bytes),
  160. };
  161. #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
  162. static int bnxt_get_sset_count(struct net_device *dev, int sset)
  163. {
  164. struct bnxt *bp = netdev_priv(dev);
  165. switch (sset) {
  166. case ETH_SS_STATS: {
  167. int num_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
  168. if (bp->flags & BNXT_FLAG_PORT_STATS)
  169. num_stats += BNXT_NUM_PORT_STATS;
  170. return num_stats;
  171. }
  172. default:
  173. return -EOPNOTSUPP;
  174. }
  175. }
  176. static void bnxt_get_ethtool_stats(struct net_device *dev,
  177. struct ethtool_stats *stats, u64 *buf)
  178. {
  179. u32 i, j = 0;
  180. struct bnxt *bp = netdev_priv(dev);
  181. u32 buf_size = sizeof(struct ctx_hw_stats) * bp->cp_nr_rings;
  182. u32 stat_fields = sizeof(struct ctx_hw_stats) / 8;
  183. memset(buf, 0, buf_size);
  184. if (!bp->bnapi)
  185. return;
  186. for (i = 0; i < bp->cp_nr_rings; i++) {
  187. struct bnxt_napi *bnapi = bp->bnapi[i];
  188. struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
  189. __le64 *hw_stats = (__le64 *)cpr->hw_stats;
  190. int k;
  191. for (k = 0; k < stat_fields; j++, k++)
  192. buf[j] = le64_to_cpu(hw_stats[k]);
  193. buf[j++] = cpr->rx_l4_csum_errors;
  194. }
  195. if (bp->flags & BNXT_FLAG_PORT_STATS) {
  196. __le64 *port_stats = (__le64 *)bp->hw_rx_port_stats;
  197. for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) {
  198. buf[j] = le64_to_cpu(*(port_stats +
  199. bnxt_port_stats_arr[i].offset));
  200. }
  201. }
  202. }
  203. static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
  204. {
  205. struct bnxt *bp = netdev_priv(dev);
  206. u32 i;
  207. switch (stringset) {
  208. /* The number of strings must match BNXT_NUM_STATS defined above. */
  209. case ETH_SS_STATS:
  210. for (i = 0; i < bp->cp_nr_rings; i++) {
  211. sprintf(buf, "[%d]: rx_ucast_packets", i);
  212. buf += ETH_GSTRING_LEN;
  213. sprintf(buf, "[%d]: rx_mcast_packets", i);
  214. buf += ETH_GSTRING_LEN;
  215. sprintf(buf, "[%d]: rx_bcast_packets", i);
  216. buf += ETH_GSTRING_LEN;
  217. sprintf(buf, "[%d]: rx_discards", i);
  218. buf += ETH_GSTRING_LEN;
  219. sprintf(buf, "[%d]: rx_drops", i);
  220. buf += ETH_GSTRING_LEN;
  221. sprintf(buf, "[%d]: rx_ucast_bytes", i);
  222. buf += ETH_GSTRING_LEN;
  223. sprintf(buf, "[%d]: rx_mcast_bytes", i);
  224. buf += ETH_GSTRING_LEN;
  225. sprintf(buf, "[%d]: rx_bcast_bytes", i);
  226. buf += ETH_GSTRING_LEN;
  227. sprintf(buf, "[%d]: tx_ucast_packets", i);
  228. buf += ETH_GSTRING_LEN;
  229. sprintf(buf, "[%d]: tx_mcast_packets", i);
  230. buf += ETH_GSTRING_LEN;
  231. sprintf(buf, "[%d]: tx_bcast_packets", i);
  232. buf += ETH_GSTRING_LEN;
  233. sprintf(buf, "[%d]: tx_discards", i);
  234. buf += ETH_GSTRING_LEN;
  235. sprintf(buf, "[%d]: tx_drops", i);
  236. buf += ETH_GSTRING_LEN;
  237. sprintf(buf, "[%d]: tx_ucast_bytes", i);
  238. buf += ETH_GSTRING_LEN;
  239. sprintf(buf, "[%d]: tx_mcast_bytes", i);
  240. buf += ETH_GSTRING_LEN;
  241. sprintf(buf, "[%d]: tx_bcast_bytes", i);
  242. buf += ETH_GSTRING_LEN;
  243. sprintf(buf, "[%d]: tpa_packets", i);
  244. buf += ETH_GSTRING_LEN;
  245. sprintf(buf, "[%d]: tpa_bytes", i);
  246. buf += ETH_GSTRING_LEN;
  247. sprintf(buf, "[%d]: tpa_events", i);
  248. buf += ETH_GSTRING_LEN;
  249. sprintf(buf, "[%d]: tpa_aborts", i);
  250. buf += ETH_GSTRING_LEN;
  251. sprintf(buf, "[%d]: rx_l4_csum_errors", i);
  252. buf += ETH_GSTRING_LEN;
  253. }
  254. if (bp->flags & BNXT_FLAG_PORT_STATS) {
  255. for (i = 0; i < BNXT_NUM_PORT_STATS; i++) {
  256. strcpy(buf, bnxt_port_stats_arr[i].string);
  257. buf += ETH_GSTRING_LEN;
  258. }
  259. }
  260. break;
  261. default:
  262. netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n",
  263. stringset);
  264. break;
  265. }
  266. }
  267. static void bnxt_get_ringparam(struct net_device *dev,
  268. struct ethtool_ringparam *ering)
  269. {
  270. struct bnxt *bp = netdev_priv(dev);
  271. ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT;
  272. ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT;
  273. ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT;
  274. ering->rx_pending = bp->rx_ring_size;
  275. ering->rx_jumbo_pending = bp->rx_agg_ring_size;
  276. ering->tx_pending = bp->tx_ring_size;
  277. }
  278. static int bnxt_set_ringparam(struct net_device *dev,
  279. struct ethtool_ringparam *ering)
  280. {
  281. struct bnxt *bp = netdev_priv(dev);
  282. if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) ||
  283. (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) ||
  284. (ering->tx_pending <= MAX_SKB_FRAGS))
  285. return -EINVAL;
  286. if (netif_running(dev))
  287. bnxt_close_nic(bp, false, false);
  288. bp->rx_ring_size = ering->rx_pending;
  289. bp->tx_ring_size = ering->tx_pending;
  290. bnxt_set_ring_params(bp);
  291. if (netif_running(dev))
  292. return bnxt_open_nic(bp, false, false);
  293. return 0;
  294. }
  295. static void bnxt_get_channels(struct net_device *dev,
  296. struct ethtool_channels *channel)
  297. {
  298. struct bnxt *bp = netdev_priv(dev);
  299. int max_rx_rings, max_tx_rings, tcs;
  300. bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true);
  301. channel->max_combined = max_t(int, max_rx_rings, max_tx_rings);
  302. if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) {
  303. max_rx_rings = 0;
  304. max_tx_rings = 0;
  305. }
  306. tcs = netdev_get_num_tc(dev);
  307. if (tcs > 1)
  308. max_tx_rings /= tcs;
  309. channel->max_rx = max_rx_rings;
  310. channel->max_tx = max_tx_rings;
  311. channel->max_other = 0;
  312. if (bp->flags & BNXT_FLAG_SHARED_RINGS) {
  313. channel->combined_count = bp->rx_nr_rings;
  314. if (BNXT_CHIP_TYPE_NITRO_A0(bp))
  315. channel->combined_count--;
  316. } else {
  317. if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) {
  318. channel->rx_count = bp->rx_nr_rings;
  319. channel->tx_count = bp->tx_nr_rings_per_tc;
  320. }
  321. }
  322. }
  323. static int bnxt_set_channels(struct net_device *dev,
  324. struct ethtool_channels *channel)
  325. {
  326. struct bnxt *bp = netdev_priv(dev);
  327. int max_rx_rings, max_tx_rings, tcs;
  328. u32 rc = 0;
  329. bool sh = false;
  330. if (channel->other_count)
  331. return -EINVAL;
  332. if (!channel->combined_count &&
  333. (!channel->rx_count || !channel->tx_count))
  334. return -EINVAL;
  335. if (channel->combined_count &&
  336. (channel->rx_count || channel->tx_count))
  337. return -EINVAL;
  338. if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count ||
  339. channel->tx_count))
  340. return -EINVAL;
  341. if (channel->combined_count)
  342. sh = true;
  343. bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, sh);
  344. tcs = netdev_get_num_tc(dev);
  345. if (tcs > 1)
  346. max_tx_rings /= tcs;
  347. if (sh &&
  348. channel->combined_count > max_t(int, max_rx_rings, max_tx_rings))
  349. return -ENOMEM;
  350. if (!sh && (channel->rx_count > max_rx_rings ||
  351. channel->tx_count > max_tx_rings))
  352. return -ENOMEM;
  353. if (netif_running(dev)) {
  354. if (BNXT_PF(bp)) {
  355. /* TODO CHIMP_FW: Send message to all VF's
  356. * before PF unload
  357. */
  358. }
  359. rc = bnxt_close_nic(bp, true, false);
  360. if (rc) {
  361. netdev_err(bp->dev, "Set channel failure rc :%x\n",
  362. rc);
  363. return rc;
  364. }
  365. }
  366. if (sh) {
  367. bp->flags |= BNXT_FLAG_SHARED_RINGS;
  368. bp->rx_nr_rings = min_t(int, channel->combined_count,
  369. max_rx_rings);
  370. bp->tx_nr_rings_per_tc = min_t(int, channel->combined_count,
  371. max_tx_rings);
  372. } else {
  373. bp->flags &= ~BNXT_FLAG_SHARED_RINGS;
  374. bp->rx_nr_rings = channel->rx_count;
  375. bp->tx_nr_rings_per_tc = channel->tx_count;
  376. }
  377. bp->tx_nr_rings = bp->tx_nr_rings_per_tc;
  378. if (tcs > 1)
  379. bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs;
  380. bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) :
  381. bp->tx_nr_rings + bp->rx_nr_rings;
  382. bp->num_stat_ctxs = bp->cp_nr_rings;
  383. /* After changing number of rx channels, update NTUPLE feature. */
  384. netdev_update_features(dev);
  385. if (netif_running(dev)) {
  386. rc = bnxt_open_nic(bp, true, false);
  387. if ((!rc) && BNXT_PF(bp)) {
  388. /* TODO CHIMP_FW: Send message to all VF's
  389. * to renable
  390. */
  391. }
  392. }
  393. return rc;
  394. }
  395. #ifdef CONFIG_RFS_ACCEL
  396. static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd,
  397. u32 *rule_locs)
  398. {
  399. int i, j = 0;
  400. cmd->data = bp->ntp_fltr_count;
  401. for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
  402. struct hlist_head *head;
  403. struct bnxt_ntuple_filter *fltr;
  404. head = &bp->ntp_fltr_hash_tbl[i];
  405. rcu_read_lock();
  406. hlist_for_each_entry_rcu(fltr, head, hash) {
  407. if (j == cmd->rule_cnt)
  408. break;
  409. rule_locs[j++] = fltr->sw_id;
  410. }
  411. rcu_read_unlock();
  412. if (j == cmd->rule_cnt)
  413. break;
  414. }
  415. cmd->rule_cnt = j;
  416. return 0;
  417. }
  418. static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)
  419. {
  420. struct ethtool_rx_flow_spec *fs =
  421. (struct ethtool_rx_flow_spec *)&cmd->fs;
  422. struct bnxt_ntuple_filter *fltr;
  423. struct flow_keys *fkeys;
  424. int i, rc = -EINVAL;
  425. if (fs->location < 0 || fs->location >= BNXT_NTP_FLTR_MAX_FLTR)
  426. return rc;
  427. for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
  428. struct hlist_head *head;
  429. head = &bp->ntp_fltr_hash_tbl[i];
  430. rcu_read_lock();
  431. hlist_for_each_entry_rcu(fltr, head, hash) {
  432. if (fltr->sw_id == fs->location)
  433. goto fltr_found;
  434. }
  435. rcu_read_unlock();
  436. }
  437. return rc;
  438. fltr_found:
  439. fkeys = &fltr->fkeys;
  440. if (fkeys->basic.ip_proto == IPPROTO_TCP)
  441. fs->flow_type = TCP_V4_FLOW;
  442. else if (fkeys->basic.ip_proto == IPPROTO_UDP)
  443. fs->flow_type = UDP_V4_FLOW;
  444. else
  445. goto fltr_err;
  446. fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src;
  447. fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0);
  448. fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst;
  449. fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0);
  450. fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src;
  451. fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0);
  452. fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst;
  453. fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0);
  454. fs->ring_cookie = fltr->rxq;
  455. rc = 0;
  456. fltr_err:
  457. rcu_read_unlock();
  458. return rc;
  459. }
  460. static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
  461. u32 *rule_locs)
  462. {
  463. struct bnxt *bp = netdev_priv(dev);
  464. int rc = 0;
  465. switch (cmd->cmd) {
  466. case ETHTOOL_GRXRINGS:
  467. cmd->data = bp->rx_nr_rings;
  468. break;
  469. case ETHTOOL_GRXCLSRLCNT:
  470. cmd->rule_cnt = bp->ntp_fltr_count;
  471. cmd->data = BNXT_NTP_FLTR_MAX_FLTR;
  472. break;
  473. case ETHTOOL_GRXCLSRLALL:
  474. rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs);
  475. break;
  476. case ETHTOOL_GRXCLSRULE:
  477. rc = bnxt_grxclsrule(bp, cmd);
  478. break;
  479. default:
  480. rc = -EOPNOTSUPP;
  481. break;
  482. }
  483. return rc;
  484. }
  485. #endif
  486. static u32 bnxt_get_rxfh_indir_size(struct net_device *dev)
  487. {
  488. return HW_HASH_INDEX_SIZE;
  489. }
  490. static u32 bnxt_get_rxfh_key_size(struct net_device *dev)
  491. {
  492. return HW_HASH_KEY_SIZE;
  493. }
  494. static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
  495. u8 *hfunc)
  496. {
  497. struct bnxt *bp = netdev_priv(dev);
  498. struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
  499. int i = 0;
  500. if (hfunc)
  501. *hfunc = ETH_RSS_HASH_TOP;
  502. if (indir)
  503. for (i = 0; i < HW_HASH_INDEX_SIZE; i++)
  504. indir[i] = le16_to_cpu(vnic->rss_table[i]);
  505. if (key)
  506. memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE);
  507. return 0;
  508. }
  509. static void bnxt_get_drvinfo(struct net_device *dev,
  510. struct ethtool_drvinfo *info)
  511. {
  512. struct bnxt *bp = netdev_priv(dev);
  513. char *pkglog;
  514. char *pkgver = NULL;
  515. pkglog = kmalloc(BNX_PKG_LOG_MAX_LENGTH, GFP_KERNEL);
  516. if (pkglog)
  517. pkgver = bnxt_get_pkgver(dev, pkglog, BNX_PKG_LOG_MAX_LENGTH);
  518. strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
  519. strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
  520. if (pkgver && *pkgver != 0 && isdigit(*pkgver))
  521. snprintf(info->fw_version, sizeof(info->fw_version) - 1,
  522. "%s pkg %s", bp->fw_ver_str, pkgver);
  523. else
  524. strlcpy(info->fw_version, bp->fw_ver_str,
  525. sizeof(info->fw_version));
  526. strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info));
  527. info->n_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
  528. info->testinfo_len = BNXT_NUM_TESTS(bp);
  529. /* TODO CHIMP_FW: eeprom dump details */
  530. info->eedump_len = 0;
  531. /* TODO CHIMP FW: reg dump details */
  532. info->regdump_len = 0;
  533. kfree(pkglog);
  534. }
  535. u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause)
  536. {
  537. u32 speed_mask = 0;
  538. /* TODO: support 25GB, 40GB, 50GB with different cable type */
  539. /* set the advertised speeds */
  540. if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB)
  541. speed_mask |= ADVERTISED_100baseT_Full;
  542. if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB)
  543. speed_mask |= ADVERTISED_1000baseT_Full;
  544. if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB)
  545. speed_mask |= ADVERTISED_2500baseX_Full;
  546. if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB)
  547. speed_mask |= ADVERTISED_10000baseT_Full;
  548. if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB)
  549. speed_mask |= ADVERTISED_40000baseCR4_Full;
  550. if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH)
  551. speed_mask |= ADVERTISED_Pause;
  552. else if (fw_pause & BNXT_LINK_PAUSE_TX)
  553. speed_mask |= ADVERTISED_Asym_Pause;
  554. else if (fw_pause & BNXT_LINK_PAUSE_RX)
  555. speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
  556. return speed_mask;
  557. }
  558. #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\
  559. { \
  560. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \
  561. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  562. 100baseT_Full); \
  563. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \
  564. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  565. 1000baseT_Full); \
  566. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \
  567. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  568. 10000baseT_Full); \
  569. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \
  570. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  571. 25000baseCR_Full); \
  572. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \
  573. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  574. 40000baseCR4_Full);\
  575. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \
  576. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  577. 50000baseCR2_Full);\
  578. if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \
  579. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  580. Pause); \
  581. if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \
  582. ethtool_link_ksettings_add_link_mode( \
  583. lk_ksettings, name, Asym_Pause);\
  584. } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \
  585. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  586. Asym_Pause); \
  587. } \
  588. }
  589. #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \
  590. { \
  591. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  592. 100baseT_Full) || \
  593. ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  594. 100baseT_Half)) \
  595. (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \
  596. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  597. 1000baseT_Full) || \
  598. ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  599. 1000baseT_Half)) \
  600. (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \
  601. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  602. 10000baseT_Full)) \
  603. (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \
  604. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  605. 25000baseCR_Full)) \
  606. (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \
  607. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  608. 40000baseCR4_Full)) \
  609. (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \
  610. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  611. 50000baseCR2_Full)) \
  612. (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \
  613. }
  614. static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info,
  615. struct ethtool_link_ksettings *lk_ksettings)
  616. {
  617. u16 fw_speeds = link_info->auto_link_speeds;
  618. u8 fw_pause = 0;
  619. if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
  620. fw_pause = link_info->auto_pause_setting;
  621. BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising);
  622. }
  623. static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info,
  624. struct ethtool_link_ksettings *lk_ksettings)
  625. {
  626. u16 fw_speeds = link_info->lp_auto_link_speeds;
  627. u8 fw_pause = 0;
  628. if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
  629. fw_pause = link_info->lp_pause;
  630. BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings,
  631. lp_advertising);
  632. }
  633. static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info,
  634. struct ethtool_link_ksettings *lk_ksettings)
  635. {
  636. u16 fw_speeds = link_info->support_speeds;
  637. BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported);
  638. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause);
  639. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  640. Asym_Pause);
  641. if (link_info->support_auto_speeds)
  642. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  643. Autoneg);
  644. }
  645. u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)
  646. {
  647. switch (fw_link_speed) {
  648. case BNXT_LINK_SPEED_100MB:
  649. return SPEED_100;
  650. case BNXT_LINK_SPEED_1GB:
  651. return SPEED_1000;
  652. case BNXT_LINK_SPEED_2_5GB:
  653. return SPEED_2500;
  654. case BNXT_LINK_SPEED_10GB:
  655. return SPEED_10000;
  656. case BNXT_LINK_SPEED_20GB:
  657. return SPEED_20000;
  658. case BNXT_LINK_SPEED_25GB:
  659. return SPEED_25000;
  660. case BNXT_LINK_SPEED_40GB:
  661. return SPEED_40000;
  662. case BNXT_LINK_SPEED_50GB:
  663. return SPEED_50000;
  664. default:
  665. return SPEED_UNKNOWN;
  666. }
  667. }
  668. static int bnxt_get_link_ksettings(struct net_device *dev,
  669. struct ethtool_link_ksettings *lk_ksettings)
  670. {
  671. struct bnxt *bp = netdev_priv(dev);
  672. struct bnxt_link_info *link_info = &bp->link_info;
  673. struct ethtool_link_settings *base = &lk_ksettings->base;
  674. u32 ethtool_speed;
  675. ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported);
  676. bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings);
  677. ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising);
  678. if (link_info->autoneg) {
  679. bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings);
  680. ethtool_link_ksettings_add_link_mode(lk_ksettings,
  681. advertising, Autoneg);
  682. base->autoneg = AUTONEG_ENABLE;
  683. if (link_info->phy_link_status == BNXT_LINK_LINK)
  684. bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings);
  685. ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed);
  686. if (!netif_carrier_ok(dev))
  687. base->duplex = DUPLEX_UNKNOWN;
  688. else if (link_info->duplex & BNXT_LINK_DUPLEX_FULL)
  689. base->duplex = DUPLEX_FULL;
  690. else
  691. base->duplex = DUPLEX_HALF;
  692. } else {
  693. base->autoneg = AUTONEG_DISABLE;
  694. ethtool_speed =
  695. bnxt_fw_to_ethtool_speed(link_info->req_link_speed);
  696. base->duplex = DUPLEX_HALF;
  697. if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL)
  698. base->duplex = DUPLEX_FULL;
  699. }
  700. base->speed = ethtool_speed;
  701. base->port = PORT_NONE;
  702. if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
  703. base->port = PORT_TP;
  704. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  705. TP);
  706. ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
  707. TP);
  708. } else {
  709. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  710. FIBRE);
  711. ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
  712. FIBRE);
  713. if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC)
  714. base->port = PORT_DA;
  715. else if (link_info->media_type ==
  716. PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE)
  717. base->port = PORT_FIBRE;
  718. }
  719. base->phy_address = link_info->phy_addr;
  720. return 0;
  721. }
  722. static u32 bnxt_get_fw_speed(struct net_device *dev, u16 ethtool_speed)
  723. {
  724. struct bnxt *bp = netdev_priv(dev);
  725. struct bnxt_link_info *link_info = &bp->link_info;
  726. u16 support_spds = link_info->support_speeds;
  727. u32 fw_speed = 0;
  728. switch (ethtool_speed) {
  729. case SPEED_100:
  730. if (support_spds & BNXT_LINK_SPEED_MSK_100MB)
  731. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB;
  732. break;
  733. case SPEED_1000:
  734. if (support_spds & BNXT_LINK_SPEED_MSK_1GB)
  735. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB;
  736. break;
  737. case SPEED_2500:
  738. if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB)
  739. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB;
  740. break;
  741. case SPEED_10000:
  742. if (support_spds & BNXT_LINK_SPEED_MSK_10GB)
  743. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB;
  744. break;
  745. case SPEED_20000:
  746. if (support_spds & BNXT_LINK_SPEED_MSK_20GB)
  747. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB;
  748. break;
  749. case SPEED_25000:
  750. if (support_spds & BNXT_LINK_SPEED_MSK_25GB)
  751. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB;
  752. break;
  753. case SPEED_40000:
  754. if (support_spds & BNXT_LINK_SPEED_MSK_40GB)
  755. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB;
  756. break;
  757. case SPEED_50000:
  758. if (support_spds & BNXT_LINK_SPEED_MSK_50GB)
  759. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB;
  760. break;
  761. default:
  762. netdev_err(dev, "unsupported speed!\n");
  763. break;
  764. }
  765. return fw_speed;
  766. }
  767. u16 bnxt_get_fw_auto_link_speeds(u32 advertising)
  768. {
  769. u16 fw_speed_mask = 0;
  770. /* only support autoneg at speed 100, 1000, and 10000 */
  771. if (advertising & (ADVERTISED_100baseT_Full |
  772. ADVERTISED_100baseT_Half)) {
  773. fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB;
  774. }
  775. if (advertising & (ADVERTISED_1000baseT_Full |
  776. ADVERTISED_1000baseT_Half)) {
  777. fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB;
  778. }
  779. if (advertising & ADVERTISED_10000baseT_Full)
  780. fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB;
  781. if (advertising & ADVERTISED_40000baseCR4_Full)
  782. fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB;
  783. return fw_speed_mask;
  784. }
  785. static int bnxt_set_link_ksettings(struct net_device *dev,
  786. const struct ethtool_link_ksettings *lk_ksettings)
  787. {
  788. struct bnxt *bp = netdev_priv(dev);
  789. struct bnxt_link_info *link_info = &bp->link_info;
  790. const struct ethtool_link_settings *base = &lk_ksettings->base;
  791. u32 speed, fw_advertising = 0;
  792. bool set_pause = false;
  793. int rc = 0;
  794. if (!BNXT_SINGLE_PF(bp))
  795. return -EOPNOTSUPP;
  796. if (base->autoneg == AUTONEG_ENABLE) {
  797. BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings,
  798. advertising);
  799. link_info->autoneg |= BNXT_AUTONEG_SPEED;
  800. if (!fw_advertising)
  801. link_info->advertising = link_info->support_auto_speeds;
  802. else
  803. link_info->advertising = fw_advertising;
  804. /* any change to autoneg will cause link change, therefore the
  805. * driver should put back the original pause setting in autoneg
  806. */
  807. set_pause = true;
  808. } else {
  809. u16 fw_speed;
  810. u8 phy_type = link_info->phy_type;
  811. if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET ||
  812. phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE ||
  813. link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
  814. netdev_err(dev, "10GBase-T devices must autoneg\n");
  815. rc = -EINVAL;
  816. goto set_setting_exit;
  817. }
  818. if (base->duplex == DUPLEX_HALF) {
  819. netdev_err(dev, "HALF DUPLEX is not supported!\n");
  820. rc = -EINVAL;
  821. goto set_setting_exit;
  822. }
  823. speed = base->speed;
  824. fw_speed = bnxt_get_fw_speed(dev, speed);
  825. if (!fw_speed) {
  826. rc = -EINVAL;
  827. goto set_setting_exit;
  828. }
  829. link_info->req_link_speed = fw_speed;
  830. link_info->req_duplex = BNXT_LINK_DUPLEX_FULL;
  831. link_info->autoneg = 0;
  832. link_info->advertising = 0;
  833. }
  834. if (netif_running(dev))
  835. rc = bnxt_hwrm_set_link_setting(bp, set_pause, false);
  836. set_setting_exit:
  837. return rc;
  838. }
  839. static void bnxt_get_pauseparam(struct net_device *dev,
  840. struct ethtool_pauseparam *epause)
  841. {
  842. struct bnxt *bp = netdev_priv(dev);
  843. struct bnxt_link_info *link_info = &bp->link_info;
  844. if (BNXT_VF(bp))
  845. return;
  846. epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL);
  847. epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX);
  848. epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX);
  849. }
  850. static int bnxt_set_pauseparam(struct net_device *dev,
  851. struct ethtool_pauseparam *epause)
  852. {
  853. int rc = 0;
  854. struct bnxt *bp = netdev_priv(dev);
  855. struct bnxt_link_info *link_info = &bp->link_info;
  856. if (!BNXT_SINGLE_PF(bp))
  857. return -EOPNOTSUPP;
  858. if (epause->autoneg) {
  859. if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
  860. return -EINVAL;
  861. link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;
  862. if (bp->hwrm_spec_code >= 0x10201)
  863. link_info->req_flow_ctrl =
  864. PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE;
  865. } else {
  866. /* when transition from auto pause to force pause,
  867. * force a link change
  868. */
  869. if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
  870. link_info->force_link_chng = true;
  871. link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL;
  872. link_info->req_flow_ctrl = 0;
  873. }
  874. if (epause->rx_pause)
  875. link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX;
  876. if (epause->tx_pause)
  877. link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;
  878. if (netif_running(dev))
  879. rc = bnxt_hwrm_set_pause(bp);
  880. return rc;
  881. }
  882. static u32 bnxt_get_link(struct net_device *dev)
  883. {
  884. struct bnxt *bp = netdev_priv(dev);
  885. /* TODO: handle MF, VF, driver close case */
  886. return bp->link_info.link_up;
  887. }
  888. static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
  889. u16 ext, u16 *index, u32 *item_length,
  890. u32 *data_length);
  891. static int bnxt_flash_nvram(struct net_device *dev,
  892. u16 dir_type,
  893. u16 dir_ordinal,
  894. u16 dir_ext,
  895. u16 dir_attr,
  896. const u8 *data,
  897. size_t data_len)
  898. {
  899. struct bnxt *bp = netdev_priv(dev);
  900. int rc;
  901. struct hwrm_nvm_write_input req = {0};
  902. dma_addr_t dma_handle;
  903. u8 *kmem;
  904. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1);
  905. req.dir_type = cpu_to_le16(dir_type);
  906. req.dir_ordinal = cpu_to_le16(dir_ordinal);
  907. req.dir_ext = cpu_to_le16(dir_ext);
  908. req.dir_attr = cpu_to_le16(dir_attr);
  909. req.dir_data_length = cpu_to_le32(data_len);
  910. kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle,
  911. GFP_KERNEL);
  912. if (!kmem) {
  913. netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
  914. (unsigned)data_len);
  915. return -ENOMEM;
  916. }
  917. memcpy(kmem, data, data_len);
  918. req.host_src_addr = cpu_to_le64(dma_handle);
  919. rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT);
  920. dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle);
  921. return rc;
  922. }
  923. static int bnxt_firmware_reset(struct net_device *dev,
  924. u16 dir_type)
  925. {
  926. struct bnxt *bp = netdev_priv(dev);
  927. struct hwrm_fw_reset_input req = {0};
  928. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1);
  929. /* TODO: Support ASAP ChiMP self-reset (e.g. upon PF driver unload) */
  930. /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */
  931. /* (e.g. when firmware isn't already running) */
  932. switch (dir_type) {
  933. case BNX_DIR_TYPE_CHIMP_PATCH:
  934. case BNX_DIR_TYPE_BOOTCODE:
  935. case BNX_DIR_TYPE_BOOTCODE_2:
  936. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT;
  937. /* Self-reset ChiMP upon next PCIe reset: */
  938. req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
  939. break;
  940. case BNX_DIR_TYPE_APE_FW:
  941. case BNX_DIR_TYPE_APE_PATCH:
  942. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT;
  943. /* Self-reset APE upon next PCIe reset: */
  944. req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
  945. break;
  946. case BNX_DIR_TYPE_KONG_FW:
  947. case BNX_DIR_TYPE_KONG_PATCH:
  948. req.embedded_proc_type =
  949. FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL;
  950. break;
  951. case BNX_DIR_TYPE_BONO_FW:
  952. case BNX_DIR_TYPE_BONO_PATCH:
  953. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE;
  954. break;
  955. default:
  956. return -EINVAL;
  957. }
  958. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  959. }
  960. static int bnxt_flash_firmware(struct net_device *dev,
  961. u16 dir_type,
  962. const u8 *fw_data,
  963. size_t fw_size)
  964. {
  965. int rc = 0;
  966. u16 code_type;
  967. u32 stored_crc;
  968. u32 calculated_crc;
  969. struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data;
  970. switch (dir_type) {
  971. case BNX_DIR_TYPE_BOOTCODE:
  972. case BNX_DIR_TYPE_BOOTCODE_2:
  973. code_type = CODE_BOOT;
  974. break;
  975. case BNX_DIR_TYPE_CHIMP_PATCH:
  976. code_type = CODE_CHIMP_PATCH;
  977. break;
  978. case BNX_DIR_TYPE_APE_FW:
  979. code_type = CODE_MCTP_PASSTHRU;
  980. break;
  981. case BNX_DIR_TYPE_APE_PATCH:
  982. code_type = CODE_APE_PATCH;
  983. break;
  984. case BNX_DIR_TYPE_KONG_FW:
  985. code_type = CODE_KONG_FW;
  986. break;
  987. case BNX_DIR_TYPE_KONG_PATCH:
  988. code_type = CODE_KONG_PATCH;
  989. break;
  990. case BNX_DIR_TYPE_BONO_FW:
  991. code_type = CODE_BONO_FW;
  992. break;
  993. case BNX_DIR_TYPE_BONO_PATCH:
  994. code_type = CODE_BONO_PATCH;
  995. break;
  996. default:
  997. netdev_err(dev, "Unsupported directory entry type: %u\n",
  998. dir_type);
  999. return -EINVAL;
  1000. }
  1001. if (fw_size < sizeof(struct bnxt_fw_header)) {
  1002. netdev_err(dev, "Invalid firmware file size: %u\n",
  1003. (unsigned int)fw_size);
  1004. return -EINVAL;
  1005. }
  1006. if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) {
  1007. netdev_err(dev, "Invalid firmware signature: %08X\n",
  1008. le32_to_cpu(header->signature));
  1009. return -EINVAL;
  1010. }
  1011. if (header->code_type != code_type) {
  1012. netdev_err(dev, "Expected firmware type: %d, read: %d\n",
  1013. code_type, header->code_type);
  1014. return -EINVAL;
  1015. }
  1016. if (header->device != DEVICE_CUMULUS_FAMILY) {
  1017. netdev_err(dev, "Expected firmware device family %d, read: %d\n",
  1018. DEVICE_CUMULUS_FAMILY, header->device);
  1019. return -EINVAL;
  1020. }
  1021. /* Confirm the CRC32 checksum of the file: */
  1022. stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
  1023. sizeof(stored_crc)));
  1024. calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
  1025. if (calculated_crc != stored_crc) {
  1026. netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n",
  1027. (unsigned long)stored_crc,
  1028. (unsigned long)calculated_crc);
  1029. return -EINVAL;
  1030. }
  1031. rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
  1032. 0, 0, fw_data, fw_size);
  1033. if (rc == 0) /* Firmware update successful */
  1034. rc = bnxt_firmware_reset(dev, dir_type);
  1035. return rc;
  1036. }
  1037. static int bnxt_flash_microcode(struct net_device *dev,
  1038. u16 dir_type,
  1039. const u8 *fw_data,
  1040. size_t fw_size)
  1041. {
  1042. struct bnxt_ucode_trailer *trailer;
  1043. u32 calculated_crc;
  1044. u32 stored_crc;
  1045. int rc = 0;
  1046. if (fw_size < sizeof(struct bnxt_ucode_trailer)) {
  1047. netdev_err(dev, "Invalid microcode file size: %u\n",
  1048. (unsigned int)fw_size);
  1049. return -EINVAL;
  1050. }
  1051. trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size -
  1052. sizeof(*trailer)));
  1053. if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) {
  1054. netdev_err(dev, "Invalid microcode trailer signature: %08X\n",
  1055. le32_to_cpu(trailer->sig));
  1056. return -EINVAL;
  1057. }
  1058. if (le16_to_cpu(trailer->dir_type) != dir_type) {
  1059. netdev_err(dev, "Expected microcode type: %d, read: %d\n",
  1060. dir_type, le16_to_cpu(trailer->dir_type));
  1061. return -EINVAL;
  1062. }
  1063. if (le16_to_cpu(trailer->trailer_length) <
  1064. sizeof(struct bnxt_ucode_trailer)) {
  1065. netdev_err(dev, "Invalid microcode trailer length: %d\n",
  1066. le16_to_cpu(trailer->trailer_length));
  1067. return -EINVAL;
  1068. }
  1069. /* Confirm the CRC32 checksum of the file: */
  1070. stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
  1071. sizeof(stored_crc)));
  1072. calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
  1073. if (calculated_crc != stored_crc) {
  1074. netdev_err(dev,
  1075. "CRC32 (%08lX) does not match calculated: %08lX\n",
  1076. (unsigned long)stored_crc,
  1077. (unsigned long)calculated_crc);
  1078. return -EINVAL;
  1079. }
  1080. rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
  1081. 0, 0, fw_data, fw_size);
  1082. return rc;
  1083. }
  1084. static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type)
  1085. {
  1086. switch (dir_type) {
  1087. case BNX_DIR_TYPE_CHIMP_PATCH:
  1088. case BNX_DIR_TYPE_BOOTCODE:
  1089. case BNX_DIR_TYPE_BOOTCODE_2:
  1090. case BNX_DIR_TYPE_APE_FW:
  1091. case BNX_DIR_TYPE_APE_PATCH:
  1092. case BNX_DIR_TYPE_KONG_FW:
  1093. case BNX_DIR_TYPE_KONG_PATCH:
  1094. case BNX_DIR_TYPE_BONO_FW:
  1095. case BNX_DIR_TYPE_BONO_PATCH:
  1096. return true;
  1097. }
  1098. return false;
  1099. }
  1100. static bool bnxt_dir_type_is_other_exec_format(u16 dir_type)
  1101. {
  1102. switch (dir_type) {
  1103. case BNX_DIR_TYPE_AVS:
  1104. case BNX_DIR_TYPE_EXP_ROM_MBA:
  1105. case BNX_DIR_TYPE_PCIE:
  1106. case BNX_DIR_TYPE_TSCF_UCODE:
  1107. case BNX_DIR_TYPE_EXT_PHY:
  1108. case BNX_DIR_TYPE_CCM:
  1109. case BNX_DIR_TYPE_ISCSI_BOOT:
  1110. case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
  1111. case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
  1112. return true;
  1113. }
  1114. return false;
  1115. }
  1116. static bool bnxt_dir_type_is_executable(u16 dir_type)
  1117. {
  1118. return bnxt_dir_type_is_ape_bin_format(dir_type) ||
  1119. bnxt_dir_type_is_other_exec_format(dir_type);
  1120. }
  1121. static int bnxt_flash_firmware_from_file(struct net_device *dev,
  1122. u16 dir_type,
  1123. const char *filename)
  1124. {
  1125. const struct firmware *fw;
  1126. int rc;
  1127. rc = request_firmware(&fw, filename, &dev->dev);
  1128. if (rc != 0) {
  1129. netdev_err(dev, "Error %d requesting firmware file: %s\n",
  1130. rc, filename);
  1131. return rc;
  1132. }
  1133. if (bnxt_dir_type_is_ape_bin_format(dir_type) == true)
  1134. rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size);
  1135. else if (bnxt_dir_type_is_other_exec_format(dir_type) == true)
  1136. rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size);
  1137. else
  1138. rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
  1139. 0, 0, fw->data, fw->size);
  1140. release_firmware(fw);
  1141. return rc;
  1142. }
  1143. static int bnxt_flash_package_from_file(struct net_device *dev,
  1144. char *filename, u32 install_type)
  1145. {
  1146. struct bnxt *bp = netdev_priv(dev);
  1147. struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr;
  1148. struct hwrm_nvm_install_update_input install = {0};
  1149. const struct firmware *fw;
  1150. u32 item_len;
  1151. u16 index;
  1152. int rc;
  1153. bnxt_hwrm_fw_set_time(bp);
  1154. if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
  1155. BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
  1156. &index, &item_len, NULL) != 0) {
  1157. netdev_err(dev, "PKG update area not created in nvram\n");
  1158. return -ENOBUFS;
  1159. }
  1160. rc = request_firmware(&fw, filename, &dev->dev);
  1161. if (rc != 0) {
  1162. netdev_err(dev, "PKG error %d requesting file: %s\n",
  1163. rc, filename);
  1164. return rc;
  1165. }
  1166. if (fw->size > item_len) {
  1167. netdev_err(dev, "PKG insufficient update area in nvram: %lu",
  1168. (unsigned long)fw->size);
  1169. rc = -EFBIG;
  1170. } else {
  1171. dma_addr_t dma_handle;
  1172. u8 *kmem;
  1173. struct hwrm_nvm_modify_input modify = {0};
  1174. bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1);
  1175. modify.dir_idx = cpu_to_le16(index);
  1176. modify.len = cpu_to_le32(fw->size);
  1177. kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size,
  1178. &dma_handle, GFP_KERNEL);
  1179. if (!kmem) {
  1180. netdev_err(dev,
  1181. "dma_alloc_coherent failure, length = %u\n",
  1182. (unsigned int)fw->size);
  1183. rc = -ENOMEM;
  1184. } else {
  1185. memcpy(kmem, fw->data, fw->size);
  1186. modify.host_src_addr = cpu_to_le64(dma_handle);
  1187. rc = hwrm_send_message(bp, &modify, sizeof(modify),
  1188. FLASH_PACKAGE_TIMEOUT);
  1189. dma_free_coherent(&bp->pdev->dev, fw->size, kmem,
  1190. dma_handle);
  1191. }
  1192. }
  1193. release_firmware(fw);
  1194. if (rc)
  1195. return rc;
  1196. if ((install_type & 0xffff) == 0)
  1197. install_type >>= 16;
  1198. bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1);
  1199. install.install_type = cpu_to_le32(install_type);
  1200. rc = hwrm_send_message(bp, &install, sizeof(install),
  1201. INSTALL_PACKAGE_TIMEOUT);
  1202. if (rc)
  1203. return -EOPNOTSUPP;
  1204. if (resp->result) {
  1205. netdev_err(dev, "PKG install error = %d, problem_item = %d\n",
  1206. (s8)resp->result, (int)resp->problem_item);
  1207. return -ENOPKG;
  1208. }
  1209. return 0;
  1210. }
  1211. static int bnxt_flash_device(struct net_device *dev,
  1212. struct ethtool_flash *flash)
  1213. {
  1214. if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) {
  1215. netdev_err(dev, "flashdev not supported from a virtual function\n");
  1216. return -EINVAL;
  1217. }
  1218. if (flash->region == ETHTOOL_FLASH_ALL_REGIONS ||
  1219. flash->region > 0xffff)
  1220. return bnxt_flash_package_from_file(dev, flash->data,
  1221. flash->region);
  1222. return bnxt_flash_firmware_from_file(dev, flash->region, flash->data);
  1223. }
  1224. static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length)
  1225. {
  1226. struct bnxt *bp = netdev_priv(dev);
  1227. int rc;
  1228. struct hwrm_nvm_get_dir_info_input req = {0};
  1229. struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr;
  1230. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1);
  1231. mutex_lock(&bp->hwrm_cmd_lock);
  1232. rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1233. if (!rc) {
  1234. *entries = le32_to_cpu(output->entries);
  1235. *length = le32_to_cpu(output->entry_length);
  1236. }
  1237. mutex_unlock(&bp->hwrm_cmd_lock);
  1238. return rc;
  1239. }
  1240. static int bnxt_get_eeprom_len(struct net_device *dev)
  1241. {
  1242. /* The -1 return value allows the entire 32-bit range of offsets to be
  1243. * passed via the ethtool command-line utility.
  1244. */
  1245. return -1;
  1246. }
  1247. static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data)
  1248. {
  1249. struct bnxt *bp = netdev_priv(dev);
  1250. int rc;
  1251. u32 dir_entries;
  1252. u32 entry_length;
  1253. u8 *buf;
  1254. size_t buflen;
  1255. dma_addr_t dma_handle;
  1256. struct hwrm_nvm_get_dir_entries_input req = {0};
  1257. rc = nvm_get_dir_info(dev, &dir_entries, &entry_length);
  1258. if (rc != 0)
  1259. return rc;
  1260. /* Insert 2 bytes of directory info (count and size of entries) */
  1261. if (len < 2)
  1262. return -EINVAL;
  1263. *data++ = dir_entries;
  1264. *data++ = entry_length;
  1265. len -= 2;
  1266. memset(data, 0xff, len);
  1267. buflen = dir_entries * entry_length;
  1268. buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle,
  1269. GFP_KERNEL);
  1270. if (!buf) {
  1271. netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
  1272. (unsigned)buflen);
  1273. return -ENOMEM;
  1274. }
  1275. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1);
  1276. req.host_dest_addr = cpu_to_le64(dma_handle);
  1277. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1278. if (rc == 0)
  1279. memcpy(data, buf, len > buflen ? buflen : len);
  1280. dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle);
  1281. return rc;
  1282. }
  1283. static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset,
  1284. u32 length, u8 *data)
  1285. {
  1286. struct bnxt *bp = netdev_priv(dev);
  1287. int rc;
  1288. u8 *buf;
  1289. dma_addr_t dma_handle;
  1290. struct hwrm_nvm_read_input req = {0};
  1291. buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle,
  1292. GFP_KERNEL);
  1293. if (!buf) {
  1294. netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
  1295. (unsigned)length);
  1296. return -ENOMEM;
  1297. }
  1298. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1);
  1299. req.host_dest_addr = cpu_to_le64(dma_handle);
  1300. req.dir_idx = cpu_to_le16(index);
  1301. req.offset = cpu_to_le32(offset);
  1302. req.len = cpu_to_le32(length);
  1303. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1304. if (rc == 0)
  1305. memcpy(data, buf, length);
  1306. dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle);
  1307. return rc;
  1308. }
  1309. static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
  1310. u16 ext, u16 *index, u32 *item_length,
  1311. u32 *data_length)
  1312. {
  1313. struct bnxt *bp = netdev_priv(dev);
  1314. int rc;
  1315. struct hwrm_nvm_find_dir_entry_input req = {0};
  1316. struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr;
  1317. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1);
  1318. req.enables = 0;
  1319. req.dir_idx = 0;
  1320. req.dir_type = cpu_to_le16(type);
  1321. req.dir_ordinal = cpu_to_le16(ordinal);
  1322. req.dir_ext = cpu_to_le16(ext);
  1323. req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ;
  1324. rc = hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1325. if (rc == 0) {
  1326. if (index)
  1327. *index = le16_to_cpu(output->dir_idx);
  1328. if (item_length)
  1329. *item_length = le32_to_cpu(output->dir_item_length);
  1330. if (data_length)
  1331. *data_length = le32_to_cpu(output->dir_data_length);
  1332. }
  1333. return rc;
  1334. }
  1335. static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen)
  1336. {
  1337. char *retval = NULL;
  1338. char *p;
  1339. char *value;
  1340. int field = 0;
  1341. if (datalen < 1)
  1342. return NULL;
  1343. /* null-terminate the log data (removing last '\n'): */
  1344. data[datalen - 1] = 0;
  1345. for (p = data; *p != 0; p++) {
  1346. field = 0;
  1347. retval = NULL;
  1348. while (*p != 0 && *p != '\n') {
  1349. value = p;
  1350. while (*p != 0 && *p != '\t' && *p != '\n')
  1351. p++;
  1352. if (field == desired_field)
  1353. retval = value;
  1354. if (*p != '\t')
  1355. break;
  1356. *p = 0;
  1357. field++;
  1358. p++;
  1359. }
  1360. if (*p == 0)
  1361. break;
  1362. *p = 0;
  1363. }
  1364. return retval;
  1365. }
  1366. static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen)
  1367. {
  1368. u16 index = 0;
  1369. u32 datalen;
  1370. if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG,
  1371. BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
  1372. &index, NULL, &datalen) != 0)
  1373. return NULL;
  1374. memset(buf, 0, buflen);
  1375. if (bnxt_get_nvram_item(dev, index, 0, datalen, buf) != 0)
  1376. return NULL;
  1377. return bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, buf,
  1378. datalen);
  1379. }
  1380. static int bnxt_get_eeprom(struct net_device *dev,
  1381. struct ethtool_eeprom *eeprom,
  1382. u8 *data)
  1383. {
  1384. u32 index;
  1385. u32 offset;
  1386. if (eeprom->offset == 0) /* special offset value to get directory */
  1387. return bnxt_get_nvram_directory(dev, eeprom->len, data);
  1388. index = eeprom->offset >> 24;
  1389. offset = eeprom->offset & 0xffffff;
  1390. if (index == 0) {
  1391. netdev_err(dev, "unsupported index value: %d\n", index);
  1392. return -EINVAL;
  1393. }
  1394. return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data);
  1395. }
  1396. static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index)
  1397. {
  1398. struct bnxt *bp = netdev_priv(dev);
  1399. struct hwrm_nvm_erase_dir_entry_input req = {0};
  1400. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1);
  1401. req.dir_idx = cpu_to_le16(index);
  1402. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1403. }
  1404. static int bnxt_set_eeprom(struct net_device *dev,
  1405. struct ethtool_eeprom *eeprom,
  1406. u8 *data)
  1407. {
  1408. struct bnxt *bp = netdev_priv(dev);
  1409. u8 index, dir_op;
  1410. u16 type, ext, ordinal, attr;
  1411. if (!BNXT_PF(bp)) {
  1412. netdev_err(dev, "NVM write not supported from a virtual function\n");
  1413. return -EINVAL;
  1414. }
  1415. type = eeprom->magic >> 16;
  1416. if (type == 0xffff) { /* special value for directory operations */
  1417. index = eeprom->magic & 0xff;
  1418. dir_op = eeprom->magic >> 8;
  1419. if (index == 0)
  1420. return -EINVAL;
  1421. switch (dir_op) {
  1422. case 0x0e: /* erase */
  1423. if (eeprom->offset != ~eeprom->magic)
  1424. return -EINVAL;
  1425. return bnxt_erase_nvram_directory(dev, index - 1);
  1426. default:
  1427. return -EINVAL;
  1428. }
  1429. }
  1430. /* Create or re-write an NVM item: */
  1431. if (bnxt_dir_type_is_executable(type) == true)
  1432. return -EOPNOTSUPP;
  1433. ext = eeprom->magic & 0xffff;
  1434. ordinal = eeprom->offset >> 16;
  1435. attr = eeprom->offset & 0xffff;
  1436. return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data,
  1437. eeprom->len);
  1438. }
  1439. static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata)
  1440. {
  1441. struct bnxt *bp = netdev_priv(dev);
  1442. struct ethtool_eee *eee = &bp->eee;
  1443. struct bnxt_link_info *link_info = &bp->link_info;
  1444. u32 advertising =
  1445. _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0);
  1446. int rc = 0;
  1447. if (!BNXT_SINGLE_PF(bp))
  1448. return -EOPNOTSUPP;
  1449. if (!(bp->flags & BNXT_FLAG_EEE_CAP))
  1450. return -EOPNOTSUPP;
  1451. if (!edata->eee_enabled)
  1452. goto eee_ok;
  1453. if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
  1454. netdev_warn(dev, "EEE requires autoneg\n");
  1455. return -EINVAL;
  1456. }
  1457. if (edata->tx_lpi_enabled) {
  1458. if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi ||
  1459. edata->tx_lpi_timer < bp->lpi_tmr_lo)) {
  1460. netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n",
  1461. bp->lpi_tmr_lo, bp->lpi_tmr_hi);
  1462. return -EINVAL;
  1463. } else if (!bp->lpi_tmr_hi) {
  1464. edata->tx_lpi_timer = eee->tx_lpi_timer;
  1465. }
  1466. }
  1467. if (!edata->advertised) {
  1468. edata->advertised = advertising & eee->supported;
  1469. } else if (edata->advertised & ~advertising) {
  1470. netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
  1471. edata->advertised, advertising);
  1472. return -EINVAL;
  1473. }
  1474. eee->advertised = edata->advertised;
  1475. eee->tx_lpi_enabled = edata->tx_lpi_enabled;
  1476. eee->tx_lpi_timer = edata->tx_lpi_timer;
  1477. eee_ok:
  1478. eee->eee_enabled = edata->eee_enabled;
  1479. if (netif_running(dev))
  1480. rc = bnxt_hwrm_set_link_setting(bp, false, true);
  1481. return rc;
  1482. }
  1483. static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata)
  1484. {
  1485. struct bnxt *bp = netdev_priv(dev);
  1486. if (!(bp->flags & BNXT_FLAG_EEE_CAP))
  1487. return -EOPNOTSUPP;
  1488. *edata = bp->eee;
  1489. if (!bp->eee.eee_enabled) {
  1490. /* Preserve tx_lpi_timer so that the last value will be used
  1491. * by default when it is re-enabled.
  1492. */
  1493. edata->advertised = 0;
  1494. edata->tx_lpi_enabled = 0;
  1495. }
  1496. if (!bp->eee.eee_active)
  1497. edata->lp_advertised = 0;
  1498. return 0;
  1499. }
  1500. static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr,
  1501. u16 page_number, u16 start_addr,
  1502. u16 data_length, u8 *buf)
  1503. {
  1504. struct hwrm_port_phy_i2c_read_input req = {0};
  1505. struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
  1506. int rc, byte_offset = 0;
  1507. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
  1508. req.i2c_slave_addr = i2c_addr;
  1509. req.page_number = cpu_to_le16(page_number);
  1510. req.port_id = cpu_to_le16(bp->pf.port_id);
  1511. do {
  1512. u16 xfer_size;
  1513. xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE);
  1514. data_length -= xfer_size;
  1515. req.page_offset = cpu_to_le16(start_addr + byte_offset);
  1516. req.data_length = xfer_size;
  1517. req.enables = cpu_to_le32(start_addr + byte_offset ?
  1518. PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0);
  1519. mutex_lock(&bp->hwrm_cmd_lock);
  1520. rc = _hwrm_send_message(bp, &req, sizeof(req),
  1521. HWRM_CMD_TIMEOUT);
  1522. if (!rc)
  1523. memcpy(buf + byte_offset, output->data, xfer_size);
  1524. mutex_unlock(&bp->hwrm_cmd_lock);
  1525. byte_offset += xfer_size;
  1526. } while (!rc && data_length > 0);
  1527. return rc;
  1528. }
  1529. static int bnxt_get_module_info(struct net_device *dev,
  1530. struct ethtool_modinfo *modinfo)
  1531. {
  1532. struct bnxt *bp = netdev_priv(dev);
  1533. struct hwrm_port_phy_i2c_read_input req = {0};
  1534. struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
  1535. int rc;
  1536. /* No point in going further if phy status indicates
  1537. * module is not inserted or if it is powered down or
  1538. * if it is of type 10GBase-T
  1539. */
  1540. if (bp->link_info.module_status >
  1541. PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)
  1542. return -EOPNOTSUPP;
  1543. /* This feature is not supported in older firmware versions */
  1544. if (bp->hwrm_spec_code < 0x10202)
  1545. return -EOPNOTSUPP;
  1546. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
  1547. req.i2c_slave_addr = I2C_DEV_ADDR_A0;
  1548. req.page_number = 0;
  1549. req.page_offset = cpu_to_le16(SFP_EEPROM_SFF_8472_COMP_ADDR);
  1550. req.data_length = SFP_EEPROM_SFF_8472_COMP_SIZE;
  1551. req.port_id = cpu_to_le16(bp->pf.port_id);
  1552. mutex_lock(&bp->hwrm_cmd_lock);
  1553. rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1554. if (!rc) {
  1555. u32 module_id = le32_to_cpu(output->data[0]);
  1556. switch (module_id) {
  1557. case SFF_MODULE_ID_SFP:
  1558. modinfo->type = ETH_MODULE_SFF_8472;
  1559. modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
  1560. break;
  1561. case SFF_MODULE_ID_QSFP:
  1562. case SFF_MODULE_ID_QSFP_PLUS:
  1563. modinfo->type = ETH_MODULE_SFF_8436;
  1564. modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
  1565. break;
  1566. case SFF_MODULE_ID_QSFP28:
  1567. modinfo->type = ETH_MODULE_SFF_8636;
  1568. modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
  1569. break;
  1570. default:
  1571. rc = -EOPNOTSUPP;
  1572. break;
  1573. }
  1574. }
  1575. mutex_unlock(&bp->hwrm_cmd_lock);
  1576. return rc;
  1577. }
  1578. static int bnxt_get_module_eeprom(struct net_device *dev,
  1579. struct ethtool_eeprom *eeprom,
  1580. u8 *data)
  1581. {
  1582. struct bnxt *bp = netdev_priv(dev);
  1583. u16 start = eeprom->offset, length = eeprom->len;
  1584. int rc = 0;
  1585. memset(data, 0, eeprom->len);
  1586. /* Read A0 portion of the EEPROM */
  1587. if (start < ETH_MODULE_SFF_8436_LEN) {
  1588. if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN)
  1589. length = ETH_MODULE_SFF_8436_LEN - start;
  1590. rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0,
  1591. start, length, data);
  1592. if (rc)
  1593. return rc;
  1594. start += length;
  1595. data += length;
  1596. length = eeprom->len - length;
  1597. }
  1598. /* Read A2 portion of the EEPROM */
  1599. if (length) {
  1600. start -= ETH_MODULE_SFF_8436_LEN;
  1601. rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1,
  1602. start, length, data);
  1603. }
  1604. return rc;
  1605. }
  1606. static int bnxt_nway_reset(struct net_device *dev)
  1607. {
  1608. int rc = 0;
  1609. struct bnxt *bp = netdev_priv(dev);
  1610. struct bnxt_link_info *link_info = &bp->link_info;
  1611. if (!BNXT_SINGLE_PF(bp))
  1612. return -EOPNOTSUPP;
  1613. if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
  1614. return -EINVAL;
  1615. if (netif_running(dev))
  1616. rc = bnxt_hwrm_set_link_setting(bp, true, false);
  1617. return rc;
  1618. }
  1619. const struct ethtool_ops bnxt_ethtool_ops = {
  1620. .get_link_ksettings = bnxt_get_link_ksettings,
  1621. .set_link_ksettings = bnxt_set_link_ksettings,
  1622. .get_pauseparam = bnxt_get_pauseparam,
  1623. .set_pauseparam = bnxt_set_pauseparam,
  1624. .get_drvinfo = bnxt_get_drvinfo,
  1625. .get_coalesce = bnxt_get_coalesce,
  1626. .set_coalesce = bnxt_set_coalesce,
  1627. .get_msglevel = bnxt_get_msglevel,
  1628. .set_msglevel = bnxt_set_msglevel,
  1629. .get_sset_count = bnxt_get_sset_count,
  1630. .get_strings = bnxt_get_strings,
  1631. .get_ethtool_stats = bnxt_get_ethtool_stats,
  1632. .set_ringparam = bnxt_set_ringparam,
  1633. .get_ringparam = bnxt_get_ringparam,
  1634. .get_channels = bnxt_get_channels,
  1635. .set_channels = bnxt_set_channels,
  1636. #ifdef CONFIG_RFS_ACCEL
  1637. .get_rxnfc = bnxt_get_rxnfc,
  1638. #endif
  1639. .get_rxfh_indir_size = bnxt_get_rxfh_indir_size,
  1640. .get_rxfh_key_size = bnxt_get_rxfh_key_size,
  1641. .get_rxfh = bnxt_get_rxfh,
  1642. .flash_device = bnxt_flash_device,
  1643. .get_eeprom_len = bnxt_get_eeprom_len,
  1644. .get_eeprom = bnxt_get_eeprom,
  1645. .set_eeprom = bnxt_set_eeprom,
  1646. .get_link = bnxt_get_link,
  1647. .get_eee = bnxt_get_eee,
  1648. .set_eee = bnxt_set_eee,
  1649. .get_module_info = bnxt_get_module_info,
  1650. .get_module_eeprom = bnxt_get_module_eeprom,
  1651. .nway_reset = bnxt_nway_reset
  1652. };