bnx2x_stats.c 62 KB

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  1. /* bnx2x_stats.c: QLogic Everest network driver.
  2. *
  3. * Copyright (c) 2007-2013 Broadcom Corporation
  4. * Copyright (c) 2014 QLogic Corporation
  5. * All rights reserved
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation.
  10. *
  11. * Maintained by: Ariel Elior <ariel.elior@qlogic.com>
  12. * Written by: Eliezer Tamir
  13. * Based on code from Michael Chan's bnx2 driver
  14. * UDP CSUM errata workaround by Arik Gendelman
  15. * Slowpath and fastpath rework by Vladislav Zolotarov
  16. * Statistics and Link management by Yitchak Gertner
  17. *
  18. */
  19. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  20. #include "bnx2x_stats.h"
  21. #include "bnx2x_cmn.h"
  22. #include "bnx2x_sriov.h"
  23. /* Statistics */
  24. /*
  25. * General service functions
  26. */
  27. static inline long bnx2x_hilo(u32 *hiref)
  28. {
  29. u32 lo = *(hiref + 1);
  30. #if (BITS_PER_LONG == 64)
  31. u32 hi = *hiref;
  32. return HILO_U64(hi, lo);
  33. #else
  34. return lo;
  35. #endif
  36. }
  37. static inline u16 bnx2x_get_port_stats_dma_len(struct bnx2x *bp)
  38. {
  39. u16 res = 0;
  40. /* 'newest' convention - shmem2 cotains the size of the port stats */
  41. if (SHMEM2_HAS(bp, sizeof_port_stats)) {
  42. u32 size = SHMEM2_RD(bp, sizeof_port_stats);
  43. if (size)
  44. res = size;
  45. /* prevent newer BC from causing buffer overflow */
  46. if (res > sizeof(struct host_port_stats))
  47. res = sizeof(struct host_port_stats);
  48. }
  49. /* Older convention - all BCs support the port stats' fields up until
  50. * the 'not_used' field
  51. */
  52. if (!res) {
  53. res = offsetof(struct host_port_stats, not_used) + 4;
  54. /* if PFC stats are supported by the MFW, DMA them as well */
  55. if (bp->flags & BC_SUPPORTS_PFC_STATS) {
  56. res += offsetof(struct host_port_stats,
  57. pfc_frames_rx_lo) -
  58. offsetof(struct host_port_stats,
  59. pfc_frames_tx_hi) + 4 ;
  60. }
  61. }
  62. res >>= 2;
  63. WARN_ON(res > 2 * DMAE_LEN32_RD_MAX);
  64. return res;
  65. }
  66. /*
  67. * Init service functions
  68. */
  69. static void bnx2x_dp_stats(struct bnx2x *bp)
  70. {
  71. int i;
  72. DP(BNX2X_MSG_STATS, "dumping stats:\n"
  73. "fw_stats_req\n"
  74. " hdr\n"
  75. " cmd_num %d\n"
  76. " reserved0 %d\n"
  77. " drv_stats_counter %d\n"
  78. " reserved1 %d\n"
  79. " stats_counters_addrs %x %x\n",
  80. bp->fw_stats_req->hdr.cmd_num,
  81. bp->fw_stats_req->hdr.reserved0,
  82. bp->fw_stats_req->hdr.drv_stats_counter,
  83. bp->fw_stats_req->hdr.reserved1,
  84. bp->fw_stats_req->hdr.stats_counters_addrs.hi,
  85. bp->fw_stats_req->hdr.stats_counters_addrs.lo);
  86. for (i = 0; i < bp->fw_stats_req->hdr.cmd_num; i++) {
  87. DP(BNX2X_MSG_STATS,
  88. "query[%d]\n"
  89. " kind %d\n"
  90. " index %d\n"
  91. " funcID %d\n"
  92. " reserved %d\n"
  93. " address %x %x\n",
  94. i, bp->fw_stats_req->query[i].kind,
  95. bp->fw_stats_req->query[i].index,
  96. bp->fw_stats_req->query[i].funcID,
  97. bp->fw_stats_req->query[i].reserved,
  98. bp->fw_stats_req->query[i].address.hi,
  99. bp->fw_stats_req->query[i].address.lo);
  100. }
  101. }
  102. /* Post the next statistics ramrod. Protect it with the spin in
  103. * order to ensure the strict order between statistics ramrods
  104. * (each ramrod has a sequence number passed in a
  105. * bp->fw_stats_req->hdr.drv_stats_counter and ramrods must be
  106. * sent in order).
  107. */
  108. static void bnx2x_storm_stats_post(struct bnx2x *bp)
  109. {
  110. int rc;
  111. if (bp->stats_pending)
  112. return;
  113. bp->fw_stats_req->hdr.drv_stats_counter =
  114. cpu_to_le16(bp->stats_counter++);
  115. DP(BNX2X_MSG_STATS, "Sending statistics ramrod %d\n",
  116. le16_to_cpu(bp->fw_stats_req->hdr.drv_stats_counter));
  117. /* adjust the ramrod to include VF queues statistics */
  118. bnx2x_iov_adjust_stats_req(bp);
  119. bnx2x_dp_stats(bp);
  120. /* send FW stats ramrod */
  121. rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_STAT_QUERY, 0,
  122. U64_HI(bp->fw_stats_req_mapping),
  123. U64_LO(bp->fw_stats_req_mapping),
  124. NONE_CONNECTION_TYPE);
  125. if (rc == 0)
  126. bp->stats_pending = 1;
  127. }
  128. static void bnx2x_hw_stats_post(struct bnx2x *bp)
  129. {
  130. struct dmae_command *dmae = &bp->stats_dmae;
  131. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  132. *stats_comp = DMAE_COMP_VAL;
  133. if (CHIP_REV_IS_SLOW(bp))
  134. return;
  135. /* Update MCP's statistics if possible */
  136. if (bp->func_stx)
  137. memcpy(bnx2x_sp(bp, func_stats), &bp->func_stats,
  138. sizeof(bp->func_stats));
  139. /* loader */
  140. if (bp->executer_idx) {
  141. int loader_idx = PMF_DMAE_C(bp);
  142. u32 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  143. true, DMAE_COMP_GRC);
  144. opcode = bnx2x_dmae_opcode_clr_src_reset(opcode);
  145. memset(dmae, 0, sizeof(struct dmae_command));
  146. dmae->opcode = opcode;
  147. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, dmae[0]));
  148. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, dmae[0]));
  149. dmae->dst_addr_lo = (DMAE_REG_CMD_MEM +
  150. sizeof(struct dmae_command) *
  151. (loader_idx + 1)) >> 2;
  152. dmae->dst_addr_hi = 0;
  153. dmae->len = sizeof(struct dmae_command) >> 2;
  154. if (CHIP_IS_E1(bp))
  155. dmae->len--;
  156. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx + 1] >> 2;
  157. dmae->comp_addr_hi = 0;
  158. dmae->comp_val = 1;
  159. *stats_comp = 0;
  160. bnx2x_post_dmae(bp, dmae, loader_idx);
  161. } else if (bp->func_stx) {
  162. *stats_comp = 0;
  163. bnx2x_issue_dmae_with_comp(bp, dmae, stats_comp);
  164. }
  165. }
  166. static void bnx2x_stats_comp(struct bnx2x *bp)
  167. {
  168. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  169. int cnt = 10;
  170. might_sleep();
  171. while (*stats_comp != DMAE_COMP_VAL) {
  172. if (!cnt) {
  173. BNX2X_ERR("timeout waiting for stats finished\n");
  174. break;
  175. }
  176. cnt--;
  177. usleep_range(1000, 2000);
  178. }
  179. }
  180. /*
  181. * Statistics service functions
  182. */
  183. /* should be called under stats_sema */
  184. static void bnx2x_stats_pmf_update(struct bnx2x *bp)
  185. {
  186. struct dmae_command *dmae;
  187. u32 opcode;
  188. int loader_idx = PMF_DMAE_C(bp);
  189. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  190. /* sanity */
  191. if (!bp->port.pmf || !bp->port.port_stx) {
  192. BNX2X_ERR("BUG!\n");
  193. return;
  194. }
  195. bp->executer_idx = 0;
  196. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, false, 0);
  197. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  198. dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_GRC);
  199. dmae->src_addr_lo = bp->port.port_stx >> 2;
  200. dmae->src_addr_hi = 0;
  201. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  202. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  203. dmae->len = DMAE_LEN32_RD_MAX;
  204. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  205. dmae->comp_addr_hi = 0;
  206. dmae->comp_val = 1;
  207. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  208. dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
  209. dmae->src_addr_lo = (bp->port.port_stx >> 2) + DMAE_LEN32_RD_MAX;
  210. dmae->src_addr_hi = 0;
  211. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats) +
  212. DMAE_LEN32_RD_MAX * 4);
  213. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats) +
  214. DMAE_LEN32_RD_MAX * 4);
  215. dmae->len = bnx2x_get_port_stats_dma_len(bp) - DMAE_LEN32_RD_MAX;
  216. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  217. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  218. dmae->comp_val = DMAE_COMP_VAL;
  219. *stats_comp = 0;
  220. bnx2x_hw_stats_post(bp);
  221. bnx2x_stats_comp(bp);
  222. }
  223. static void bnx2x_port_stats_init(struct bnx2x *bp)
  224. {
  225. struct dmae_command *dmae;
  226. int port = BP_PORT(bp);
  227. u32 opcode;
  228. int loader_idx = PMF_DMAE_C(bp);
  229. u32 mac_addr;
  230. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  231. /* sanity */
  232. if (!bp->link_vars.link_up || !bp->port.pmf) {
  233. BNX2X_ERR("BUG!\n");
  234. return;
  235. }
  236. bp->executer_idx = 0;
  237. /* MCP */
  238. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  239. true, DMAE_COMP_GRC);
  240. if (bp->port.port_stx) {
  241. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  242. dmae->opcode = opcode;
  243. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  244. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  245. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  246. dmae->dst_addr_hi = 0;
  247. dmae->len = bnx2x_get_port_stats_dma_len(bp);
  248. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  249. dmae->comp_addr_hi = 0;
  250. dmae->comp_val = 1;
  251. }
  252. if (bp->func_stx) {
  253. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  254. dmae->opcode = opcode;
  255. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  256. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  257. dmae->dst_addr_lo = bp->func_stx >> 2;
  258. dmae->dst_addr_hi = 0;
  259. dmae->len = sizeof(struct host_func_stats) >> 2;
  260. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  261. dmae->comp_addr_hi = 0;
  262. dmae->comp_val = 1;
  263. }
  264. /* MAC */
  265. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
  266. true, DMAE_COMP_GRC);
  267. /* EMAC is special */
  268. if (bp->link_vars.mac_type == MAC_TYPE_EMAC) {
  269. mac_addr = (port ? GRCBASE_EMAC1 : GRCBASE_EMAC0);
  270. /* EMAC_REG_EMAC_RX_STAT_AC (EMAC_REG_EMAC_RX_STAT_AC_COUNT)*/
  271. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  272. dmae->opcode = opcode;
  273. dmae->src_addr_lo = (mac_addr +
  274. EMAC_REG_EMAC_RX_STAT_AC) >> 2;
  275. dmae->src_addr_hi = 0;
  276. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
  277. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
  278. dmae->len = EMAC_REG_EMAC_RX_STAT_AC_COUNT;
  279. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  280. dmae->comp_addr_hi = 0;
  281. dmae->comp_val = 1;
  282. /* EMAC_REG_EMAC_RX_STAT_AC_28 */
  283. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  284. dmae->opcode = opcode;
  285. dmae->src_addr_lo = (mac_addr +
  286. EMAC_REG_EMAC_RX_STAT_AC_28) >> 2;
  287. dmae->src_addr_hi = 0;
  288. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  289. offsetof(struct emac_stats, rx_stat_falsecarriererrors));
  290. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  291. offsetof(struct emac_stats, rx_stat_falsecarriererrors));
  292. dmae->len = 1;
  293. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  294. dmae->comp_addr_hi = 0;
  295. dmae->comp_val = 1;
  296. /* EMAC_REG_EMAC_TX_STAT_AC (EMAC_REG_EMAC_TX_STAT_AC_COUNT)*/
  297. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  298. dmae->opcode = opcode;
  299. dmae->src_addr_lo = (mac_addr +
  300. EMAC_REG_EMAC_TX_STAT_AC) >> 2;
  301. dmae->src_addr_hi = 0;
  302. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  303. offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
  304. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  305. offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
  306. dmae->len = EMAC_REG_EMAC_TX_STAT_AC_COUNT;
  307. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  308. dmae->comp_addr_hi = 0;
  309. dmae->comp_val = 1;
  310. } else {
  311. u32 tx_src_addr_lo, rx_src_addr_lo;
  312. u16 rx_len, tx_len;
  313. /* configure the params according to MAC type */
  314. switch (bp->link_vars.mac_type) {
  315. case MAC_TYPE_BMAC:
  316. mac_addr = (port ? NIG_REG_INGRESS_BMAC1_MEM :
  317. NIG_REG_INGRESS_BMAC0_MEM);
  318. /* BIGMAC_REGISTER_TX_STAT_GTPKT ..
  319. BIGMAC_REGISTER_TX_STAT_GTBYT */
  320. if (CHIP_IS_E1x(bp)) {
  321. tx_src_addr_lo = (mac_addr +
  322. BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
  323. tx_len = (8 + BIGMAC_REGISTER_TX_STAT_GTBYT -
  324. BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
  325. rx_src_addr_lo = (mac_addr +
  326. BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
  327. rx_len = (8 + BIGMAC_REGISTER_RX_STAT_GRIPJ -
  328. BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
  329. } else {
  330. tx_src_addr_lo = (mac_addr +
  331. BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
  332. tx_len = (8 + BIGMAC2_REGISTER_TX_STAT_GTBYT -
  333. BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
  334. rx_src_addr_lo = (mac_addr +
  335. BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
  336. rx_len = (8 + BIGMAC2_REGISTER_RX_STAT_GRIPJ -
  337. BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
  338. }
  339. break;
  340. case MAC_TYPE_UMAC: /* handled by MSTAT */
  341. case MAC_TYPE_XMAC: /* handled by MSTAT */
  342. default:
  343. mac_addr = port ? GRCBASE_MSTAT1 : GRCBASE_MSTAT0;
  344. tx_src_addr_lo = (mac_addr +
  345. MSTAT_REG_TX_STAT_GTXPOK_LO) >> 2;
  346. rx_src_addr_lo = (mac_addr +
  347. MSTAT_REG_RX_STAT_GR64_LO) >> 2;
  348. tx_len = sizeof(bp->slowpath->
  349. mac_stats.mstat_stats.stats_tx) >> 2;
  350. rx_len = sizeof(bp->slowpath->
  351. mac_stats.mstat_stats.stats_rx) >> 2;
  352. break;
  353. }
  354. /* TX stats */
  355. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  356. dmae->opcode = opcode;
  357. dmae->src_addr_lo = tx_src_addr_lo;
  358. dmae->src_addr_hi = 0;
  359. dmae->len = tx_len;
  360. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
  361. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
  362. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  363. dmae->comp_addr_hi = 0;
  364. dmae->comp_val = 1;
  365. /* RX stats */
  366. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  367. dmae->opcode = opcode;
  368. dmae->src_addr_hi = 0;
  369. dmae->src_addr_lo = rx_src_addr_lo;
  370. dmae->dst_addr_lo =
  371. U64_LO(bnx2x_sp_mapping(bp, mac_stats) + (tx_len << 2));
  372. dmae->dst_addr_hi =
  373. U64_HI(bnx2x_sp_mapping(bp, mac_stats) + (tx_len << 2));
  374. dmae->len = rx_len;
  375. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  376. dmae->comp_addr_hi = 0;
  377. dmae->comp_val = 1;
  378. }
  379. /* NIG */
  380. if (!CHIP_IS_E3(bp)) {
  381. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  382. dmae->opcode = opcode;
  383. dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT0 :
  384. NIG_REG_STAT0_EGRESS_MAC_PKT0) >> 2;
  385. dmae->src_addr_hi = 0;
  386. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
  387. offsetof(struct nig_stats, egress_mac_pkt0_lo));
  388. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
  389. offsetof(struct nig_stats, egress_mac_pkt0_lo));
  390. dmae->len = (2*sizeof(u32)) >> 2;
  391. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  392. dmae->comp_addr_hi = 0;
  393. dmae->comp_val = 1;
  394. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  395. dmae->opcode = opcode;
  396. dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 :
  397. NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2;
  398. dmae->src_addr_hi = 0;
  399. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
  400. offsetof(struct nig_stats, egress_mac_pkt1_lo));
  401. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
  402. offsetof(struct nig_stats, egress_mac_pkt1_lo));
  403. dmae->len = (2*sizeof(u32)) >> 2;
  404. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  405. dmae->comp_addr_hi = 0;
  406. dmae->comp_val = 1;
  407. }
  408. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  409. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
  410. true, DMAE_COMP_PCI);
  411. dmae->src_addr_lo = (port ? NIG_REG_STAT1_BRB_DISCARD :
  412. NIG_REG_STAT0_BRB_DISCARD) >> 2;
  413. dmae->src_addr_hi = 0;
  414. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats));
  415. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats));
  416. dmae->len = (sizeof(struct nig_stats) - 4*sizeof(u32)) >> 2;
  417. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  418. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  419. dmae->comp_val = DMAE_COMP_VAL;
  420. *stats_comp = 0;
  421. }
  422. static void bnx2x_func_stats_init(struct bnx2x *bp)
  423. {
  424. struct dmae_command *dmae = &bp->stats_dmae;
  425. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  426. /* sanity */
  427. if (!bp->func_stx) {
  428. BNX2X_ERR("BUG!\n");
  429. return;
  430. }
  431. bp->executer_idx = 0;
  432. memset(dmae, 0, sizeof(struct dmae_command));
  433. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  434. true, DMAE_COMP_PCI);
  435. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  436. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  437. dmae->dst_addr_lo = bp->func_stx >> 2;
  438. dmae->dst_addr_hi = 0;
  439. dmae->len = sizeof(struct host_func_stats) >> 2;
  440. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  441. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  442. dmae->comp_val = DMAE_COMP_VAL;
  443. *stats_comp = 0;
  444. }
  445. /* should be called under stats_sema */
  446. static void bnx2x_stats_start(struct bnx2x *bp)
  447. {
  448. if (IS_PF(bp)) {
  449. if (bp->port.pmf)
  450. bnx2x_port_stats_init(bp);
  451. else if (bp->func_stx)
  452. bnx2x_func_stats_init(bp);
  453. bnx2x_hw_stats_post(bp);
  454. bnx2x_storm_stats_post(bp);
  455. }
  456. }
  457. static void bnx2x_stats_pmf_start(struct bnx2x *bp)
  458. {
  459. bnx2x_stats_comp(bp);
  460. bnx2x_stats_pmf_update(bp);
  461. bnx2x_stats_start(bp);
  462. }
  463. static void bnx2x_stats_restart(struct bnx2x *bp)
  464. {
  465. /* vfs travel through here as part of the statistics FSM, but no action
  466. * is required
  467. */
  468. if (IS_VF(bp))
  469. return;
  470. bnx2x_stats_comp(bp);
  471. bnx2x_stats_start(bp);
  472. }
  473. static void bnx2x_bmac_stats_update(struct bnx2x *bp)
  474. {
  475. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  476. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  477. struct {
  478. u32 lo;
  479. u32 hi;
  480. } diff;
  481. if (CHIP_IS_E1x(bp)) {
  482. struct bmac1_stats *new = bnx2x_sp(bp, mac_stats.bmac1_stats);
  483. /* the macros below will use "bmac1_stats" type */
  484. UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
  485. UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
  486. UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
  487. UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
  488. UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
  489. UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
  490. UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
  491. UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
  492. UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf);
  493. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
  494. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
  495. UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
  496. UPDATE_STAT64(tx_stat_gt127,
  497. tx_stat_etherstatspkts65octetsto127octets);
  498. UPDATE_STAT64(tx_stat_gt255,
  499. tx_stat_etherstatspkts128octetsto255octets);
  500. UPDATE_STAT64(tx_stat_gt511,
  501. tx_stat_etherstatspkts256octetsto511octets);
  502. UPDATE_STAT64(tx_stat_gt1023,
  503. tx_stat_etherstatspkts512octetsto1023octets);
  504. UPDATE_STAT64(tx_stat_gt1518,
  505. tx_stat_etherstatspkts1024octetsto1522octets);
  506. UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047);
  507. UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095);
  508. UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216);
  509. UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383);
  510. UPDATE_STAT64(tx_stat_gterr,
  511. tx_stat_dot3statsinternalmactransmiterrors);
  512. UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl);
  513. } else {
  514. struct bmac2_stats *new = bnx2x_sp(bp, mac_stats.bmac2_stats);
  515. /* the macros below will use "bmac2_stats" type */
  516. UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
  517. UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
  518. UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
  519. UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
  520. UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
  521. UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
  522. UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
  523. UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
  524. UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf);
  525. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
  526. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
  527. UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
  528. UPDATE_STAT64(tx_stat_gt127,
  529. tx_stat_etherstatspkts65octetsto127octets);
  530. UPDATE_STAT64(tx_stat_gt255,
  531. tx_stat_etherstatspkts128octetsto255octets);
  532. UPDATE_STAT64(tx_stat_gt511,
  533. tx_stat_etherstatspkts256octetsto511octets);
  534. UPDATE_STAT64(tx_stat_gt1023,
  535. tx_stat_etherstatspkts512octetsto1023octets);
  536. UPDATE_STAT64(tx_stat_gt1518,
  537. tx_stat_etherstatspkts1024octetsto1522octets);
  538. UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047);
  539. UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095);
  540. UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216);
  541. UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383);
  542. UPDATE_STAT64(tx_stat_gterr,
  543. tx_stat_dot3statsinternalmactransmiterrors);
  544. UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl);
  545. /* collect PFC stats */
  546. pstats->pfc_frames_tx_hi = new->tx_stat_gtpp_hi;
  547. pstats->pfc_frames_tx_lo = new->tx_stat_gtpp_lo;
  548. pstats->pfc_frames_rx_hi = new->rx_stat_grpp_hi;
  549. pstats->pfc_frames_rx_lo = new->rx_stat_grpp_lo;
  550. }
  551. estats->pause_frames_received_hi =
  552. pstats->mac_stx[1].rx_stat_mac_xpf_hi;
  553. estats->pause_frames_received_lo =
  554. pstats->mac_stx[1].rx_stat_mac_xpf_lo;
  555. estats->pause_frames_sent_hi =
  556. pstats->mac_stx[1].tx_stat_outxoffsent_hi;
  557. estats->pause_frames_sent_lo =
  558. pstats->mac_stx[1].tx_stat_outxoffsent_lo;
  559. estats->pfc_frames_received_hi =
  560. pstats->pfc_frames_rx_hi;
  561. estats->pfc_frames_received_lo =
  562. pstats->pfc_frames_rx_lo;
  563. estats->pfc_frames_sent_hi =
  564. pstats->pfc_frames_tx_hi;
  565. estats->pfc_frames_sent_lo =
  566. pstats->pfc_frames_tx_lo;
  567. }
  568. static void bnx2x_mstat_stats_update(struct bnx2x *bp)
  569. {
  570. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  571. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  572. struct mstat_stats *new = bnx2x_sp(bp, mac_stats.mstat_stats);
  573. ADD_STAT64(stats_rx.rx_grerb, rx_stat_ifhcinbadoctets);
  574. ADD_STAT64(stats_rx.rx_grfcs, rx_stat_dot3statsfcserrors);
  575. ADD_STAT64(stats_rx.rx_grund, rx_stat_etherstatsundersizepkts);
  576. ADD_STAT64(stats_rx.rx_grovr, rx_stat_dot3statsframestoolong);
  577. ADD_STAT64(stats_rx.rx_grfrg, rx_stat_etherstatsfragments);
  578. ADD_STAT64(stats_rx.rx_grxcf, rx_stat_maccontrolframesreceived);
  579. ADD_STAT64(stats_rx.rx_grxpf, rx_stat_xoffstateentered);
  580. ADD_STAT64(stats_rx.rx_grxpf, rx_stat_mac_xpf);
  581. ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_outxoffsent);
  582. ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_flowcontroldone);
  583. /* collect pfc stats */
  584. ADD_64(pstats->pfc_frames_tx_hi, new->stats_tx.tx_gtxpp_hi,
  585. pstats->pfc_frames_tx_lo, new->stats_tx.tx_gtxpp_lo);
  586. ADD_64(pstats->pfc_frames_rx_hi, new->stats_rx.rx_grxpp_hi,
  587. pstats->pfc_frames_rx_lo, new->stats_rx.rx_grxpp_lo);
  588. ADD_STAT64(stats_tx.tx_gt64, tx_stat_etherstatspkts64octets);
  589. ADD_STAT64(stats_tx.tx_gt127,
  590. tx_stat_etherstatspkts65octetsto127octets);
  591. ADD_STAT64(stats_tx.tx_gt255,
  592. tx_stat_etherstatspkts128octetsto255octets);
  593. ADD_STAT64(stats_tx.tx_gt511,
  594. tx_stat_etherstatspkts256octetsto511octets);
  595. ADD_STAT64(stats_tx.tx_gt1023,
  596. tx_stat_etherstatspkts512octetsto1023octets);
  597. ADD_STAT64(stats_tx.tx_gt1518,
  598. tx_stat_etherstatspkts1024octetsto1522octets);
  599. ADD_STAT64(stats_tx.tx_gt2047, tx_stat_mac_2047);
  600. ADD_STAT64(stats_tx.tx_gt4095, tx_stat_mac_4095);
  601. ADD_STAT64(stats_tx.tx_gt9216, tx_stat_mac_9216);
  602. ADD_STAT64(stats_tx.tx_gt16383, tx_stat_mac_16383);
  603. ADD_STAT64(stats_tx.tx_gterr,
  604. tx_stat_dot3statsinternalmactransmiterrors);
  605. ADD_STAT64(stats_tx.tx_gtufl, tx_stat_mac_ufl);
  606. estats->etherstatspkts1024octetsto1522octets_hi =
  607. pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_hi;
  608. estats->etherstatspkts1024octetsto1522octets_lo =
  609. pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_lo;
  610. estats->etherstatspktsover1522octets_hi =
  611. pstats->mac_stx[1].tx_stat_mac_2047_hi;
  612. estats->etherstatspktsover1522octets_lo =
  613. pstats->mac_stx[1].tx_stat_mac_2047_lo;
  614. ADD_64(estats->etherstatspktsover1522octets_hi,
  615. pstats->mac_stx[1].tx_stat_mac_4095_hi,
  616. estats->etherstatspktsover1522octets_lo,
  617. pstats->mac_stx[1].tx_stat_mac_4095_lo);
  618. ADD_64(estats->etherstatspktsover1522octets_hi,
  619. pstats->mac_stx[1].tx_stat_mac_9216_hi,
  620. estats->etherstatspktsover1522octets_lo,
  621. pstats->mac_stx[1].tx_stat_mac_9216_lo);
  622. ADD_64(estats->etherstatspktsover1522octets_hi,
  623. pstats->mac_stx[1].tx_stat_mac_16383_hi,
  624. estats->etherstatspktsover1522octets_lo,
  625. pstats->mac_stx[1].tx_stat_mac_16383_lo);
  626. estats->pause_frames_received_hi =
  627. pstats->mac_stx[1].rx_stat_mac_xpf_hi;
  628. estats->pause_frames_received_lo =
  629. pstats->mac_stx[1].rx_stat_mac_xpf_lo;
  630. estats->pause_frames_sent_hi =
  631. pstats->mac_stx[1].tx_stat_outxoffsent_hi;
  632. estats->pause_frames_sent_lo =
  633. pstats->mac_stx[1].tx_stat_outxoffsent_lo;
  634. estats->pfc_frames_received_hi =
  635. pstats->pfc_frames_rx_hi;
  636. estats->pfc_frames_received_lo =
  637. pstats->pfc_frames_rx_lo;
  638. estats->pfc_frames_sent_hi =
  639. pstats->pfc_frames_tx_hi;
  640. estats->pfc_frames_sent_lo =
  641. pstats->pfc_frames_tx_lo;
  642. }
  643. static void bnx2x_emac_stats_update(struct bnx2x *bp)
  644. {
  645. struct emac_stats *new = bnx2x_sp(bp, mac_stats.emac_stats);
  646. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  647. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  648. UPDATE_EXTEND_STAT(rx_stat_ifhcinbadoctets);
  649. UPDATE_EXTEND_STAT(tx_stat_ifhcoutbadoctets);
  650. UPDATE_EXTEND_STAT(rx_stat_dot3statsfcserrors);
  651. UPDATE_EXTEND_STAT(rx_stat_dot3statsalignmenterrors);
  652. UPDATE_EXTEND_STAT(rx_stat_dot3statscarriersenseerrors);
  653. UPDATE_EXTEND_STAT(rx_stat_falsecarriererrors);
  654. UPDATE_EXTEND_STAT(rx_stat_etherstatsundersizepkts);
  655. UPDATE_EXTEND_STAT(rx_stat_dot3statsframestoolong);
  656. UPDATE_EXTEND_STAT(rx_stat_etherstatsfragments);
  657. UPDATE_EXTEND_STAT(rx_stat_etherstatsjabbers);
  658. UPDATE_EXTEND_STAT(rx_stat_maccontrolframesreceived);
  659. UPDATE_EXTEND_STAT(rx_stat_xoffstateentered);
  660. UPDATE_EXTEND_STAT(rx_stat_xonpauseframesreceived);
  661. UPDATE_EXTEND_STAT(rx_stat_xoffpauseframesreceived);
  662. UPDATE_EXTEND_STAT(tx_stat_outxonsent);
  663. UPDATE_EXTEND_STAT(tx_stat_outxoffsent);
  664. UPDATE_EXTEND_STAT(tx_stat_flowcontroldone);
  665. UPDATE_EXTEND_STAT(tx_stat_etherstatscollisions);
  666. UPDATE_EXTEND_STAT(tx_stat_dot3statssinglecollisionframes);
  667. UPDATE_EXTEND_STAT(tx_stat_dot3statsmultiplecollisionframes);
  668. UPDATE_EXTEND_STAT(tx_stat_dot3statsdeferredtransmissions);
  669. UPDATE_EXTEND_STAT(tx_stat_dot3statsexcessivecollisions);
  670. UPDATE_EXTEND_STAT(tx_stat_dot3statslatecollisions);
  671. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts64octets);
  672. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts65octetsto127octets);
  673. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts128octetsto255octets);
  674. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts256octetsto511octets);
  675. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts512octetsto1023octets);
  676. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts1024octetsto1522octets);
  677. UPDATE_EXTEND_STAT(tx_stat_etherstatspktsover1522octets);
  678. UPDATE_EXTEND_STAT(tx_stat_dot3statsinternalmactransmiterrors);
  679. estats->pause_frames_received_hi =
  680. pstats->mac_stx[1].rx_stat_xonpauseframesreceived_hi;
  681. estats->pause_frames_received_lo =
  682. pstats->mac_stx[1].rx_stat_xonpauseframesreceived_lo;
  683. ADD_64(estats->pause_frames_received_hi,
  684. pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi,
  685. estats->pause_frames_received_lo,
  686. pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo);
  687. estats->pause_frames_sent_hi =
  688. pstats->mac_stx[1].tx_stat_outxonsent_hi;
  689. estats->pause_frames_sent_lo =
  690. pstats->mac_stx[1].tx_stat_outxonsent_lo;
  691. ADD_64(estats->pause_frames_sent_hi,
  692. pstats->mac_stx[1].tx_stat_outxoffsent_hi,
  693. estats->pause_frames_sent_lo,
  694. pstats->mac_stx[1].tx_stat_outxoffsent_lo);
  695. }
  696. static int bnx2x_hw_stats_update(struct bnx2x *bp)
  697. {
  698. struct nig_stats *new = bnx2x_sp(bp, nig_stats);
  699. struct nig_stats *old = &(bp->port.old_nig_stats);
  700. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  701. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  702. struct {
  703. u32 lo;
  704. u32 hi;
  705. } diff;
  706. switch (bp->link_vars.mac_type) {
  707. case MAC_TYPE_BMAC:
  708. bnx2x_bmac_stats_update(bp);
  709. break;
  710. case MAC_TYPE_EMAC:
  711. bnx2x_emac_stats_update(bp);
  712. break;
  713. case MAC_TYPE_UMAC:
  714. case MAC_TYPE_XMAC:
  715. bnx2x_mstat_stats_update(bp);
  716. break;
  717. case MAC_TYPE_NONE: /* unreached */
  718. DP(BNX2X_MSG_STATS,
  719. "stats updated by DMAE but no MAC active\n");
  720. return -1;
  721. default: /* unreached */
  722. BNX2X_ERR("Unknown MAC type\n");
  723. }
  724. ADD_EXTEND_64(pstats->brb_drop_hi, pstats->brb_drop_lo,
  725. new->brb_discard - old->brb_discard);
  726. ADD_EXTEND_64(estats->brb_truncate_hi, estats->brb_truncate_lo,
  727. new->brb_truncate - old->brb_truncate);
  728. if (!CHIP_IS_E3(bp)) {
  729. UPDATE_STAT64_NIG(egress_mac_pkt0,
  730. etherstatspkts1024octetsto1522octets);
  731. UPDATE_STAT64_NIG(egress_mac_pkt1,
  732. etherstatspktsover1522octets);
  733. }
  734. memcpy(old, new, sizeof(struct nig_stats));
  735. memcpy(&(estats->rx_stat_ifhcinbadoctets_hi), &(pstats->mac_stx[1]),
  736. sizeof(struct mac_stx));
  737. estats->brb_drop_hi = pstats->brb_drop_hi;
  738. estats->brb_drop_lo = pstats->brb_drop_lo;
  739. pstats->host_port_stats_counter++;
  740. if (CHIP_IS_E3(bp)) {
  741. u32 lpi_reg = BP_PORT(bp) ? MISC_REG_CPMU_LP_SM_ENT_CNT_P1
  742. : MISC_REG_CPMU_LP_SM_ENT_CNT_P0;
  743. estats->eee_tx_lpi += REG_RD(bp, lpi_reg);
  744. }
  745. if (!BP_NOMCP(bp)) {
  746. u32 nig_timer_max =
  747. SHMEM_RD(bp, port_mb[BP_PORT(bp)].stat_nig_timer);
  748. if (nig_timer_max != estats->nig_timer_max) {
  749. estats->nig_timer_max = nig_timer_max;
  750. BNX2X_ERR("NIG timer max (%u)\n",
  751. estats->nig_timer_max);
  752. }
  753. }
  754. return 0;
  755. }
  756. static int bnx2x_storm_stats_validate_counters(struct bnx2x *bp)
  757. {
  758. struct stats_counter *counters = &bp->fw_stats_data->storm_counters;
  759. u16 cur_stats_counter;
  760. /* Make sure we use the value of the counter
  761. * used for sending the last stats ramrod.
  762. */
  763. cur_stats_counter = bp->stats_counter - 1;
  764. /* are storm stats valid? */
  765. if (le16_to_cpu(counters->xstats_counter) != cur_stats_counter) {
  766. DP(BNX2X_MSG_STATS,
  767. "stats not updated by xstorm xstorm counter (0x%x) != stats_counter (0x%x)\n",
  768. le16_to_cpu(counters->xstats_counter), bp->stats_counter);
  769. return -EAGAIN;
  770. }
  771. if (le16_to_cpu(counters->ustats_counter) != cur_stats_counter) {
  772. DP(BNX2X_MSG_STATS,
  773. "stats not updated by ustorm ustorm counter (0x%x) != stats_counter (0x%x)\n",
  774. le16_to_cpu(counters->ustats_counter), bp->stats_counter);
  775. return -EAGAIN;
  776. }
  777. if (le16_to_cpu(counters->cstats_counter) != cur_stats_counter) {
  778. DP(BNX2X_MSG_STATS,
  779. "stats not updated by cstorm cstorm counter (0x%x) != stats_counter (0x%x)\n",
  780. le16_to_cpu(counters->cstats_counter), bp->stats_counter);
  781. return -EAGAIN;
  782. }
  783. if (le16_to_cpu(counters->tstats_counter) != cur_stats_counter) {
  784. DP(BNX2X_MSG_STATS,
  785. "stats not updated by tstorm tstorm counter (0x%x) != stats_counter (0x%x)\n",
  786. le16_to_cpu(counters->tstats_counter), bp->stats_counter);
  787. return -EAGAIN;
  788. }
  789. return 0;
  790. }
  791. static int bnx2x_storm_stats_update(struct bnx2x *bp)
  792. {
  793. struct tstorm_per_port_stats *tport =
  794. &bp->fw_stats_data->port.tstorm_port_statistics;
  795. struct tstorm_per_pf_stats *tfunc =
  796. &bp->fw_stats_data->pf.tstorm_pf_statistics;
  797. struct host_func_stats *fstats = &bp->func_stats;
  798. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  799. struct bnx2x_eth_stats_old *estats_old = &bp->eth_stats_old;
  800. int i;
  801. /* vfs stat counter is managed by pf */
  802. if (IS_PF(bp) && bnx2x_storm_stats_validate_counters(bp))
  803. return -EAGAIN;
  804. estats->error_bytes_received_hi = 0;
  805. estats->error_bytes_received_lo = 0;
  806. for_each_eth_queue(bp, i) {
  807. struct bnx2x_fastpath *fp = &bp->fp[i];
  808. struct tstorm_per_queue_stats *tclient =
  809. &bp->fw_stats_data->queue_stats[i].
  810. tstorm_queue_statistics;
  811. struct tstorm_per_queue_stats *old_tclient =
  812. &bnx2x_fp_stats(bp, fp)->old_tclient;
  813. struct ustorm_per_queue_stats *uclient =
  814. &bp->fw_stats_data->queue_stats[i].
  815. ustorm_queue_statistics;
  816. struct ustorm_per_queue_stats *old_uclient =
  817. &bnx2x_fp_stats(bp, fp)->old_uclient;
  818. struct xstorm_per_queue_stats *xclient =
  819. &bp->fw_stats_data->queue_stats[i].
  820. xstorm_queue_statistics;
  821. struct xstorm_per_queue_stats *old_xclient =
  822. &bnx2x_fp_stats(bp, fp)->old_xclient;
  823. struct bnx2x_eth_q_stats *qstats =
  824. &bnx2x_fp_stats(bp, fp)->eth_q_stats;
  825. struct bnx2x_eth_q_stats_old *qstats_old =
  826. &bnx2x_fp_stats(bp, fp)->eth_q_stats_old;
  827. u32 diff;
  828. DP(BNX2X_MSG_STATS, "queue[%d]: ucast_sent 0x%x, bcast_sent 0x%x mcast_sent 0x%x\n",
  829. i, xclient->ucast_pkts_sent,
  830. xclient->bcast_pkts_sent, xclient->mcast_pkts_sent);
  831. DP(BNX2X_MSG_STATS, "---------------\n");
  832. UPDATE_QSTAT(tclient->rcv_bcast_bytes,
  833. total_broadcast_bytes_received);
  834. UPDATE_QSTAT(tclient->rcv_mcast_bytes,
  835. total_multicast_bytes_received);
  836. UPDATE_QSTAT(tclient->rcv_ucast_bytes,
  837. total_unicast_bytes_received);
  838. /*
  839. * sum to total_bytes_received all
  840. * unicast/multicast/broadcast
  841. */
  842. qstats->total_bytes_received_hi =
  843. qstats->total_broadcast_bytes_received_hi;
  844. qstats->total_bytes_received_lo =
  845. qstats->total_broadcast_bytes_received_lo;
  846. ADD_64(qstats->total_bytes_received_hi,
  847. qstats->total_multicast_bytes_received_hi,
  848. qstats->total_bytes_received_lo,
  849. qstats->total_multicast_bytes_received_lo);
  850. ADD_64(qstats->total_bytes_received_hi,
  851. qstats->total_unicast_bytes_received_hi,
  852. qstats->total_bytes_received_lo,
  853. qstats->total_unicast_bytes_received_lo);
  854. qstats->valid_bytes_received_hi =
  855. qstats->total_bytes_received_hi;
  856. qstats->valid_bytes_received_lo =
  857. qstats->total_bytes_received_lo;
  858. UPDATE_EXTEND_TSTAT(rcv_ucast_pkts,
  859. total_unicast_packets_received);
  860. UPDATE_EXTEND_TSTAT(rcv_mcast_pkts,
  861. total_multicast_packets_received);
  862. UPDATE_EXTEND_TSTAT(rcv_bcast_pkts,
  863. total_broadcast_packets_received);
  864. UPDATE_EXTEND_E_TSTAT(pkts_too_big_discard,
  865. etherstatsoverrsizepkts, 32);
  866. UPDATE_EXTEND_E_TSTAT(no_buff_discard, no_buff_discard, 16);
  867. SUB_EXTEND_USTAT(ucast_no_buff_pkts,
  868. total_unicast_packets_received);
  869. SUB_EXTEND_USTAT(mcast_no_buff_pkts,
  870. total_multicast_packets_received);
  871. SUB_EXTEND_USTAT(bcast_no_buff_pkts,
  872. total_broadcast_packets_received);
  873. UPDATE_EXTEND_E_USTAT(ucast_no_buff_pkts, no_buff_discard);
  874. UPDATE_EXTEND_E_USTAT(mcast_no_buff_pkts, no_buff_discard);
  875. UPDATE_EXTEND_E_USTAT(bcast_no_buff_pkts, no_buff_discard);
  876. UPDATE_QSTAT(xclient->bcast_bytes_sent,
  877. total_broadcast_bytes_transmitted);
  878. UPDATE_QSTAT(xclient->mcast_bytes_sent,
  879. total_multicast_bytes_transmitted);
  880. UPDATE_QSTAT(xclient->ucast_bytes_sent,
  881. total_unicast_bytes_transmitted);
  882. /*
  883. * sum to total_bytes_transmitted all
  884. * unicast/multicast/broadcast
  885. */
  886. qstats->total_bytes_transmitted_hi =
  887. qstats->total_unicast_bytes_transmitted_hi;
  888. qstats->total_bytes_transmitted_lo =
  889. qstats->total_unicast_bytes_transmitted_lo;
  890. ADD_64(qstats->total_bytes_transmitted_hi,
  891. qstats->total_broadcast_bytes_transmitted_hi,
  892. qstats->total_bytes_transmitted_lo,
  893. qstats->total_broadcast_bytes_transmitted_lo);
  894. ADD_64(qstats->total_bytes_transmitted_hi,
  895. qstats->total_multicast_bytes_transmitted_hi,
  896. qstats->total_bytes_transmitted_lo,
  897. qstats->total_multicast_bytes_transmitted_lo);
  898. UPDATE_EXTEND_XSTAT(ucast_pkts_sent,
  899. total_unicast_packets_transmitted);
  900. UPDATE_EXTEND_XSTAT(mcast_pkts_sent,
  901. total_multicast_packets_transmitted);
  902. UPDATE_EXTEND_XSTAT(bcast_pkts_sent,
  903. total_broadcast_packets_transmitted);
  904. UPDATE_EXTEND_TSTAT(checksum_discard,
  905. total_packets_received_checksum_discarded);
  906. UPDATE_EXTEND_TSTAT(ttl0_discard,
  907. total_packets_received_ttl0_discarded);
  908. UPDATE_EXTEND_XSTAT(error_drop_pkts,
  909. total_transmitted_dropped_packets_error);
  910. /* TPA aggregations completed */
  911. UPDATE_EXTEND_E_USTAT(coalesced_events, total_tpa_aggregations);
  912. /* Number of network frames aggregated by TPA */
  913. UPDATE_EXTEND_E_USTAT(coalesced_pkts,
  914. total_tpa_aggregated_frames);
  915. /* Total number of bytes in completed TPA aggregations */
  916. UPDATE_QSTAT(uclient->coalesced_bytes, total_tpa_bytes);
  917. UPDATE_ESTAT_QSTAT_64(total_tpa_bytes);
  918. UPDATE_FSTAT_QSTAT(total_bytes_received);
  919. UPDATE_FSTAT_QSTAT(total_bytes_transmitted);
  920. UPDATE_FSTAT_QSTAT(total_unicast_packets_received);
  921. UPDATE_FSTAT_QSTAT(total_multicast_packets_received);
  922. UPDATE_FSTAT_QSTAT(total_broadcast_packets_received);
  923. UPDATE_FSTAT_QSTAT(total_unicast_packets_transmitted);
  924. UPDATE_FSTAT_QSTAT(total_multicast_packets_transmitted);
  925. UPDATE_FSTAT_QSTAT(total_broadcast_packets_transmitted);
  926. UPDATE_FSTAT_QSTAT(valid_bytes_received);
  927. }
  928. ADD_64(estats->total_bytes_received_hi,
  929. estats->rx_stat_ifhcinbadoctets_hi,
  930. estats->total_bytes_received_lo,
  931. estats->rx_stat_ifhcinbadoctets_lo);
  932. ADD_64_LE(estats->total_bytes_received_hi,
  933. tfunc->rcv_error_bytes.hi,
  934. estats->total_bytes_received_lo,
  935. tfunc->rcv_error_bytes.lo);
  936. ADD_64_LE(estats->error_bytes_received_hi,
  937. tfunc->rcv_error_bytes.hi,
  938. estats->error_bytes_received_lo,
  939. tfunc->rcv_error_bytes.lo);
  940. UPDATE_ESTAT(etherstatsoverrsizepkts, rx_stat_dot3statsframestoolong);
  941. ADD_64(estats->error_bytes_received_hi,
  942. estats->rx_stat_ifhcinbadoctets_hi,
  943. estats->error_bytes_received_lo,
  944. estats->rx_stat_ifhcinbadoctets_lo);
  945. if (bp->port.pmf) {
  946. struct bnx2x_fw_port_stats_old *fwstats = &bp->fw_stats_old;
  947. UPDATE_FW_STAT(mac_filter_discard);
  948. UPDATE_FW_STAT(mf_tag_discard);
  949. UPDATE_FW_STAT(brb_truncate_discard);
  950. UPDATE_FW_STAT(mac_discard);
  951. }
  952. fstats->host_func_stats_start = ++fstats->host_func_stats_end;
  953. bp->stats_pending = 0;
  954. return 0;
  955. }
  956. static void bnx2x_net_stats_update(struct bnx2x *bp)
  957. {
  958. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  959. struct net_device_stats *nstats = &bp->dev->stats;
  960. unsigned long tmp;
  961. int i;
  962. nstats->rx_packets =
  963. bnx2x_hilo(&estats->total_unicast_packets_received_hi) +
  964. bnx2x_hilo(&estats->total_multicast_packets_received_hi) +
  965. bnx2x_hilo(&estats->total_broadcast_packets_received_hi);
  966. nstats->tx_packets =
  967. bnx2x_hilo(&estats->total_unicast_packets_transmitted_hi) +
  968. bnx2x_hilo(&estats->total_multicast_packets_transmitted_hi) +
  969. bnx2x_hilo(&estats->total_broadcast_packets_transmitted_hi);
  970. nstats->rx_bytes = bnx2x_hilo(&estats->total_bytes_received_hi);
  971. nstats->tx_bytes = bnx2x_hilo(&estats->total_bytes_transmitted_hi);
  972. tmp = estats->mac_discard;
  973. for_each_rx_queue(bp, i) {
  974. struct tstorm_per_queue_stats *old_tclient =
  975. &bp->fp_stats[i].old_tclient;
  976. tmp += le32_to_cpu(old_tclient->checksum_discard);
  977. }
  978. nstats->rx_dropped = tmp + bp->net_stats_old.rx_dropped;
  979. nstats->tx_dropped = 0;
  980. nstats->multicast =
  981. bnx2x_hilo(&estats->total_multicast_packets_received_hi);
  982. nstats->collisions =
  983. bnx2x_hilo(&estats->tx_stat_etherstatscollisions_hi);
  984. nstats->rx_length_errors =
  985. bnx2x_hilo(&estats->rx_stat_etherstatsundersizepkts_hi) +
  986. bnx2x_hilo(&estats->etherstatsoverrsizepkts_hi);
  987. nstats->rx_over_errors = bnx2x_hilo(&estats->brb_drop_hi) +
  988. bnx2x_hilo(&estats->brb_truncate_hi);
  989. nstats->rx_crc_errors =
  990. bnx2x_hilo(&estats->rx_stat_dot3statsfcserrors_hi);
  991. nstats->rx_frame_errors =
  992. bnx2x_hilo(&estats->rx_stat_dot3statsalignmenterrors_hi);
  993. nstats->rx_fifo_errors = bnx2x_hilo(&estats->no_buff_discard_hi);
  994. nstats->rx_missed_errors = 0;
  995. nstats->rx_errors = nstats->rx_length_errors +
  996. nstats->rx_over_errors +
  997. nstats->rx_crc_errors +
  998. nstats->rx_frame_errors +
  999. nstats->rx_fifo_errors +
  1000. nstats->rx_missed_errors;
  1001. nstats->tx_aborted_errors =
  1002. bnx2x_hilo(&estats->tx_stat_dot3statslatecollisions_hi) +
  1003. bnx2x_hilo(&estats->tx_stat_dot3statsexcessivecollisions_hi);
  1004. nstats->tx_carrier_errors =
  1005. bnx2x_hilo(&estats->rx_stat_dot3statscarriersenseerrors_hi);
  1006. nstats->tx_fifo_errors = 0;
  1007. nstats->tx_heartbeat_errors = 0;
  1008. nstats->tx_window_errors = 0;
  1009. nstats->tx_errors = nstats->tx_aborted_errors +
  1010. nstats->tx_carrier_errors +
  1011. bnx2x_hilo(&estats->tx_stat_dot3statsinternalmactransmiterrors_hi);
  1012. }
  1013. static void bnx2x_drv_stats_update(struct bnx2x *bp)
  1014. {
  1015. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  1016. int i;
  1017. for_each_queue(bp, i) {
  1018. struct bnx2x_eth_q_stats *qstats = &bp->fp_stats[i].eth_q_stats;
  1019. struct bnx2x_eth_q_stats_old *qstats_old =
  1020. &bp->fp_stats[i].eth_q_stats_old;
  1021. UPDATE_ESTAT_QSTAT(driver_xoff);
  1022. UPDATE_ESTAT_QSTAT(rx_err_discard_pkt);
  1023. UPDATE_ESTAT_QSTAT(rx_skb_alloc_failed);
  1024. UPDATE_ESTAT_QSTAT(hw_csum_err);
  1025. UPDATE_ESTAT_QSTAT(driver_filtered_tx_pkt);
  1026. }
  1027. }
  1028. static bool bnx2x_edebug_stats_stopped(struct bnx2x *bp)
  1029. {
  1030. u32 val;
  1031. if (SHMEM2_HAS(bp, edebug_driver_if[1])) {
  1032. val = SHMEM2_RD(bp, edebug_driver_if[1]);
  1033. if (val == EDEBUG_DRIVER_IF_OP_CODE_DISABLE_STAT)
  1034. return true;
  1035. }
  1036. return false;
  1037. }
  1038. static void bnx2x_stats_update(struct bnx2x *bp)
  1039. {
  1040. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1041. if (bnx2x_edebug_stats_stopped(bp))
  1042. return;
  1043. if (IS_PF(bp)) {
  1044. if (*stats_comp != DMAE_COMP_VAL)
  1045. return;
  1046. if (bp->port.pmf)
  1047. bnx2x_hw_stats_update(bp);
  1048. if (bnx2x_storm_stats_update(bp)) {
  1049. if (bp->stats_pending++ == 3) {
  1050. BNX2X_ERR("storm stats were not updated for 3 times\n");
  1051. bnx2x_panic();
  1052. }
  1053. return;
  1054. }
  1055. } else {
  1056. /* vf doesn't collect HW statistics, and doesn't get completions
  1057. * perform only update
  1058. */
  1059. bnx2x_storm_stats_update(bp);
  1060. }
  1061. bnx2x_net_stats_update(bp);
  1062. bnx2x_drv_stats_update(bp);
  1063. /* vf is done */
  1064. if (IS_VF(bp))
  1065. return;
  1066. if (netif_msg_timer(bp)) {
  1067. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  1068. netdev_dbg(bp->dev, "brb drops %u brb truncate %u\n",
  1069. estats->brb_drop_lo, estats->brb_truncate_lo);
  1070. }
  1071. bnx2x_hw_stats_post(bp);
  1072. bnx2x_storm_stats_post(bp);
  1073. }
  1074. static void bnx2x_port_stats_stop(struct bnx2x *bp)
  1075. {
  1076. struct dmae_command *dmae;
  1077. u32 opcode;
  1078. int loader_idx = PMF_DMAE_C(bp);
  1079. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1080. bp->executer_idx = 0;
  1081. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, false, 0);
  1082. if (bp->port.port_stx) {
  1083. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1084. if (bp->func_stx)
  1085. dmae->opcode = bnx2x_dmae_opcode_add_comp(
  1086. opcode, DMAE_COMP_GRC);
  1087. else
  1088. dmae->opcode = bnx2x_dmae_opcode_add_comp(
  1089. opcode, DMAE_COMP_PCI);
  1090. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  1091. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  1092. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  1093. dmae->dst_addr_hi = 0;
  1094. dmae->len = bnx2x_get_port_stats_dma_len(bp);
  1095. if (bp->func_stx) {
  1096. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  1097. dmae->comp_addr_hi = 0;
  1098. dmae->comp_val = 1;
  1099. } else {
  1100. dmae->comp_addr_lo =
  1101. U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1102. dmae->comp_addr_hi =
  1103. U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1104. dmae->comp_val = DMAE_COMP_VAL;
  1105. *stats_comp = 0;
  1106. }
  1107. }
  1108. if (bp->func_stx) {
  1109. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1110. dmae->opcode =
  1111. bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
  1112. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  1113. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  1114. dmae->dst_addr_lo = bp->func_stx >> 2;
  1115. dmae->dst_addr_hi = 0;
  1116. dmae->len = sizeof(struct host_func_stats) >> 2;
  1117. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1118. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1119. dmae->comp_val = DMAE_COMP_VAL;
  1120. *stats_comp = 0;
  1121. }
  1122. }
  1123. static void bnx2x_stats_stop(struct bnx2x *bp)
  1124. {
  1125. bool update = false;
  1126. bnx2x_stats_comp(bp);
  1127. if (bp->port.pmf)
  1128. update = (bnx2x_hw_stats_update(bp) == 0);
  1129. update |= (bnx2x_storm_stats_update(bp) == 0);
  1130. if (update) {
  1131. bnx2x_net_stats_update(bp);
  1132. if (bp->port.pmf)
  1133. bnx2x_port_stats_stop(bp);
  1134. bnx2x_hw_stats_post(bp);
  1135. bnx2x_stats_comp(bp);
  1136. }
  1137. }
  1138. static void bnx2x_stats_do_nothing(struct bnx2x *bp)
  1139. {
  1140. }
  1141. static const struct {
  1142. void (*action)(struct bnx2x *bp);
  1143. enum bnx2x_stats_state next_state;
  1144. } bnx2x_stats_stm[STATS_STATE_MAX][STATS_EVENT_MAX] = {
  1145. /* state event */
  1146. {
  1147. /* DISABLED PMF */ {bnx2x_stats_pmf_update, STATS_STATE_DISABLED},
  1148. /* LINK_UP */ {bnx2x_stats_start, STATS_STATE_ENABLED},
  1149. /* UPDATE */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED},
  1150. /* STOP */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED}
  1151. },
  1152. {
  1153. /* ENABLED PMF */ {bnx2x_stats_pmf_start, STATS_STATE_ENABLED},
  1154. /* LINK_UP */ {bnx2x_stats_restart, STATS_STATE_ENABLED},
  1155. /* UPDATE */ {bnx2x_stats_update, STATS_STATE_ENABLED},
  1156. /* STOP */ {bnx2x_stats_stop, STATS_STATE_DISABLED}
  1157. }
  1158. };
  1159. void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event)
  1160. {
  1161. enum bnx2x_stats_state state = bp->stats_state;
  1162. if (unlikely(bp->panic))
  1163. return;
  1164. /* Statistics update run from timer context, and we don't want to stop
  1165. * that context in case someone is in the middle of a transition.
  1166. * For other events, wait a bit until lock is taken.
  1167. */
  1168. if (down_trylock(&bp->stats_lock)) {
  1169. if (event == STATS_EVENT_UPDATE)
  1170. return;
  1171. DP(BNX2X_MSG_STATS,
  1172. "Unlikely stats' lock contention [event %d]\n", event);
  1173. if (unlikely(down_timeout(&bp->stats_lock, HZ / 10))) {
  1174. BNX2X_ERR("Failed to take stats lock [event %d]\n",
  1175. event);
  1176. return;
  1177. }
  1178. }
  1179. bnx2x_stats_stm[state][event].action(bp);
  1180. bp->stats_state = bnx2x_stats_stm[state][event].next_state;
  1181. up(&bp->stats_lock);
  1182. if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp))
  1183. DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n",
  1184. state, event, bp->stats_state);
  1185. }
  1186. static void bnx2x_port_stats_base_init(struct bnx2x *bp)
  1187. {
  1188. struct dmae_command *dmae;
  1189. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1190. /* sanity */
  1191. if (!bp->port.pmf || !bp->port.port_stx) {
  1192. BNX2X_ERR("BUG!\n");
  1193. return;
  1194. }
  1195. bp->executer_idx = 0;
  1196. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1197. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  1198. true, DMAE_COMP_PCI);
  1199. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  1200. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  1201. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  1202. dmae->dst_addr_hi = 0;
  1203. dmae->len = bnx2x_get_port_stats_dma_len(bp);
  1204. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1205. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1206. dmae->comp_val = DMAE_COMP_VAL;
  1207. *stats_comp = 0;
  1208. bnx2x_hw_stats_post(bp);
  1209. bnx2x_stats_comp(bp);
  1210. }
  1211. /* This function will prepare the statistics ramrod data the way
  1212. * we will only have to increment the statistics counter and
  1213. * send the ramrod each time we have to.
  1214. */
  1215. static void bnx2x_prep_fw_stats_req(struct bnx2x *bp)
  1216. {
  1217. int i;
  1218. int first_queue_query_index;
  1219. struct stats_query_header *stats_hdr = &bp->fw_stats_req->hdr;
  1220. dma_addr_t cur_data_offset;
  1221. struct stats_query_entry *cur_query_entry;
  1222. stats_hdr->cmd_num = bp->fw_stats_num;
  1223. stats_hdr->drv_stats_counter = 0;
  1224. /* storm_counters struct contains the counters of completed
  1225. * statistics requests per storm which are incremented by FW
  1226. * each time it completes hadning a statistics ramrod. We will
  1227. * check these counters in the timer handler and discard a
  1228. * (statistics) ramrod completion.
  1229. */
  1230. cur_data_offset = bp->fw_stats_data_mapping +
  1231. offsetof(struct bnx2x_fw_stats_data, storm_counters);
  1232. stats_hdr->stats_counters_addrs.hi =
  1233. cpu_to_le32(U64_HI(cur_data_offset));
  1234. stats_hdr->stats_counters_addrs.lo =
  1235. cpu_to_le32(U64_LO(cur_data_offset));
  1236. /* prepare to the first stats ramrod (will be completed with
  1237. * the counters equal to zero) - init counters to somethig different.
  1238. */
  1239. memset(&bp->fw_stats_data->storm_counters, 0xff,
  1240. sizeof(struct stats_counter));
  1241. /**** Port FW statistics data ****/
  1242. cur_data_offset = bp->fw_stats_data_mapping +
  1243. offsetof(struct bnx2x_fw_stats_data, port);
  1244. cur_query_entry = &bp->fw_stats_req->query[BNX2X_PORT_QUERY_IDX];
  1245. cur_query_entry->kind = STATS_TYPE_PORT;
  1246. /* For port query index is a DONT CARE */
  1247. cur_query_entry->index = BP_PORT(bp);
  1248. /* For port query funcID is a DONT CARE */
  1249. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1250. cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset));
  1251. cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset));
  1252. /**** PF FW statistics data ****/
  1253. cur_data_offset = bp->fw_stats_data_mapping +
  1254. offsetof(struct bnx2x_fw_stats_data, pf);
  1255. cur_query_entry = &bp->fw_stats_req->query[BNX2X_PF_QUERY_IDX];
  1256. cur_query_entry->kind = STATS_TYPE_PF;
  1257. /* For PF query index is a DONT CARE */
  1258. cur_query_entry->index = BP_PORT(bp);
  1259. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1260. cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset));
  1261. cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset));
  1262. /**** FCoE FW statistics data ****/
  1263. if (!NO_FCOE(bp)) {
  1264. cur_data_offset = bp->fw_stats_data_mapping +
  1265. offsetof(struct bnx2x_fw_stats_data, fcoe);
  1266. cur_query_entry =
  1267. &bp->fw_stats_req->query[BNX2X_FCOE_QUERY_IDX];
  1268. cur_query_entry->kind = STATS_TYPE_FCOE;
  1269. /* For FCoE query index is a DONT CARE */
  1270. cur_query_entry->index = BP_PORT(bp);
  1271. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1272. cur_query_entry->address.hi =
  1273. cpu_to_le32(U64_HI(cur_data_offset));
  1274. cur_query_entry->address.lo =
  1275. cpu_to_le32(U64_LO(cur_data_offset));
  1276. }
  1277. /**** Clients' queries ****/
  1278. cur_data_offset = bp->fw_stats_data_mapping +
  1279. offsetof(struct bnx2x_fw_stats_data, queue_stats);
  1280. /* first queue query index depends whether FCoE offloaded request will
  1281. * be included in the ramrod
  1282. */
  1283. if (!NO_FCOE(bp))
  1284. first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX;
  1285. else
  1286. first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX - 1;
  1287. for_each_eth_queue(bp, i) {
  1288. cur_query_entry =
  1289. &bp->fw_stats_req->
  1290. query[first_queue_query_index + i];
  1291. cur_query_entry->kind = STATS_TYPE_QUEUE;
  1292. cur_query_entry->index = bnx2x_stats_id(&bp->fp[i]);
  1293. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1294. cur_query_entry->address.hi =
  1295. cpu_to_le32(U64_HI(cur_data_offset));
  1296. cur_query_entry->address.lo =
  1297. cpu_to_le32(U64_LO(cur_data_offset));
  1298. cur_data_offset += sizeof(struct per_queue_stats);
  1299. }
  1300. /* add FCoE queue query if needed */
  1301. if (!NO_FCOE(bp)) {
  1302. cur_query_entry =
  1303. &bp->fw_stats_req->
  1304. query[first_queue_query_index + i];
  1305. cur_query_entry->kind = STATS_TYPE_QUEUE;
  1306. cur_query_entry->index = bnx2x_stats_id(&bp->fp[FCOE_IDX(bp)]);
  1307. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1308. cur_query_entry->address.hi =
  1309. cpu_to_le32(U64_HI(cur_data_offset));
  1310. cur_query_entry->address.lo =
  1311. cpu_to_le32(U64_LO(cur_data_offset));
  1312. }
  1313. }
  1314. void bnx2x_memset_stats(struct bnx2x *bp)
  1315. {
  1316. int i;
  1317. /* function stats */
  1318. for_each_queue(bp, i) {
  1319. struct bnx2x_fp_stats *fp_stats = &bp->fp_stats[i];
  1320. memset(&fp_stats->old_tclient, 0,
  1321. sizeof(fp_stats->old_tclient));
  1322. memset(&fp_stats->old_uclient, 0,
  1323. sizeof(fp_stats->old_uclient));
  1324. memset(&fp_stats->old_xclient, 0,
  1325. sizeof(fp_stats->old_xclient));
  1326. if (bp->stats_init) {
  1327. memset(&fp_stats->eth_q_stats, 0,
  1328. sizeof(fp_stats->eth_q_stats));
  1329. memset(&fp_stats->eth_q_stats_old, 0,
  1330. sizeof(fp_stats->eth_q_stats_old));
  1331. }
  1332. }
  1333. memset(&bp->dev->stats, 0, sizeof(bp->dev->stats));
  1334. if (bp->stats_init) {
  1335. memset(&bp->net_stats_old, 0, sizeof(bp->net_stats_old));
  1336. memset(&bp->fw_stats_old, 0, sizeof(bp->fw_stats_old));
  1337. memset(&bp->eth_stats_old, 0, sizeof(bp->eth_stats_old));
  1338. memset(&bp->eth_stats, 0, sizeof(bp->eth_stats));
  1339. memset(&bp->func_stats, 0, sizeof(bp->func_stats));
  1340. }
  1341. bp->stats_state = STATS_STATE_DISABLED;
  1342. if (bp->port.pmf && bp->port.port_stx)
  1343. bnx2x_port_stats_base_init(bp);
  1344. /* mark the end of statistics initialization */
  1345. bp->stats_init = false;
  1346. }
  1347. void bnx2x_stats_init(struct bnx2x *bp)
  1348. {
  1349. int /*abs*/port = BP_PORT(bp);
  1350. int mb_idx = BP_FW_MB_IDX(bp);
  1351. if (IS_VF(bp)) {
  1352. bnx2x_memset_stats(bp);
  1353. return;
  1354. }
  1355. bp->stats_pending = 0;
  1356. bp->executer_idx = 0;
  1357. bp->stats_counter = 0;
  1358. /* port and func stats for management */
  1359. if (!BP_NOMCP(bp)) {
  1360. bp->port.port_stx = SHMEM_RD(bp, port_mb[port].port_stx);
  1361. bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param);
  1362. } else {
  1363. bp->port.port_stx = 0;
  1364. bp->func_stx = 0;
  1365. }
  1366. DP(BNX2X_MSG_STATS, "port_stx 0x%x func_stx 0x%x\n",
  1367. bp->port.port_stx, bp->func_stx);
  1368. /* pmf should retrieve port statistics from SP on a non-init*/
  1369. if (!bp->stats_init && bp->port.pmf && bp->port.port_stx)
  1370. bnx2x_stats_handle(bp, STATS_EVENT_PMF);
  1371. port = BP_PORT(bp);
  1372. /* port stats */
  1373. memset(&(bp->port.old_nig_stats), 0, sizeof(struct nig_stats));
  1374. bp->port.old_nig_stats.brb_discard =
  1375. REG_RD(bp, NIG_REG_STAT0_BRB_DISCARD + port*0x38);
  1376. bp->port.old_nig_stats.brb_truncate =
  1377. REG_RD(bp, NIG_REG_STAT0_BRB_TRUNCATE + port*0x38);
  1378. if (!CHIP_IS_E3(bp)) {
  1379. REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT0 + port*0x50,
  1380. &(bp->port.old_nig_stats.egress_mac_pkt0_lo), 2);
  1381. REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT1 + port*0x50,
  1382. &(bp->port.old_nig_stats.egress_mac_pkt1_lo), 2);
  1383. }
  1384. /* Prepare statistics ramrod data */
  1385. bnx2x_prep_fw_stats_req(bp);
  1386. /* Clean SP from previous statistics */
  1387. if (bp->stats_init) {
  1388. if (bp->func_stx) {
  1389. memset(bnx2x_sp(bp, func_stats), 0,
  1390. sizeof(struct host_func_stats));
  1391. bnx2x_func_stats_init(bp);
  1392. bnx2x_hw_stats_post(bp);
  1393. bnx2x_stats_comp(bp);
  1394. }
  1395. }
  1396. bnx2x_memset_stats(bp);
  1397. }
  1398. void bnx2x_save_statistics(struct bnx2x *bp)
  1399. {
  1400. int i;
  1401. struct net_device_stats *nstats = &bp->dev->stats;
  1402. /* save queue statistics */
  1403. for_each_eth_queue(bp, i) {
  1404. struct bnx2x_fastpath *fp = &bp->fp[i];
  1405. struct bnx2x_eth_q_stats *qstats =
  1406. &bnx2x_fp_stats(bp, fp)->eth_q_stats;
  1407. struct bnx2x_eth_q_stats_old *qstats_old =
  1408. &bnx2x_fp_stats(bp, fp)->eth_q_stats_old;
  1409. UPDATE_QSTAT_OLD(total_unicast_bytes_received_hi);
  1410. UPDATE_QSTAT_OLD(total_unicast_bytes_received_lo);
  1411. UPDATE_QSTAT_OLD(total_broadcast_bytes_received_hi);
  1412. UPDATE_QSTAT_OLD(total_broadcast_bytes_received_lo);
  1413. UPDATE_QSTAT_OLD(total_multicast_bytes_received_hi);
  1414. UPDATE_QSTAT_OLD(total_multicast_bytes_received_lo);
  1415. UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_hi);
  1416. UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_lo);
  1417. UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_hi);
  1418. UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_lo);
  1419. UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_hi);
  1420. UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_lo);
  1421. UPDATE_QSTAT_OLD(total_tpa_bytes_hi);
  1422. UPDATE_QSTAT_OLD(total_tpa_bytes_lo);
  1423. }
  1424. /* save net_device_stats statistics */
  1425. bp->net_stats_old.rx_dropped = nstats->rx_dropped;
  1426. /* store port firmware statistics */
  1427. if (bp->port.pmf && IS_MF(bp)) {
  1428. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  1429. struct bnx2x_fw_port_stats_old *fwstats = &bp->fw_stats_old;
  1430. UPDATE_FW_STAT_OLD(mac_filter_discard);
  1431. UPDATE_FW_STAT_OLD(mf_tag_discard);
  1432. UPDATE_FW_STAT_OLD(brb_truncate_discard);
  1433. UPDATE_FW_STAT_OLD(mac_discard);
  1434. }
  1435. }
  1436. void bnx2x_afex_collect_stats(struct bnx2x *bp, void *void_afex_stats,
  1437. u32 stats_type)
  1438. {
  1439. int i;
  1440. struct afex_stats *afex_stats = (struct afex_stats *)void_afex_stats;
  1441. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  1442. struct per_queue_stats *fcoe_q_stats =
  1443. &bp->fw_stats_data->queue_stats[FCOE_IDX(bp)];
  1444. struct tstorm_per_queue_stats *fcoe_q_tstorm_stats =
  1445. &fcoe_q_stats->tstorm_queue_statistics;
  1446. struct ustorm_per_queue_stats *fcoe_q_ustorm_stats =
  1447. &fcoe_q_stats->ustorm_queue_statistics;
  1448. struct xstorm_per_queue_stats *fcoe_q_xstorm_stats =
  1449. &fcoe_q_stats->xstorm_queue_statistics;
  1450. struct fcoe_statistics_params *fw_fcoe_stat =
  1451. &bp->fw_stats_data->fcoe;
  1452. memset(afex_stats, 0, sizeof(struct afex_stats));
  1453. for_each_eth_queue(bp, i) {
  1454. struct bnx2x_eth_q_stats *qstats = &bp->fp_stats[i].eth_q_stats;
  1455. ADD_64(afex_stats->rx_unicast_bytes_hi,
  1456. qstats->total_unicast_bytes_received_hi,
  1457. afex_stats->rx_unicast_bytes_lo,
  1458. qstats->total_unicast_bytes_received_lo);
  1459. ADD_64(afex_stats->rx_broadcast_bytes_hi,
  1460. qstats->total_broadcast_bytes_received_hi,
  1461. afex_stats->rx_broadcast_bytes_lo,
  1462. qstats->total_broadcast_bytes_received_lo);
  1463. ADD_64(afex_stats->rx_multicast_bytes_hi,
  1464. qstats->total_multicast_bytes_received_hi,
  1465. afex_stats->rx_multicast_bytes_lo,
  1466. qstats->total_multicast_bytes_received_lo);
  1467. ADD_64(afex_stats->rx_unicast_frames_hi,
  1468. qstats->total_unicast_packets_received_hi,
  1469. afex_stats->rx_unicast_frames_lo,
  1470. qstats->total_unicast_packets_received_lo);
  1471. ADD_64(afex_stats->rx_broadcast_frames_hi,
  1472. qstats->total_broadcast_packets_received_hi,
  1473. afex_stats->rx_broadcast_frames_lo,
  1474. qstats->total_broadcast_packets_received_lo);
  1475. ADD_64(afex_stats->rx_multicast_frames_hi,
  1476. qstats->total_multicast_packets_received_hi,
  1477. afex_stats->rx_multicast_frames_lo,
  1478. qstats->total_multicast_packets_received_lo);
  1479. /* sum to rx_frames_discarded all discraded
  1480. * packets due to size, ttl0 and checksum
  1481. */
  1482. ADD_64(afex_stats->rx_frames_discarded_hi,
  1483. qstats->total_packets_received_checksum_discarded_hi,
  1484. afex_stats->rx_frames_discarded_lo,
  1485. qstats->total_packets_received_checksum_discarded_lo);
  1486. ADD_64(afex_stats->rx_frames_discarded_hi,
  1487. qstats->total_packets_received_ttl0_discarded_hi,
  1488. afex_stats->rx_frames_discarded_lo,
  1489. qstats->total_packets_received_ttl0_discarded_lo);
  1490. ADD_64(afex_stats->rx_frames_discarded_hi,
  1491. qstats->etherstatsoverrsizepkts_hi,
  1492. afex_stats->rx_frames_discarded_lo,
  1493. qstats->etherstatsoverrsizepkts_lo);
  1494. ADD_64(afex_stats->rx_frames_dropped_hi,
  1495. qstats->no_buff_discard_hi,
  1496. afex_stats->rx_frames_dropped_lo,
  1497. qstats->no_buff_discard_lo);
  1498. ADD_64(afex_stats->tx_unicast_bytes_hi,
  1499. qstats->total_unicast_bytes_transmitted_hi,
  1500. afex_stats->tx_unicast_bytes_lo,
  1501. qstats->total_unicast_bytes_transmitted_lo);
  1502. ADD_64(afex_stats->tx_broadcast_bytes_hi,
  1503. qstats->total_broadcast_bytes_transmitted_hi,
  1504. afex_stats->tx_broadcast_bytes_lo,
  1505. qstats->total_broadcast_bytes_transmitted_lo);
  1506. ADD_64(afex_stats->tx_multicast_bytes_hi,
  1507. qstats->total_multicast_bytes_transmitted_hi,
  1508. afex_stats->tx_multicast_bytes_lo,
  1509. qstats->total_multicast_bytes_transmitted_lo);
  1510. ADD_64(afex_stats->tx_unicast_frames_hi,
  1511. qstats->total_unicast_packets_transmitted_hi,
  1512. afex_stats->tx_unicast_frames_lo,
  1513. qstats->total_unicast_packets_transmitted_lo);
  1514. ADD_64(afex_stats->tx_broadcast_frames_hi,
  1515. qstats->total_broadcast_packets_transmitted_hi,
  1516. afex_stats->tx_broadcast_frames_lo,
  1517. qstats->total_broadcast_packets_transmitted_lo);
  1518. ADD_64(afex_stats->tx_multicast_frames_hi,
  1519. qstats->total_multicast_packets_transmitted_hi,
  1520. afex_stats->tx_multicast_frames_lo,
  1521. qstats->total_multicast_packets_transmitted_lo);
  1522. ADD_64(afex_stats->tx_frames_dropped_hi,
  1523. qstats->total_transmitted_dropped_packets_error_hi,
  1524. afex_stats->tx_frames_dropped_lo,
  1525. qstats->total_transmitted_dropped_packets_error_lo);
  1526. }
  1527. /* now add FCoE statistics which are collected separately
  1528. * (both offloaded and non offloaded)
  1529. */
  1530. if (!NO_FCOE(bp)) {
  1531. ADD_64_LE(afex_stats->rx_unicast_bytes_hi,
  1532. LE32_0,
  1533. afex_stats->rx_unicast_bytes_lo,
  1534. fw_fcoe_stat->rx_stat0.fcoe_rx_byte_cnt);
  1535. ADD_64_LE(afex_stats->rx_unicast_bytes_hi,
  1536. fcoe_q_tstorm_stats->rcv_ucast_bytes.hi,
  1537. afex_stats->rx_unicast_bytes_lo,
  1538. fcoe_q_tstorm_stats->rcv_ucast_bytes.lo);
  1539. ADD_64_LE(afex_stats->rx_broadcast_bytes_hi,
  1540. fcoe_q_tstorm_stats->rcv_bcast_bytes.hi,
  1541. afex_stats->rx_broadcast_bytes_lo,
  1542. fcoe_q_tstorm_stats->rcv_bcast_bytes.lo);
  1543. ADD_64_LE(afex_stats->rx_multicast_bytes_hi,
  1544. fcoe_q_tstorm_stats->rcv_mcast_bytes.hi,
  1545. afex_stats->rx_multicast_bytes_lo,
  1546. fcoe_q_tstorm_stats->rcv_mcast_bytes.lo);
  1547. ADD_64_LE(afex_stats->rx_unicast_frames_hi,
  1548. LE32_0,
  1549. afex_stats->rx_unicast_frames_lo,
  1550. fw_fcoe_stat->rx_stat0.fcoe_rx_pkt_cnt);
  1551. ADD_64_LE(afex_stats->rx_unicast_frames_hi,
  1552. LE32_0,
  1553. afex_stats->rx_unicast_frames_lo,
  1554. fcoe_q_tstorm_stats->rcv_ucast_pkts);
  1555. ADD_64_LE(afex_stats->rx_broadcast_frames_hi,
  1556. LE32_0,
  1557. afex_stats->rx_broadcast_frames_lo,
  1558. fcoe_q_tstorm_stats->rcv_bcast_pkts);
  1559. ADD_64_LE(afex_stats->rx_multicast_frames_hi,
  1560. LE32_0,
  1561. afex_stats->rx_multicast_frames_lo,
  1562. fcoe_q_tstorm_stats->rcv_ucast_pkts);
  1563. ADD_64_LE(afex_stats->rx_frames_discarded_hi,
  1564. LE32_0,
  1565. afex_stats->rx_frames_discarded_lo,
  1566. fcoe_q_tstorm_stats->checksum_discard);
  1567. ADD_64_LE(afex_stats->rx_frames_discarded_hi,
  1568. LE32_0,
  1569. afex_stats->rx_frames_discarded_lo,
  1570. fcoe_q_tstorm_stats->pkts_too_big_discard);
  1571. ADD_64_LE(afex_stats->rx_frames_discarded_hi,
  1572. LE32_0,
  1573. afex_stats->rx_frames_discarded_lo,
  1574. fcoe_q_tstorm_stats->ttl0_discard);
  1575. ADD_64_LE16(afex_stats->rx_frames_dropped_hi,
  1576. LE16_0,
  1577. afex_stats->rx_frames_dropped_lo,
  1578. fcoe_q_tstorm_stats->no_buff_discard);
  1579. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1580. LE32_0,
  1581. afex_stats->rx_frames_dropped_lo,
  1582. fcoe_q_ustorm_stats->ucast_no_buff_pkts);
  1583. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1584. LE32_0,
  1585. afex_stats->rx_frames_dropped_lo,
  1586. fcoe_q_ustorm_stats->mcast_no_buff_pkts);
  1587. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1588. LE32_0,
  1589. afex_stats->rx_frames_dropped_lo,
  1590. fcoe_q_ustorm_stats->bcast_no_buff_pkts);
  1591. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1592. LE32_0,
  1593. afex_stats->rx_frames_dropped_lo,
  1594. fw_fcoe_stat->rx_stat1.fcoe_rx_drop_pkt_cnt);
  1595. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1596. LE32_0,
  1597. afex_stats->rx_frames_dropped_lo,
  1598. fw_fcoe_stat->rx_stat2.fcoe_rx_drop_pkt_cnt);
  1599. ADD_64_LE(afex_stats->tx_unicast_bytes_hi,
  1600. LE32_0,
  1601. afex_stats->tx_unicast_bytes_lo,
  1602. fw_fcoe_stat->tx_stat.fcoe_tx_byte_cnt);
  1603. ADD_64_LE(afex_stats->tx_unicast_bytes_hi,
  1604. fcoe_q_xstorm_stats->ucast_bytes_sent.hi,
  1605. afex_stats->tx_unicast_bytes_lo,
  1606. fcoe_q_xstorm_stats->ucast_bytes_sent.lo);
  1607. ADD_64_LE(afex_stats->tx_broadcast_bytes_hi,
  1608. fcoe_q_xstorm_stats->bcast_bytes_sent.hi,
  1609. afex_stats->tx_broadcast_bytes_lo,
  1610. fcoe_q_xstorm_stats->bcast_bytes_sent.lo);
  1611. ADD_64_LE(afex_stats->tx_multicast_bytes_hi,
  1612. fcoe_q_xstorm_stats->mcast_bytes_sent.hi,
  1613. afex_stats->tx_multicast_bytes_lo,
  1614. fcoe_q_xstorm_stats->mcast_bytes_sent.lo);
  1615. ADD_64_LE(afex_stats->tx_unicast_frames_hi,
  1616. LE32_0,
  1617. afex_stats->tx_unicast_frames_lo,
  1618. fw_fcoe_stat->tx_stat.fcoe_tx_pkt_cnt);
  1619. ADD_64_LE(afex_stats->tx_unicast_frames_hi,
  1620. LE32_0,
  1621. afex_stats->tx_unicast_frames_lo,
  1622. fcoe_q_xstorm_stats->ucast_pkts_sent);
  1623. ADD_64_LE(afex_stats->tx_broadcast_frames_hi,
  1624. LE32_0,
  1625. afex_stats->tx_broadcast_frames_lo,
  1626. fcoe_q_xstorm_stats->bcast_pkts_sent);
  1627. ADD_64_LE(afex_stats->tx_multicast_frames_hi,
  1628. LE32_0,
  1629. afex_stats->tx_multicast_frames_lo,
  1630. fcoe_q_xstorm_stats->mcast_pkts_sent);
  1631. ADD_64_LE(afex_stats->tx_frames_dropped_hi,
  1632. LE32_0,
  1633. afex_stats->tx_frames_dropped_lo,
  1634. fcoe_q_xstorm_stats->error_drop_pkts);
  1635. }
  1636. /* if port stats are requested, add them to the PMF
  1637. * stats, as anyway they will be accumulated by the
  1638. * MCP before sent to the switch
  1639. */
  1640. if ((bp->port.pmf) && (stats_type == VICSTATST_UIF_INDEX)) {
  1641. ADD_64(afex_stats->rx_frames_dropped_hi,
  1642. 0,
  1643. afex_stats->rx_frames_dropped_lo,
  1644. estats->mac_filter_discard);
  1645. ADD_64(afex_stats->rx_frames_dropped_hi,
  1646. 0,
  1647. afex_stats->rx_frames_dropped_lo,
  1648. estats->brb_truncate_discard);
  1649. ADD_64(afex_stats->rx_frames_discarded_hi,
  1650. 0,
  1651. afex_stats->rx_frames_discarded_lo,
  1652. estats->mac_discard);
  1653. }
  1654. }
  1655. int bnx2x_stats_safe_exec(struct bnx2x *bp,
  1656. void (func_to_exec)(void *cookie),
  1657. void *cookie)
  1658. {
  1659. int cnt = 10, rc = 0;
  1660. /* Wait for statistics to end [while blocking further requests],
  1661. * then run supplied function 'safely'.
  1662. */
  1663. rc = down_timeout(&bp->stats_lock, HZ / 10);
  1664. if (unlikely(rc)) {
  1665. BNX2X_ERR("Failed to take statistics lock for safe execution\n");
  1666. goto out_no_lock;
  1667. }
  1668. bnx2x_stats_comp(bp);
  1669. while (bp->stats_pending && cnt--)
  1670. if (bnx2x_storm_stats_update(bp))
  1671. usleep_range(1000, 2000);
  1672. if (bp->stats_pending) {
  1673. BNX2X_ERR("Failed to wait for stats pending to clear [possibly FW is stuck]\n");
  1674. rc = -EBUSY;
  1675. goto out;
  1676. }
  1677. func_to_exec(cookie);
  1678. out:
  1679. /* No need to restart statistics - if they're enabled, the timer
  1680. * will restart the statistics.
  1681. */
  1682. up(&bp->stats_lock);
  1683. out_no_lock:
  1684. return rc;
  1685. }