sunlance.c 40 KB

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  1. /* $Id: sunlance.c,v 1.112 2002/01/15 06:48:55 davem Exp $
  2. * lance.c: Linux/Sparc/Lance driver
  3. *
  4. * Written 1995, 1996 by Miguel de Icaza
  5. * Sources:
  6. * The Linux depca driver
  7. * The Linux lance driver.
  8. * The Linux skeleton driver.
  9. * The NetBSD Sparc/Lance driver.
  10. * Theo de Raadt (deraadt@openbsd.org)
  11. * NCR92C990 Lan Controller manual
  12. *
  13. * 1.4:
  14. * Added support to run with a ledma on the Sun4m
  15. *
  16. * 1.5:
  17. * Added multiple card detection.
  18. *
  19. * 4/17/96: Burst sizes and tpe selection on sun4m by Eddie C. Dost
  20. * (ecd@skynet.be)
  21. *
  22. * 5/15/96: auto carrier detection on sun4m by Eddie C. Dost
  23. * (ecd@skynet.be)
  24. *
  25. * 5/17/96: lebuffer on scsi/ether cards now work David S. Miller
  26. * (davem@caip.rutgers.edu)
  27. *
  28. * 5/29/96: override option 'tpe-link-test?', if it is 'false', as
  29. * this disables auto carrier detection on sun4m. Eddie C. Dost
  30. * (ecd@skynet.be)
  31. *
  32. * 1.7:
  33. * 6/26/96: Bug fix for multiple ledmas, miguel.
  34. *
  35. * 1.8:
  36. * Stole multicast code from depca.c, fixed lance_tx.
  37. *
  38. * 1.9:
  39. * 8/21/96: Fixed the multicast code (Pedro Roque)
  40. *
  41. * 8/28/96: Send fake packet in lance_open() if auto_select is true,
  42. * so we can detect the carrier loss condition in time.
  43. * Eddie C. Dost (ecd@skynet.be)
  44. *
  45. * 9/15/96: Align rx_buf so that eth_copy_and_sum() won't cause an
  46. * MNA trap during chksum_partial_copy(). (ecd@skynet.be)
  47. *
  48. * 11/17/96: Handle LE_C0_MERR in lance_interrupt(). (ecd@skynet.be)
  49. *
  50. * 12/22/96: Don't loop forever in lance_rx() on incomplete packets.
  51. * This was the sun4c killer. Shit, stupid bug.
  52. * (ecd@skynet.be)
  53. *
  54. * 1.10:
  55. * 1/26/97: Modularize driver. (ecd@skynet.be)
  56. *
  57. * 1.11:
  58. * 12/27/97: Added sun4d support. (jj@sunsite.mff.cuni.cz)
  59. *
  60. * 1.12:
  61. * 11/3/99: Fixed SMP race in lance_start_xmit found by davem.
  62. * Anton Blanchard (anton@progsoc.uts.edu.au)
  63. * 2.00: 11/9/99: Massive overhaul and port to new SBUS driver interfaces.
  64. * David S. Miller (davem@redhat.com)
  65. * 2.01:
  66. * 11/08/01: Use library crc32 functions (Matt_Domsch@dell.com)
  67. *
  68. */
  69. #undef DEBUG_DRIVER
  70. static char lancestr[] = "LANCE";
  71. #include <linux/module.h>
  72. #include <linux/kernel.h>
  73. #include <linux/types.h>
  74. #include <linux/fcntl.h>
  75. #include <linux/interrupt.h>
  76. #include <linux/ioport.h>
  77. #include <linux/in.h>
  78. #include <linux/string.h>
  79. #include <linux/delay.h>
  80. #include <linux/crc32.h>
  81. #include <linux/errno.h>
  82. #include <linux/socket.h> /* Used for the temporal inet entries and routing */
  83. #include <linux/route.h>
  84. #include <linux/netdevice.h>
  85. #include <linux/etherdevice.h>
  86. #include <linux/skbuff.h>
  87. #include <linux/ethtool.h>
  88. #include <linux/bitops.h>
  89. #include <linux/dma-mapping.h>
  90. #include <linux/of.h>
  91. #include <linux/of_device.h>
  92. #include <linux/gfp.h>
  93. #include <asm/io.h>
  94. #include <asm/dma.h>
  95. #include <asm/pgtable.h>
  96. #include <asm/byteorder.h> /* Used by the checksum routines */
  97. #include <asm/idprom.h>
  98. #include <asm/prom.h>
  99. #include <asm/auxio.h> /* For tpe-link-test? setting */
  100. #include <asm/irq.h>
  101. #define DRV_NAME "sunlance"
  102. #define DRV_VERSION "2.02"
  103. #define DRV_RELDATE "8/24/03"
  104. #define DRV_AUTHOR "Miguel de Icaza (miguel@nuclecu.unam.mx)"
  105. static char version[] =
  106. DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n";
  107. MODULE_VERSION(DRV_VERSION);
  108. MODULE_AUTHOR(DRV_AUTHOR);
  109. MODULE_DESCRIPTION("Sun Lance ethernet driver");
  110. MODULE_LICENSE("GPL");
  111. /* Define: 2^4 Tx buffers and 2^4 Rx buffers */
  112. #ifndef LANCE_LOG_TX_BUFFERS
  113. #define LANCE_LOG_TX_BUFFERS 4
  114. #define LANCE_LOG_RX_BUFFERS 4
  115. #endif
  116. #define LE_CSR0 0
  117. #define LE_CSR1 1
  118. #define LE_CSR2 2
  119. #define LE_CSR3 3
  120. #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */
  121. #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */
  122. #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */
  123. #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */
  124. #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */
  125. #define LE_C0_MERR 0x0800 /* ME: Memory error */
  126. #define LE_C0_RINT 0x0400 /* Received interrupt */
  127. #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */
  128. #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */
  129. #define LE_C0_INTR 0x0080 /* Interrupt or error */
  130. #define LE_C0_INEA 0x0040 /* Interrupt enable */
  131. #define LE_C0_RXON 0x0020 /* Receiver on */
  132. #define LE_C0_TXON 0x0010 /* Transmitter on */
  133. #define LE_C0_TDMD 0x0008 /* Transmitter demand */
  134. #define LE_C0_STOP 0x0004 /* Stop the card */
  135. #define LE_C0_STRT 0x0002 /* Start the card */
  136. #define LE_C0_INIT 0x0001 /* Init the card */
  137. #define LE_C3_BSWP 0x4 /* SWAP */
  138. #define LE_C3_ACON 0x2 /* ALE Control */
  139. #define LE_C3_BCON 0x1 /* Byte control */
  140. /* Receive message descriptor 1 */
  141. #define LE_R1_OWN 0x80 /* Who owns the entry */
  142. #define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */
  143. #define LE_R1_FRA 0x20 /* FRA: Frame error */
  144. #define LE_R1_OFL 0x10 /* OFL: Frame overflow */
  145. #define LE_R1_CRC 0x08 /* CRC error */
  146. #define LE_R1_BUF 0x04 /* BUF: Buffer error */
  147. #define LE_R1_SOP 0x02 /* Start of packet */
  148. #define LE_R1_EOP 0x01 /* End of packet */
  149. #define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */
  150. #define LE_T1_OWN 0x80 /* Lance owns the packet */
  151. #define LE_T1_ERR 0x40 /* Error summary */
  152. #define LE_T1_EMORE 0x10 /* Error: more than one retry needed */
  153. #define LE_T1_EONE 0x08 /* Error: one retry needed */
  154. #define LE_T1_EDEF 0x04 /* Error: deferred */
  155. #define LE_T1_SOP 0x02 /* Start of packet */
  156. #define LE_T1_EOP 0x01 /* End of packet */
  157. #define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */
  158. #define LE_T3_BUF 0x8000 /* Buffer error */
  159. #define LE_T3_UFL 0x4000 /* Error underflow */
  160. #define LE_T3_LCOL 0x1000 /* Error late collision */
  161. #define LE_T3_CLOS 0x0800 /* Error carrier loss */
  162. #define LE_T3_RTY 0x0400 /* Error retry */
  163. #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */
  164. #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
  165. #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
  166. #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
  167. #define TX_NEXT(__x) (((__x)+1) & TX_RING_MOD_MASK)
  168. #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
  169. #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
  170. #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
  171. #define RX_NEXT(__x) (((__x)+1) & RX_RING_MOD_MASK)
  172. #define PKT_BUF_SZ 1544
  173. #define RX_BUFF_SIZE PKT_BUF_SZ
  174. #define TX_BUFF_SIZE PKT_BUF_SZ
  175. struct lance_rx_desc {
  176. u16 rmd0; /* low address of packet */
  177. u8 rmd1_bits; /* descriptor bits */
  178. u8 rmd1_hadr; /* high address of packet */
  179. s16 length; /* This length is 2s complement (negative)!
  180. * Buffer length
  181. */
  182. u16 mblength; /* This is the actual number of bytes received */
  183. };
  184. struct lance_tx_desc {
  185. u16 tmd0; /* low address of packet */
  186. u8 tmd1_bits; /* descriptor bits */
  187. u8 tmd1_hadr; /* high address of packet */
  188. s16 length; /* Length is 2s complement (negative)! */
  189. u16 misc;
  190. };
  191. /* The LANCE initialization block, described in databook. */
  192. /* On the Sparc, this block should be on a DMA region */
  193. struct lance_init_block {
  194. u16 mode; /* Pre-set mode (reg. 15) */
  195. u8 phys_addr[6]; /* Physical ethernet address */
  196. u32 filter[2]; /* Multicast filter. */
  197. /* Receive and transmit ring base, along with extra bits. */
  198. u16 rx_ptr; /* receive descriptor addr */
  199. u16 rx_len; /* receive len and high addr */
  200. u16 tx_ptr; /* transmit descriptor addr */
  201. u16 tx_len; /* transmit len and high addr */
  202. /* The Tx and Rx ring entries must aligned on 8-byte boundaries. */
  203. struct lance_rx_desc brx_ring[RX_RING_SIZE];
  204. struct lance_tx_desc btx_ring[TX_RING_SIZE];
  205. u8 tx_buf [TX_RING_SIZE][TX_BUFF_SIZE];
  206. u8 pad[2]; /* align rx_buf for copy_and_sum(). */
  207. u8 rx_buf [RX_RING_SIZE][RX_BUFF_SIZE];
  208. };
  209. #define libdesc_offset(rt, elem) \
  210. ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem])))))
  211. #define libbuff_offset(rt, elem) \
  212. ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem][0])))))
  213. struct lance_private {
  214. void __iomem *lregs; /* Lance RAP/RDP regs. */
  215. void __iomem *dregs; /* DMA controller regs. */
  216. struct lance_init_block __iomem *init_block_iomem;
  217. struct lance_init_block *init_block_mem;
  218. spinlock_t lock;
  219. int rx_new, tx_new;
  220. int rx_old, tx_old;
  221. struct platform_device *ledma; /* If set this points to ledma */
  222. char tpe; /* cable-selection is TPE */
  223. char auto_select; /* cable-selection by carrier */
  224. char burst_sizes; /* ledma SBus burst sizes */
  225. char pio_buffer; /* init block in PIO space? */
  226. unsigned short busmaster_regval;
  227. void (*init_ring)(struct net_device *);
  228. void (*rx)(struct net_device *);
  229. void (*tx)(struct net_device *);
  230. char *name;
  231. dma_addr_t init_block_dvma;
  232. struct net_device *dev; /* Backpointer */
  233. struct platform_device *op;
  234. struct platform_device *lebuffer;
  235. struct timer_list multicast_timer;
  236. };
  237. #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
  238. lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
  239. lp->tx_old - lp->tx_new-1)
  240. /* Lance registers. */
  241. #define RDP 0x00UL /* register data port */
  242. #define RAP 0x02UL /* register address port */
  243. #define LANCE_REG_SIZE 0x04UL
  244. #define STOP_LANCE(__lp) \
  245. do { void __iomem *__base = (__lp)->lregs; \
  246. sbus_writew(LE_CSR0, __base + RAP); \
  247. sbus_writew(LE_C0_STOP, __base + RDP); \
  248. } while (0)
  249. int sparc_lance_debug = 2;
  250. /* The Lance uses 24 bit addresses */
  251. /* On the Sun4c the DVMA will provide the remaining bytes for us */
  252. /* On the Sun4m we have to instruct the ledma to provide them */
  253. /* Even worse, on scsi/ether SBUS cards, the init block and the
  254. * transmit/receive buffers are addresses as offsets from absolute
  255. * zero on the lebuffer PIO area. -DaveM
  256. */
  257. #define LANCE_ADDR(x) ((long)(x) & ~0xff000000)
  258. /* Load the CSR registers */
  259. static void load_csrs(struct lance_private *lp)
  260. {
  261. u32 leptr;
  262. if (lp->pio_buffer)
  263. leptr = 0;
  264. else
  265. leptr = LANCE_ADDR(lp->init_block_dvma);
  266. sbus_writew(LE_CSR1, lp->lregs + RAP);
  267. sbus_writew(leptr & 0xffff, lp->lregs + RDP);
  268. sbus_writew(LE_CSR2, lp->lregs + RAP);
  269. sbus_writew(leptr >> 16, lp->lregs + RDP);
  270. sbus_writew(LE_CSR3, lp->lregs + RAP);
  271. sbus_writew(lp->busmaster_regval, lp->lregs + RDP);
  272. /* Point back to csr0 */
  273. sbus_writew(LE_CSR0, lp->lregs + RAP);
  274. }
  275. /* Setup the Lance Rx and Tx rings */
  276. static void lance_init_ring_dvma(struct net_device *dev)
  277. {
  278. struct lance_private *lp = netdev_priv(dev);
  279. struct lance_init_block *ib = lp->init_block_mem;
  280. dma_addr_t aib = lp->init_block_dvma;
  281. __u32 leptr;
  282. int i;
  283. /* Lock out other processes while setting up hardware */
  284. netif_stop_queue(dev);
  285. lp->rx_new = lp->tx_new = 0;
  286. lp->rx_old = lp->tx_old = 0;
  287. /* Copy the ethernet address to the lance init block
  288. * Note that on the sparc you need to swap the ethernet address.
  289. */
  290. ib->phys_addr [0] = dev->dev_addr [1];
  291. ib->phys_addr [1] = dev->dev_addr [0];
  292. ib->phys_addr [2] = dev->dev_addr [3];
  293. ib->phys_addr [3] = dev->dev_addr [2];
  294. ib->phys_addr [4] = dev->dev_addr [5];
  295. ib->phys_addr [5] = dev->dev_addr [4];
  296. /* Setup the Tx ring entries */
  297. for (i = 0; i < TX_RING_SIZE; i++) {
  298. leptr = LANCE_ADDR(aib + libbuff_offset(tx_buf, i));
  299. ib->btx_ring [i].tmd0 = leptr;
  300. ib->btx_ring [i].tmd1_hadr = leptr >> 16;
  301. ib->btx_ring [i].tmd1_bits = 0;
  302. ib->btx_ring [i].length = 0xf000; /* The ones required by tmd2 */
  303. ib->btx_ring [i].misc = 0;
  304. }
  305. /* Setup the Rx ring entries */
  306. for (i = 0; i < RX_RING_SIZE; i++) {
  307. leptr = LANCE_ADDR(aib + libbuff_offset(rx_buf, i));
  308. ib->brx_ring [i].rmd0 = leptr;
  309. ib->brx_ring [i].rmd1_hadr = leptr >> 16;
  310. ib->brx_ring [i].rmd1_bits = LE_R1_OWN;
  311. ib->brx_ring [i].length = -RX_BUFF_SIZE | 0xf000;
  312. ib->brx_ring [i].mblength = 0;
  313. }
  314. /* Setup the initialization block */
  315. /* Setup rx descriptor pointer */
  316. leptr = LANCE_ADDR(aib + libdesc_offset(brx_ring, 0));
  317. ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16);
  318. ib->rx_ptr = leptr;
  319. /* Setup tx descriptor pointer */
  320. leptr = LANCE_ADDR(aib + libdesc_offset(btx_ring, 0));
  321. ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16);
  322. ib->tx_ptr = leptr;
  323. }
  324. static void lance_init_ring_pio(struct net_device *dev)
  325. {
  326. struct lance_private *lp = netdev_priv(dev);
  327. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  328. u32 leptr;
  329. int i;
  330. /* Lock out other processes while setting up hardware */
  331. netif_stop_queue(dev);
  332. lp->rx_new = lp->tx_new = 0;
  333. lp->rx_old = lp->tx_old = 0;
  334. /* Copy the ethernet address to the lance init block
  335. * Note that on the sparc you need to swap the ethernet address.
  336. */
  337. sbus_writeb(dev->dev_addr[1], &ib->phys_addr[0]);
  338. sbus_writeb(dev->dev_addr[0], &ib->phys_addr[1]);
  339. sbus_writeb(dev->dev_addr[3], &ib->phys_addr[2]);
  340. sbus_writeb(dev->dev_addr[2], &ib->phys_addr[3]);
  341. sbus_writeb(dev->dev_addr[5], &ib->phys_addr[4]);
  342. sbus_writeb(dev->dev_addr[4], &ib->phys_addr[5]);
  343. /* Setup the Tx ring entries */
  344. for (i = 0; i < TX_RING_SIZE; i++) {
  345. leptr = libbuff_offset(tx_buf, i);
  346. sbus_writew(leptr, &ib->btx_ring [i].tmd0);
  347. sbus_writeb(leptr >> 16,&ib->btx_ring [i].tmd1_hadr);
  348. sbus_writeb(0, &ib->btx_ring [i].tmd1_bits);
  349. /* The ones required by tmd2 */
  350. sbus_writew(0xf000, &ib->btx_ring [i].length);
  351. sbus_writew(0, &ib->btx_ring [i].misc);
  352. }
  353. /* Setup the Rx ring entries */
  354. for (i = 0; i < RX_RING_SIZE; i++) {
  355. leptr = libbuff_offset(rx_buf, i);
  356. sbus_writew(leptr, &ib->brx_ring [i].rmd0);
  357. sbus_writeb(leptr >> 16,&ib->brx_ring [i].rmd1_hadr);
  358. sbus_writeb(LE_R1_OWN, &ib->brx_ring [i].rmd1_bits);
  359. sbus_writew(-RX_BUFF_SIZE|0xf000,
  360. &ib->brx_ring [i].length);
  361. sbus_writew(0, &ib->brx_ring [i].mblength);
  362. }
  363. /* Setup the initialization block */
  364. /* Setup rx descriptor pointer */
  365. leptr = libdesc_offset(brx_ring, 0);
  366. sbus_writew((LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16),
  367. &ib->rx_len);
  368. sbus_writew(leptr, &ib->rx_ptr);
  369. /* Setup tx descriptor pointer */
  370. leptr = libdesc_offset(btx_ring, 0);
  371. sbus_writew((LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16),
  372. &ib->tx_len);
  373. sbus_writew(leptr, &ib->tx_ptr);
  374. }
  375. static void init_restart_ledma(struct lance_private *lp)
  376. {
  377. u32 csr = sbus_readl(lp->dregs + DMA_CSR);
  378. if (!(csr & DMA_HNDL_ERROR)) {
  379. /* E-Cache draining */
  380. while (sbus_readl(lp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN)
  381. barrier();
  382. }
  383. csr = sbus_readl(lp->dregs + DMA_CSR);
  384. csr &= ~DMA_E_BURSTS;
  385. if (lp->burst_sizes & DMA_BURST32)
  386. csr |= DMA_E_BURST32;
  387. else
  388. csr |= DMA_E_BURST16;
  389. csr |= (DMA_DSBL_RD_DRN | DMA_DSBL_WR_INV | DMA_FIFO_INV);
  390. if (lp->tpe)
  391. csr |= DMA_EN_ENETAUI;
  392. else
  393. csr &= ~DMA_EN_ENETAUI;
  394. udelay(20);
  395. sbus_writel(csr, lp->dregs + DMA_CSR);
  396. udelay(200);
  397. }
  398. static int init_restart_lance(struct lance_private *lp)
  399. {
  400. u16 regval = 0;
  401. int i;
  402. if (lp->dregs)
  403. init_restart_ledma(lp);
  404. sbus_writew(LE_CSR0, lp->lregs + RAP);
  405. sbus_writew(LE_C0_INIT, lp->lregs + RDP);
  406. /* Wait for the lance to complete initialization */
  407. for (i = 0; i < 100; i++) {
  408. regval = sbus_readw(lp->lregs + RDP);
  409. if (regval & (LE_C0_ERR | LE_C0_IDON))
  410. break;
  411. barrier();
  412. }
  413. if (i == 100 || (regval & LE_C0_ERR)) {
  414. printk(KERN_ERR "LANCE unopened after %d ticks, csr0=%4.4x.\n",
  415. i, regval);
  416. if (lp->dregs)
  417. printk("dcsr=%8.8x\n", sbus_readl(lp->dregs + DMA_CSR));
  418. return -1;
  419. }
  420. /* Clear IDON by writing a "1", enable interrupts and start lance */
  421. sbus_writew(LE_C0_IDON, lp->lregs + RDP);
  422. sbus_writew(LE_C0_INEA | LE_C0_STRT, lp->lregs + RDP);
  423. if (lp->dregs) {
  424. u32 csr = sbus_readl(lp->dregs + DMA_CSR);
  425. csr |= DMA_INT_ENAB;
  426. sbus_writel(csr, lp->dregs + DMA_CSR);
  427. }
  428. return 0;
  429. }
  430. static void lance_rx_dvma(struct net_device *dev)
  431. {
  432. struct lance_private *lp = netdev_priv(dev);
  433. struct lance_init_block *ib = lp->init_block_mem;
  434. struct lance_rx_desc *rd;
  435. u8 bits;
  436. int len, entry = lp->rx_new;
  437. struct sk_buff *skb;
  438. for (rd = &ib->brx_ring [entry];
  439. !((bits = rd->rmd1_bits) & LE_R1_OWN);
  440. rd = &ib->brx_ring [entry]) {
  441. /* We got an incomplete frame? */
  442. if ((bits & LE_R1_POK) != LE_R1_POK) {
  443. dev->stats.rx_over_errors++;
  444. dev->stats.rx_errors++;
  445. } else if (bits & LE_R1_ERR) {
  446. /* Count only the end frame as a rx error,
  447. * not the beginning
  448. */
  449. if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++;
  450. if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++;
  451. if (bits & LE_R1_OFL) dev->stats.rx_over_errors++;
  452. if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++;
  453. if (bits & LE_R1_EOP) dev->stats.rx_errors++;
  454. } else {
  455. len = (rd->mblength & 0xfff) - 4;
  456. skb = netdev_alloc_skb(dev, len + 2);
  457. if (skb == NULL) {
  458. dev->stats.rx_dropped++;
  459. rd->mblength = 0;
  460. rd->rmd1_bits = LE_R1_OWN;
  461. lp->rx_new = RX_NEXT(entry);
  462. return;
  463. }
  464. dev->stats.rx_bytes += len;
  465. skb_reserve(skb, 2); /* 16 byte align */
  466. skb_put(skb, len); /* make room */
  467. skb_copy_to_linear_data(skb,
  468. (unsigned char *)&(ib->rx_buf [entry][0]),
  469. len);
  470. skb->protocol = eth_type_trans(skb, dev);
  471. netif_rx(skb);
  472. dev->stats.rx_packets++;
  473. }
  474. /* Return the packet to the pool */
  475. rd->mblength = 0;
  476. rd->rmd1_bits = LE_R1_OWN;
  477. entry = RX_NEXT(entry);
  478. }
  479. lp->rx_new = entry;
  480. }
  481. static void lance_tx_dvma(struct net_device *dev)
  482. {
  483. struct lance_private *lp = netdev_priv(dev);
  484. struct lance_init_block *ib = lp->init_block_mem;
  485. int i, j;
  486. spin_lock(&lp->lock);
  487. j = lp->tx_old;
  488. for (i = j; i != lp->tx_new; i = j) {
  489. struct lance_tx_desc *td = &ib->btx_ring [i];
  490. u8 bits = td->tmd1_bits;
  491. /* If we hit a packet not owned by us, stop */
  492. if (bits & LE_T1_OWN)
  493. break;
  494. if (bits & LE_T1_ERR) {
  495. u16 status = td->misc;
  496. dev->stats.tx_errors++;
  497. if (status & LE_T3_RTY) dev->stats.tx_aborted_errors++;
  498. if (status & LE_T3_LCOL) dev->stats.tx_window_errors++;
  499. if (status & LE_T3_CLOS) {
  500. dev->stats.tx_carrier_errors++;
  501. if (lp->auto_select) {
  502. lp->tpe = 1 - lp->tpe;
  503. printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
  504. dev->name, lp->tpe?"TPE":"AUI");
  505. STOP_LANCE(lp);
  506. lp->init_ring(dev);
  507. load_csrs(lp);
  508. init_restart_lance(lp);
  509. goto out;
  510. }
  511. }
  512. /* Buffer errors and underflows turn off the
  513. * transmitter, restart the adapter.
  514. */
  515. if (status & (LE_T3_BUF|LE_T3_UFL)) {
  516. dev->stats.tx_fifo_errors++;
  517. printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
  518. dev->name);
  519. STOP_LANCE(lp);
  520. lp->init_ring(dev);
  521. load_csrs(lp);
  522. init_restart_lance(lp);
  523. goto out;
  524. }
  525. } else if ((bits & LE_T1_POK) == LE_T1_POK) {
  526. /*
  527. * So we don't count the packet more than once.
  528. */
  529. td->tmd1_bits = bits & ~(LE_T1_POK);
  530. /* One collision before packet was sent. */
  531. if (bits & LE_T1_EONE)
  532. dev->stats.collisions++;
  533. /* More than one collision, be optimistic. */
  534. if (bits & LE_T1_EMORE)
  535. dev->stats.collisions += 2;
  536. dev->stats.tx_packets++;
  537. }
  538. j = TX_NEXT(j);
  539. }
  540. lp->tx_old = j;
  541. out:
  542. if (netif_queue_stopped(dev) &&
  543. TX_BUFFS_AVAIL > 0)
  544. netif_wake_queue(dev);
  545. spin_unlock(&lp->lock);
  546. }
  547. static void lance_piocopy_to_skb(struct sk_buff *skb, void __iomem *piobuf, int len)
  548. {
  549. u16 *p16 = (u16 *) skb->data;
  550. u32 *p32;
  551. u8 *p8;
  552. void __iomem *pbuf = piobuf;
  553. /* We know here that both src and dest are on a 16bit boundary. */
  554. *p16++ = sbus_readw(pbuf);
  555. p32 = (u32 *) p16;
  556. pbuf += 2;
  557. len -= 2;
  558. while (len >= 4) {
  559. *p32++ = sbus_readl(pbuf);
  560. pbuf += 4;
  561. len -= 4;
  562. }
  563. p8 = (u8 *) p32;
  564. if (len >= 2) {
  565. p16 = (u16 *) p32;
  566. *p16++ = sbus_readw(pbuf);
  567. pbuf += 2;
  568. len -= 2;
  569. p8 = (u8 *) p16;
  570. }
  571. if (len >= 1)
  572. *p8 = sbus_readb(pbuf);
  573. }
  574. static void lance_rx_pio(struct net_device *dev)
  575. {
  576. struct lance_private *lp = netdev_priv(dev);
  577. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  578. struct lance_rx_desc __iomem *rd;
  579. unsigned char bits;
  580. int len, entry;
  581. struct sk_buff *skb;
  582. entry = lp->rx_new;
  583. for (rd = &ib->brx_ring [entry];
  584. !((bits = sbus_readb(&rd->rmd1_bits)) & LE_R1_OWN);
  585. rd = &ib->brx_ring [entry]) {
  586. /* We got an incomplete frame? */
  587. if ((bits & LE_R1_POK) != LE_R1_POK) {
  588. dev->stats.rx_over_errors++;
  589. dev->stats.rx_errors++;
  590. } else if (bits & LE_R1_ERR) {
  591. /* Count only the end frame as a rx error,
  592. * not the beginning
  593. */
  594. if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++;
  595. if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++;
  596. if (bits & LE_R1_OFL) dev->stats.rx_over_errors++;
  597. if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++;
  598. if (bits & LE_R1_EOP) dev->stats.rx_errors++;
  599. } else {
  600. len = (sbus_readw(&rd->mblength) & 0xfff) - 4;
  601. skb = netdev_alloc_skb(dev, len + 2);
  602. if (skb == NULL) {
  603. dev->stats.rx_dropped++;
  604. sbus_writew(0, &rd->mblength);
  605. sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
  606. lp->rx_new = RX_NEXT(entry);
  607. return;
  608. }
  609. dev->stats.rx_bytes += len;
  610. skb_reserve (skb, 2); /* 16 byte align */
  611. skb_put(skb, len); /* make room */
  612. lance_piocopy_to_skb(skb, &(ib->rx_buf[entry][0]), len);
  613. skb->protocol = eth_type_trans(skb, dev);
  614. netif_rx(skb);
  615. dev->stats.rx_packets++;
  616. }
  617. /* Return the packet to the pool */
  618. sbus_writew(0, &rd->mblength);
  619. sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
  620. entry = RX_NEXT(entry);
  621. }
  622. lp->rx_new = entry;
  623. }
  624. static void lance_tx_pio(struct net_device *dev)
  625. {
  626. struct lance_private *lp = netdev_priv(dev);
  627. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  628. int i, j;
  629. spin_lock(&lp->lock);
  630. j = lp->tx_old;
  631. for (i = j; i != lp->tx_new; i = j) {
  632. struct lance_tx_desc __iomem *td = &ib->btx_ring [i];
  633. u8 bits = sbus_readb(&td->tmd1_bits);
  634. /* If we hit a packet not owned by us, stop */
  635. if (bits & LE_T1_OWN)
  636. break;
  637. if (bits & LE_T1_ERR) {
  638. u16 status = sbus_readw(&td->misc);
  639. dev->stats.tx_errors++;
  640. if (status & LE_T3_RTY) dev->stats.tx_aborted_errors++;
  641. if (status & LE_T3_LCOL) dev->stats.tx_window_errors++;
  642. if (status & LE_T3_CLOS) {
  643. dev->stats.tx_carrier_errors++;
  644. if (lp->auto_select) {
  645. lp->tpe = 1 - lp->tpe;
  646. printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
  647. dev->name, lp->tpe?"TPE":"AUI");
  648. STOP_LANCE(lp);
  649. lp->init_ring(dev);
  650. load_csrs(lp);
  651. init_restart_lance(lp);
  652. goto out;
  653. }
  654. }
  655. /* Buffer errors and underflows turn off the
  656. * transmitter, restart the adapter.
  657. */
  658. if (status & (LE_T3_BUF|LE_T3_UFL)) {
  659. dev->stats.tx_fifo_errors++;
  660. printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
  661. dev->name);
  662. STOP_LANCE(lp);
  663. lp->init_ring(dev);
  664. load_csrs(lp);
  665. init_restart_lance(lp);
  666. goto out;
  667. }
  668. } else if ((bits & LE_T1_POK) == LE_T1_POK) {
  669. /*
  670. * So we don't count the packet more than once.
  671. */
  672. sbus_writeb(bits & ~(LE_T1_POK), &td->tmd1_bits);
  673. /* One collision before packet was sent. */
  674. if (bits & LE_T1_EONE)
  675. dev->stats.collisions++;
  676. /* More than one collision, be optimistic. */
  677. if (bits & LE_T1_EMORE)
  678. dev->stats.collisions += 2;
  679. dev->stats.tx_packets++;
  680. }
  681. j = TX_NEXT(j);
  682. }
  683. lp->tx_old = j;
  684. if (netif_queue_stopped(dev) &&
  685. TX_BUFFS_AVAIL > 0)
  686. netif_wake_queue(dev);
  687. out:
  688. spin_unlock(&lp->lock);
  689. }
  690. static irqreturn_t lance_interrupt(int irq, void *dev_id)
  691. {
  692. struct net_device *dev = dev_id;
  693. struct lance_private *lp = netdev_priv(dev);
  694. int csr0;
  695. sbus_writew(LE_CSR0, lp->lregs + RAP);
  696. csr0 = sbus_readw(lp->lregs + RDP);
  697. /* Acknowledge all the interrupt sources ASAP */
  698. sbus_writew(csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT),
  699. lp->lregs + RDP);
  700. if ((csr0 & LE_C0_ERR) != 0) {
  701. /* Clear the error condition */
  702. sbus_writew((LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
  703. LE_C0_CERR | LE_C0_MERR),
  704. lp->lregs + RDP);
  705. }
  706. if (csr0 & LE_C0_RINT)
  707. lp->rx(dev);
  708. if (csr0 & LE_C0_TINT)
  709. lp->tx(dev);
  710. if (csr0 & LE_C0_BABL)
  711. dev->stats.tx_errors++;
  712. if (csr0 & LE_C0_MISS)
  713. dev->stats.rx_errors++;
  714. if (csr0 & LE_C0_MERR) {
  715. if (lp->dregs) {
  716. u32 addr = sbus_readl(lp->dregs + DMA_ADDR);
  717. printk(KERN_ERR "%s: Memory error, status %04x, addr %06x\n",
  718. dev->name, csr0, addr & 0xffffff);
  719. } else {
  720. printk(KERN_ERR "%s: Memory error, status %04x\n",
  721. dev->name, csr0);
  722. }
  723. sbus_writew(LE_C0_STOP, lp->lregs + RDP);
  724. if (lp->dregs) {
  725. u32 dma_csr = sbus_readl(lp->dregs + DMA_CSR);
  726. dma_csr |= DMA_FIFO_INV;
  727. sbus_writel(dma_csr, lp->dregs + DMA_CSR);
  728. }
  729. lp->init_ring(dev);
  730. load_csrs(lp);
  731. init_restart_lance(lp);
  732. netif_wake_queue(dev);
  733. }
  734. sbus_writew(LE_C0_INEA, lp->lregs + RDP);
  735. return IRQ_HANDLED;
  736. }
  737. /* Build a fake network packet and send it to ourselves. */
  738. static void build_fake_packet(struct lance_private *lp)
  739. {
  740. struct net_device *dev = lp->dev;
  741. int i, entry;
  742. entry = lp->tx_new & TX_RING_MOD_MASK;
  743. if (lp->pio_buffer) {
  744. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  745. u16 __iomem *packet = (u16 __iomem *) &(ib->tx_buf[entry][0]);
  746. struct ethhdr __iomem *eth = (struct ethhdr __iomem *) packet;
  747. for (i = 0; i < (ETH_ZLEN / sizeof(u16)); i++)
  748. sbus_writew(0, &packet[i]);
  749. for (i = 0; i < 6; i++) {
  750. sbus_writeb(dev->dev_addr[i], &eth->h_dest[i]);
  751. sbus_writeb(dev->dev_addr[i], &eth->h_source[i]);
  752. }
  753. sbus_writew((-ETH_ZLEN) | 0xf000, &ib->btx_ring[entry].length);
  754. sbus_writew(0, &ib->btx_ring[entry].misc);
  755. sbus_writeb(LE_T1_POK|LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
  756. } else {
  757. struct lance_init_block *ib = lp->init_block_mem;
  758. u16 *packet = (u16 *) &(ib->tx_buf[entry][0]);
  759. struct ethhdr *eth = (struct ethhdr *) packet;
  760. memset(packet, 0, ETH_ZLEN);
  761. for (i = 0; i < 6; i++) {
  762. eth->h_dest[i] = dev->dev_addr[i];
  763. eth->h_source[i] = dev->dev_addr[i];
  764. }
  765. ib->btx_ring[entry].length = (-ETH_ZLEN) | 0xf000;
  766. ib->btx_ring[entry].misc = 0;
  767. ib->btx_ring[entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN);
  768. }
  769. lp->tx_new = TX_NEXT(entry);
  770. }
  771. static int lance_open(struct net_device *dev)
  772. {
  773. struct lance_private *lp = netdev_priv(dev);
  774. int status = 0;
  775. STOP_LANCE(lp);
  776. if (request_irq(dev->irq, lance_interrupt, IRQF_SHARED,
  777. lancestr, (void *) dev)) {
  778. printk(KERN_ERR "Lance: Can't get irq %d\n", dev->irq);
  779. return -EAGAIN;
  780. }
  781. /* On the 4m, setup the ledma to provide the upper bits for buffers */
  782. if (lp->dregs) {
  783. u32 regval = lp->init_block_dvma & 0xff000000;
  784. sbus_writel(regval, lp->dregs + DMA_TEST);
  785. }
  786. /* Set mode and clear multicast filter only at device open,
  787. * so that lance_init_ring() called at any error will not
  788. * forget multicast filters.
  789. *
  790. * BTW it is common bug in all lance drivers! --ANK
  791. */
  792. if (lp->pio_buffer) {
  793. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  794. sbus_writew(0, &ib->mode);
  795. sbus_writel(0, &ib->filter[0]);
  796. sbus_writel(0, &ib->filter[1]);
  797. } else {
  798. struct lance_init_block *ib = lp->init_block_mem;
  799. ib->mode = 0;
  800. ib->filter [0] = 0;
  801. ib->filter [1] = 0;
  802. }
  803. lp->init_ring(dev);
  804. load_csrs(lp);
  805. netif_start_queue(dev);
  806. status = init_restart_lance(lp);
  807. if (!status && lp->auto_select) {
  808. build_fake_packet(lp);
  809. sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
  810. }
  811. return status;
  812. }
  813. static int lance_close(struct net_device *dev)
  814. {
  815. struct lance_private *lp = netdev_priv(dev);
  816. netif_stop_queue(dev);
  817. del_timer_sync(&lp->multicast_timer);
  818. STOP_LANCE(lp);
  819. free_irq(dev->irq, (void *) dev);
  820. return 0;
  821. }
  822. static int lance_reset(struct net_device *dev)
  823. {
  824. struct lance_private *lp = netdev_priv(dev);
  825. int status;
  826. STOP_LANCE(lp);
  827. /* On the 4m, reset the dma too */
  828. if (lp->dregs) {
  829. u32 csr, addr;
  830. printk(KERN_ERR "resetting ledma\n");
  831. csr = sbus_readl(lp->dregs + DMA_CSR);
  832. sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
  833. udelay(200);
  834. sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
  835. addr = lp->init_block_dvma & 0xff000000;
  836. sbus_writel(addr, lp->dregs + DMA_TEST);
  837. }
  838. lp->init_ring(dev);
  839. load_csrs(lp);
  840. netif_trans_update(dev); /* prevent tx timeout */
  841. status = init_restart_lance(lp);
  842. return status;
  843. }
  844. static void lance_piocopy_from_skb(void __iomem *dest, unsigned char *src, int len)
  845. {
  846. void __iomem *piobuf = dest;
  847. u32 *p32;
  848. u16 *p16;
  849. u8 *p8;
  850. switch ((unsigned long)src & 0x3) {
  851. case 0:
  852. p32 = (u32 *) src;
  853. while (len >= 4) {
  854. sbus_writel(*p32, piobuf);
  855. p32++;
  856. piobuf += 4;
  857. len -= 4;
  858. }
  859. src = (char *) p32;
  860. break;
  861. case 1:
  862. case 3:
  863. p8 = (u8 *) src;
  864. while (len >= 4) {
  865. u32 val;
  866. val = p8[0] << 24;
  867. val |= p8[1] << 16;
  868. val |= p8[2] << 8;
  869. val |= p8[3];
  870. sbus_writel(val, piobuf);
  871. p8 += 4;
  872. piobuf += 4;
  873. len -= 4;
  874. }
  875. src = (char *) p8;
  876. break;
  877. case 2:
  878. p16 = (u16 *) src;
  879. while (len >= 4) {
  880. u32 val = p16[0]<<16 | p16[1];
  881. sbus_writel(val, piobuf);
  882. p16 += 2;
  883. piobuf += 4;
  884. len -= 4;
  885. }
  886. src = (char *) p16;
  887. break;
  888. }
  889. if (len >= 2) {
  890. u16 val = src[0] << 8 | src[1];
  891. sbus_writew(val, piobuf);
  892. src += 2;
  893. piobuf += 2;
  894. len -= 2;
  895. }
  896. if (len >= 1)
  897. sbus_writeb(src[0], piobuf);
  898. }
  899. static void lance_piozero(void __iomem *dest, int len)
  900. {
  901. void __iomem *piobuf = dest;
  902. if ((unsigned long)piobuf & 1) {
  903. sbus_writeb(0, piobuf);
  904. piobuf += 1;
  905. len -= 1;
  906. if (len == 0)
  907. return;
  908. }
  909. if (len == 1) {
  910. sbus_writeb(0, piobuf);
  911. return;
  912. }
  913. if ((unsigned long)piobuf & 2) {
  914. sbus_writew(0, piobuf);
  915. piobuf += 2;
  916. len -= 2;
  917. if (len == 0)
  918. return;
  919. }
  920. while (len >= 4) {
  921. sbus_writel(0, piobuf);
  922. piobuf += 4;
  923. len -= 4;
  924. }
  925. if (len >= 2) {
  926. sbus_writew(0, piobuf);
  927. piobuf += 2;
  928. len -= 2;
  929. }
  930. if (len >= 1)
  931. sbus_writeb(0, piobuf);
  932. }
  933. static void lance_tx_timeout(struct net_device *dev)
  934. {
  935. struct lance_private *lp = netdev_priv(dev);
  936. printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
  937. dev->name, sbus_readw(lp->lregs + RDP));
  938. lance_reset(dev);
  939. netif_wake_queue(dev);
  940. }
  941. static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
  942. {
  943. struct lance_private *lp = netdev_priv(dev);
  944. int entry, skblen, len;
  945. skblen = skb->len;
  946. len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
  947. spin_lock_irq(&lp->lock);
  948. dev->stats.tx_bytes += len;
  949. entry = lp->tx_new & TX_RING_MOD_MASK;
  950. if (lp->pio_buffer) {
  951. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  952. sbus_writew((-len) | 0xf000, &ib->btx_ring[entry].length);
  953. sbus_writew(0, &ib->btx_ring[entry].misc);
  954. lance_piocopy_from_skb(&ib->tx_buf[entry][0], skb->data, skblen);
  955. if (len != skblen)
  956. lance_piozero(&ib->tx_buf[entry][skblen], len - skblen);
  957. sbus_writeb(LE_T1_POK | LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
  958. } else {
  959. struct lance_init_block *ib = lp->init_block_mem;
  960. ib->btx_ring [entry].length = (-len) | 0xf000;
  961. ib->btx_ring [entry].misc = 0;
  962. skb_copy_from_linear_data(skb, &ib->tx_buf [entry][0], skblen);
  963. if (len != skblen)
  964. memset((char *) &ib->tx_buf [entry][skblen], 0, len - skblen);
  965. ib->btx_ring [entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN);
  966. }
  967. lp->tx_new = TX_NEXT(entry);
  968. if (TX_BUFFS_AVAIL <= 0)
  969. netif_stop_queue(dev);
  970. /* Kick the lance: transmit now */
  971. sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
  972. /* Read back CSR to invalidate the E-Cache.
  973. * This is needed, because DMA_DSBL_WR_INV is set.
  974. */
  975. if (lp->dregs)
  976. sbus_readw(lp->lregs + RDP);
  977. spin_unlock_irq(&lp->lock);
  978. dev_kfree_skb(skb);
  979. return NETDEV_TX_OK;
  980. }
  981. /* taken from the depca driver */
  982. static void lance_load_multicast(struct net_device *dev)
  983. {
  984. struct lance_private *lp = netdev_priv(dev);
  985. struct netdev_hw_addr *ha;
  986. u32 crc;
  987. u32 val;
  988. /* set all multicast bits */
  989. if (dev->flags & IFF_ALLMULTI)
  990. val = ~0;
  991. else
  992. val = 0;
  993. if (lp->pio_buffer) {
  994. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  995. sbus_writel(val, &ib->filter[0]);
  996. sbus_writel(val, &ib->filter[1]);
  997. } else {
  998. struct lance_init_block *ib = lp->init_block_mem;
  999. ib->filter [0] = val;
  1000. ib->filter [1] = val;
  1001. }
  1002. if (dev->flags & IFF_ALLMULTI)
  1003. return;
  1004. /* Add addresses */
  1005. netdev_for_each_mc_addr(ha, dev) {
  1006. crc = ether_crc_le(6, ha->addr);
  1007. crc = crc >> 26;
  1008. if (lp->pio_buffer) {
  1009. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  1010. u16 __iomem *mcast_table = (u16 __iomem *) &ib->filter;
  1011. u16 tmp = sbus_readw(&mcast_table[crc>>4]);
  1012. tmp |= 1 << (crc & 0xf);
  1013. sbus_writew(tmp, &mcast_table[crc>>4]);
  1014. } else {
  1015. struct lance_init_block *ib = lp->init_block_mem;
  1016. u16 *mcast_table = (u16 *) &ib->filter;
  1017. mcast_table [crc >> 4] |= 1 << (crc & 0xf);
  1018. }
  1019. }
  1020. }
  1021. static void lance_set_multicast(struct net_device *dev)
  1022. {
  1023. struct lance_private *lp = netdev_priv(dev);
  1024. struct lance_init_block *ib_mem = lp->init_block_mem;
  1025. struct lance_init_block __iomem *ib_iomem = lp->init_block_iomem;
  1026. u16 mode;
  1027. if (!netif_running(dev))
  1028. return;
  1029. if (lp->tx_old != lp->tx_new) {
  1030. mod_timer(&lp->multicast_timer, jiffies + 4);
  1031. netif_wake_queue(dev);
  1032. return;
  1033. }
  1034. netif_stop_queue(dev);
  1035. STOP_LANCE(lp);
  1036. lp->init_ring(dev);
  1037. if (lp->pio_buffer)
  1038. mode = sbus_readw(&ib_iomem->mode);
  1039. else
  1040. mode = ib_mem->mode;
  1041. if (dev->flags & IFF_PROMISC) {
  1042. mode |= LE_MO_PROM;
  1043. if (lp->pio_buffer)
  1044. sbus_writew(mode, &ib_iomem->mode);
  1045. else
  1046. ib_mem->mode = mode;
  1047. } else {
  1048. mode &= ~LE_MO_PROM;
  1049. if (lp->pio_buffer)
  1050. sbus_writew(mode, &ib_iomem->mode);
  1051. else
  1052. ib_mem->mode = mode;
  1053. lance_load_multicast(dev);
  1054. }
  1055. load_csrs(lp);
  1056. init_restart_lance(lp);
  1057. netif_wake_queue(dev);
  1058. }
  1059. static void lance_set_multicast_retry(unsigned long _opaque)
  1060. {
  1061. struct net_device *dev = (struct net_device *) _opaque;
  1062. lance_set_multicast(dev);
  1063. }
  1064. static void lance_free_hwresources(struct lance_private *lp)
  1065. {
  1066. if (lp->lregs)
  1067. of_iounmap(&lp->op->resource[0], lp->lregs, LANCE_REG_SIZE);
  1068. if (lp->dregs) {
  1069. struct platform_device *ledma = lp->ledma;
  1070. of_iounmap(&ledma->resource[0], lp->dregs,
  1071. resource_size(&ledma->resource[0]));
  1072. }
  1073. if (lp->init_block_iomem) {
  1074. of_iounmap(&lp->lebuffer->resource[0], lp->init_block_iomem,
  1075. sizeof(struct lance_init_block));
  1076. } else if (lp->init_block_mem) {
  1077. dma_free_coherent(&lp->op->dev,
  1078. sizeof(struct lance_init_block),
  1079. lp->init_block_mem,
  1080. lp->init_block_dvma);
  1081. }
  1082. }
  1083. /* Ethtool support... */
  1084. static void sparc_lance_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1085. {
  1086. strlcpy(info->driver, "sunlance", sizeof(info->driver));
  1087. strlcpy(info->version, "2.02", sizeof(info->version));
  1088. }
  1089. static const struct ethtool_ops sparc_lance_ethtool_ops = {
  1090. .get_drvinfo = sparc_lance_get_drvinfo,
  1091. .get_link = ethtool_op_get_link,
  1092. };
  1093. static const struct net_device_ops sparc_lance_ops = {
  1094. .ndo_open = lance_open,
  1095. .ndo_stop = lance_close,
  1096. .ndo_start_xmit = lance_start_xmit,
  1097. .ndo_set_rx_mode = lance_set_multicast,
  1098. .ndo_tx_timeout = lance_tx_timeout,
  1099. .ndo_change_mtu = eth_change_mtu,
  1100. .ndo_set_mac_address = eth_mac_addr,
  1101. .ndo_validate_addr = eth_validate_addr,
  1102. };
  1103. static int sparc_lance_probe_one(struct platform_device *op,
  1104. struct platform_device *ledma,
  1105. struct platform_device *lebuffer)
  1106. {
  1107. struct device_node *dp = op->dev.of_node;
  1108. static unsigned version_printed;
  1109. struct lance_private *lp;
  1110. struct net_device *dev;
  1111. int i;
  1112. dev = alloc_etherdev(sizeof(struct lance_private) + 8);
  1113. if (!dev)
  1114. return -ENOMEM;
  1115. lp = netdev_priv(dev);
  1116. if (sparc_lance_debug && version_printed++ == 0)
  1117. printk (KERN_INFO "%s", version);
  1118. spin_lock_init(&lp->lock);
  1119. /* Copy the IDPROM ethernet address to the device structure, later we
  1120. * will copy the address in the device structure to the lance
  1121. * initialization block.
  1122. */
  1123. for (i = 0; i < 6; i++)
  1124. dev->dev_addr[i] = idprom->id_ethaddr[i];
  1125. /* Get the IO region */
  1126. lp->lregs = of_ioremap(&op->resource[0], 0,
  1127. LANCE_REG_SIZE, lancestr);
  1128. if (!lp->lregs) {
  1129. printk(KERN_ERR "SunLance: Cannot map registers.\n");
  1130. goto fail;
  1131. }
  1132. lp->ledma = ledma;
  1133. if (lp->ledma) {
  1134. lp->dregs = of_ioremap(&ledma->resource[0], 0,
  1135. resource_size(&ledma->resource[0]),
  1136. "ledma");
  1137. if (!lp->dregs) {
  1138. printk(KERN_ERR "SunLance: Cannot map "
  1139. "ledma registers.\n");
  1140. goto fail;
  1141. }
  1142. }
  1143. lp->op = op;
  1144. lp->lebuffer = lebuffer;
  1145. if (lebuffer) {
  1146. /* sanity check */
  1147. if (lebuffer->resource[0].start & 7) {
  1148. printk(KERN_ERR "SunLance: ERROR: Rx and Tx rings not on even boundary.\n");
  1149. goto fail;
  1150. }
  1151. lp->init_block_iomem =
  1152. of_ioremap(&lebuffer->resource[0], 0,
  1153. sizeof(struct lance_init_block), "lebuffer");
  1154. if (!lp->init_block_iomem) {
  1155. printk(KERN_ERR "SunLance: Cannot map PIO buffer.\n");
  1156. goto fail;
  1157. }
  1158. lp->init_block_dvma = 0;
  1159. lp->pio_buffer = 1;
  1160. lp->init_ring = lance_init_ring_pio;
  1161. lp->rx = lance_rx_pio;
  1162. lp->tx = lance_tx_pio;
  1163. } else {
  1164. lp->init_block_mem =
  1165. dma_alloc_coherent(&op->dev,
  1166. sizeof(struct lance_init_block),
  1167. &lp->init_block_dvma, GFP_ATOMIC);
  1168. if (!lp->init_block_mem)
  1169. goto fail;
  1170. lp->pio_buffer = 0;
  1171. lp->init_ring = lance_init_ring_dvma;
  1172. lp->rx = lance_rx_dvma;
  1173. lp->tx = lance_tx_dvma;
  1174. }
  1175. lp->busmaster_regval = of_getintprop_default(dp, "busmaster-regval",
  1176. (LE_C3_BSWP |
  1177. LE_C3_ACON |
  1178. LE_C3_BCON));
  1179. lp->name = lancestr;
  1180. lp->burst_sizes = 0;
  1181. if (lp->ledma) {
  1182. struct device_node *ledma_dp = ledma->dev.of_node;
  1183. struct device_node *sbus_dp;
  1184. unsigned int sbmask;
  1185. const char *prop;
  1186. u32 csr;
  1187. /* Find burst-size property for ledma */
  1188. lp->burst_sizes = of_getintprop_default(ledma_dp,
  1189. "burst-sizes", 0);
  1190. /* ledma may be capable of fast bursts, but sbus may not. */
  1191. sbus_dp = ledma_dp->parent;
  1192. sbmask = of_getintprop_default(sbus_dp, "burst-sizes",
  1193. DMA_BURSTBITS);
  1194. lp->burst_sizes &= sbmask;
  1195. /* Get the cable-selection property */
  1196. prop = of_get_property(ledma_dp, "cable-selection", NULL);
  1197. if (!prop || prop[0] == '\0') {
  1198. struct device_node *nd;
  1199. printk(KERN_INFO "SunLance: using "
  1200. "auto-carrier-detection.\n");
  1201. nd = of_find_node_by_path("/options");
  1202. if (!nd)
  1203. goto no_link_test;
  1204. prop = of_get_property(nd, "tpe-link-test?", NULL);
  1205. if (!prop)
  1206. goto no_link_test;
  1207. if (strcmp(prop, "true")) {
  1208. printk(KERN_NOTICE "SunLance: warning: overriding option "
  1209. "'tpe-link-test?'\n");
  1210. printk(KERN_NOTICE "SunLance: warning: mail any problems "
  1211. "to ecd@skynet.be\n");
  1212. auxio_set_lte(AUXIO_LTE_ON);
  1213. }
  1214. no_link_test:
  1215. lp->auto_select = 1;
  1216. lp->tpe = 0;
  1217. } else if (!strcmp(prop, "aui")) {
  1218. lp->auto_select = 0;
  1219. lp->tpe = 0;
  1220. } else {
  1221. lp->auto_select = 0;
  1222. lp->tpe = 1;
  1223. }
  1224. /* Reset ledma */
  1225. csr = sbus_readl(lp->dregs + DMA_CSR);
  1226. sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
  1227. udelay(200);
  1228. sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
  1229. } else
  1230. lp->dregs = NULL;
  1231. lp->dev = dev;
  1232. SET_NETDEV_DEV(dev, &op->dev);
  1233. dev->watchdog_timeo = 5*HZ;
  1234. dev->ethtool_ops = &sparc_lance_ethtool_ops;
  1235. dev->netdev_ops = &sparc_lance_ops;
  1236. dev->irq = op->archdata.irqs[0];
  1237. /* We cannot sleep if the chip is busy during a
  1238. * multicast list update event, because such events
  1239. * can occur from interrupts (ex. IPv6). So we
  1240. * use a timer to try again later when necessary. -DaveM
  1241. */
  1242. init_timer(&lp->multicast_timer);
  1243. lp->multicast_timer.data = (unsigned long) dev;
  1244. lp->multicast_timer.function = lance_set_multicast_retry;
  1245. if (register_netdev(dev)) {
  1246. printk(KERN_ERR "SunLance: Cannot register device.\n");
  1247. goto fail;
  1248. }
  1249. platform_set_drvdata(op, lp);
  1250. printk(KERN_INFO "%s: LANCE %pM\n",
  1251. dev->name, dev->dev_addr);
  1252. return 0;
  1253. fail:
  1254. lance_free_hwresources(lp);
  1255. free_netdev(dev);
  1256. return -ENODEV;
  1257. }
  1258. static int sunlance_sbus_probe(struct platform_device *op)
  1259. {
  1260. struct platform_device *parent = to_platform_device(op->dev.parent);
  1261. struct device_node *parent_dp = parent->dev.of_node;
  1262. int err;
  1263. if (!strcmp(parent_dp->name, "ledma")) {
  1264. err = sparc_lance_probe_one(op, parent, NULL);
  1265. } else if (!strcmp(parent_dp->name, "lebuffer")) {
  1266. err = sparc_lance_probe_one(op, NULL, parent);
  1267. } else
  1268. err = sparc_lance_probe_one(op, NULL, NULL);
  1269. return err;
  1270. }
  1271. static int sunlance_sbus_remove(struct platform_device *op)
  1272. {
  1273. struct lance_private *lp = platform_get_drvdata(op);
  1274. struct net_device *net_dev = lp->dev;
  1275. unregister_netdev(net_dev);
  1276. lance_free_hwresources(lp);
  1277. free_netdev(net_dev);
  1278. return 0;
  1279. }
  1280. static const struct of_device_id sunlance_sbus_match[] = {
  1281. {
  1282. .name = "le",
  1283. },
  1284. {},
  1285. };
  1286. MODULE_DEVICE_TABLE(of, sunlance_sbus_match);
  1287. static struct platform_driver sunlance_sbus_driver = {
  1288. .driver = {
  1289. .name = "sunlance",
  1290. .of_match_table = sunlance_sbus_match,
  1291. },
  1292. .probe = sunlance_sbus_probe,
  1293. .remove = sunlance_sbus_remove,
  1294. };
  1295. module_platform_driver(sunlance_sbus_driver);