greth.c 39 KB

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  1. /*
  2. * Aeroflex Gaisler GRETH 10/100/1G Ethernet MAC.
  3. *
  4. * 2005-2010 (c) Aeroflex Gaisler AB
  5. *
  6. * This driver supports GRETH 10/100 and GRETH 10/100/1G Ethernet MACs
  7. * available in the GRLIB VHDL IP core library.
  8. *
  9. * Full documentation of both cores can be found here:
  10. * http://www.gaisler.com/products/grlib/grip.pdf
  11. *
  12. * The Gigabit version supports scatter/gather DMA, any alignment of
  13. * buffers and checksum offloading.
  14. *
  15. * This program is free software; you can redistribute it and/or modify it
  16. * under the terms of the GNU General Public License as published by the
  17. * Free Software Foundation; either version 2 of the License, or (at your
  18. * option) any later version.
  19. *
  20. * Contributors: Kristoffer Glembo
  21. * Daniel Hellstrom
  22. * Marko Isomaki
  23. */
  24. #include <linux/dma-mapping.h>
  25. #include <linux/module.h>
  26. #include <linux/uaccess.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/netdevice.h>
  29. #include <linux/etherdevice.h>
  30. #include <linux/ethtool.h>
  31. #include <linux/skbuff.h>
  32. #include <linux/io.h>
  33. #include <linux/crc32.h>
  34. #include <linux/mii.h>
  35. #include <linux/of_device.h>
  36. #include <linux/of_platform.h>
  37. #include <linux/slab.h>
  38. #include <asm/cacheflush.h>
  39. #include <asm/byteorder.h>
  40. #ifdef CONFIG_SPARC
  41. #include <asm/idprom.h>
  42. #endif
  43. #include "greth.h"
  44. #define GRETH_DEF_MSG_ENABLE \
  45. (NETIF_MSG_DRV | \
  46. NETIF_MSG_PROBE | \
  47. NETIF_MSG_LINK | \
  48. NETIF_MSG_IFDOWN | \
  49. NETIF_MSG_IFUP | \
  50. NETIF_MSG_RX_ERR | \
  51. NETIF_MSG_TX_ERR)
  52. static int greth_debug = -1; /* -1 == use GRETH_DEF_MSG_ENABLE as value */
  53. module_param(greth_debug, int, 0);
  54. MODULE_PARM_DESC(greth_debug, "GRETH bitmapped debugging message enable value");
  55. /* Accept MAC address of the form macaddr=0x08,0x00,0x20,0x30,0x40,0x50 */
  56. static int macaddr[6];
  57. module_param_array(macaddr, int, NULL, 0);
  58. MODULE_PARM_DESC(macaddr, "GRETH Ethernet MAC address");
  59. static int greth_edcl = 1;
  60. module_param(greth_edcl, int, 0);
  61. MODULE_PARM_DESC(greth_edcl, "GRETH EDCL usage indicator. Set to 1 if EDCL is used.");
  62. static int greth_open(struct net_device *dev);
  63. static netdev_tx_t greth_start_xmit(struct sk_buff *skb,
  64. struct net_device *dev);
  65. static netdev_tx_t greth_start_xmit_gbit(struct sk_buff *skb,
  66. struct net_device *dev);
  67. static int greth_rx(struct net_device *dev, int limit);
  68. static int greth_rx_gbit(struct net_device *dev, int limit);
  69. static void greth_clean_tx(struct net_device *dev);
  70. static void greth_clean_tx_gbit(struct net_device *dev);
  71. static irqreturn_t greth_interrupt(int irq, void *dev_id);
  72. static int greth_close(struct net_device *dev);
  73. static int greth_set_mac_add(struct net_device *dev, void *p);
  74. static void greth_set_multicast_list(struct net_device *dev);
  75. #define GRETH_REGLOAD(a) (be32_to_cpu(__raw_readl(&(a))))
  76. #define GRETH_REGSAVE(a, v) (__raw_writel(cpu_to_be32(v), &(a)))
  77. #define GRETH_REGORIN(a, v) (GRETH_REGSAVE(a, (GRETH_REGLOAD(a) | (v))))
  78. #define GRETH_REGANDIN(a, v) (GRETH_REGSAVE(a, (GRETH_REGLOAD(a) & (v))))
  79. #define NEXT_TX(N) (((N) + 1) & GRETH_TXBD_NUM_MASK)
  80. #define SKIP_TX(N, C) (((N) + C) & GRETH_TXBD_NUM_MASK)
  81. #define NEXT_RX(N) (((N) + 1) & GRETH_RXBD_NUM_MASK)
  82. static void greth_print_rx_packet(void *addr, int len)
  83. {
  84. print_hex_dump(KERN_DEBUG, "RX: ", DUMP_PREFIX_OFFSET, 16, 1,
  85. addr, len, true);
  86. }
  87. static void greth_print_tx_packet(struct sk_buff *skb)
  88. {
  89. int i;
  90. int length;
  91. if (skb_shinfo(skb)->nr_frags == 0)
  92. length = skb->len;
  93. else
  94. length = skb_headlen(skb);
  95. print_hex_dump(KERN_DEBUG, "TX: ", DUMP_PREFIX_OFFSET, 16, 1,
  96. skb->data, length, true);
  97. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
  98. print_hex_dump(KERN_DEBUG, "TX: ", DUMP_PREFIX_OFFSET, 16, 1,
  99. skb_frag_address(&skb_shinfo(skb)->frags[i]),
  100. skb_shinfo(skb)->frags[i].size, true);
  101. }
  102. }
  103. static inline void greth_enable_tx(struct greth_private *greth)
  104. {
  105. wmb();
  106. GRETH_REGORIN(greth->regs->control, GRETH_TXEN);
  107. }
  108. static inline void greth_enable_tx_and_irq(struct greth_private *greth)
  109. {
  110. wmb(); /* BDs must been written to memory before enabling TX */
  111. GRETH_REGORIN(greth->regs->control, GRETH_TXEN | GRETH_TXI);
  112. }
  113. static inline void greth_disable_tx(struct greth_private *greth)
  114. {
  115. GRETH_REGANDIN(greth->regs->control, ~GRETH_TXEN);
  116. }
  117. static inline void greth_enable_rx(struct greth_private *greth)
  118. {
  119. wmb();
  120. GRETH_REGORIN(greth->regs->control, GRETH_RXEN);
  121. }
  122. static inline void greth_disable_rx(struct greth_private *greth)
  123. {
  124. GRETH_REGANDIN(greth->regs->control, ~GRETH_RXEN);
  125. }
  126. static inline void greth_enable_irqs(struct greth_private *greth)
  127. {
  128. GRETH_REGORIN(greth->regs->control, GRETH_RXI | GRETH_TXI);
  129. }
  130. static inline void greth_disable_irqs(struct greth_private *greth)
  131. {
  132. GRETH_REGANDIN(greth->regs->control, ~(GRETH_RXI|GRETH_TXI));
  133. }
  134. static inline void greth_write_bd(u32 *bd, u32 val)
  135. {
  136. __raw_writel(cpu_to_be32(val), bd);
  137. }
  138. static inline u32 greth_read_bd(u32 *bd)
  139. {
  140. return be32_to_cpu(__raw_readl(bd));
  141. }
  142. static void greth_clean_rings(struct greth_private *greth)
  143. {
  144. int i;
  145. struct greth_bd *rx_bdp = greth->rx_bd_base;
  146. struct greth_bd *tx_bdp = greth->tx_bd_base;
  147. if (greth->gbit_mac) {
  148. /* Free and unmap RX buffers */
  149. for (i = 0; i < GRETH_RXBD_NUM; i++, rx_bdp++) {
  150. if (greth->rx_skbuff[i] != NULL) {
  151. dev_kfree_skb(greth->rx_skbuff[i]);
  152. dma_unmap_single(greth->dev,
  153. greth_read_bd(&rx_bdp->addr),
  154. MAX_FRAME_SIZE+NET_IP_ALIGN,
  155. DMA_FROM_DEVICE);
  156. }
  157. }
  158. /* TX buffers */
  159. while (greth->tx_free < GRETH_TXBD_NUM) {
  160. struct sk_buff *skb = greth->tx_skbuff[greth->tx_last];
  161. int nr_frags = skb_shinfo(skb)->nr_frags;
  162. tx_bdp = greth->tx_bd_base + greth->tx_last;
  163. greth->tx_last = NEXT_TX(greth->tx_last);
  164. dma_unmap_single(greth->dev,
  165. greth_read_bd(&tx_bdp->addr),
  166. skb_headlen(skb),
  167. DMA_TO_DEVICE);
  168. for (i = 0; i < nr_frags; i++) {
  169. skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
  170. tx_bdp = greth->tx_bd_base + greth->tx_last;
  171. dma_unmap_page(greth->dev,
  172. greth_read_bd(&tx_bdp->addr),
  173. skb_frag_size(frag),
  174. DMA_TO_DEVICE);
  175. greth->tx_last = NEXT_TX(greth->tx_last);
  176. }
  177. greth->tx_free += nr_frags+1;
  178. dev_kfree_skb(skb);
  179. }
  180. } else { /* 10/100 Mbps MAC */
  181. for (i = 0; i < GRETH_RXBD_NUM; i++, rx_bdp++) {
  182. kfree(greth->rx_bufs[i]);
  183. dma_unmap_single(greth->dev,
  184. greth_read_bd(&rx_bdp->addr),
  185. MAX_FRAME_SIZE,
  186. DMA_FROM_DEVICE);
  187. }
  188. for (i = 0; i < GRETH_TXBD_NUM; i++, tx_bdp++) {
  189. kfree(greth->tx_bufs[i]);
  190. dma_unmap_single(greth->dev,
  191. greth_read_bd(&tx_bdp->addr),
  192. MAX_FRAME_SIZE,
  193. DMA_TO_DEVICE);
  194. }
  195. }
  196. }
  197. static int greth_init_rings(struct greth_private *greth)
  198. {
  199. struct sk_buff *skb;
  200. struct greth_bd *rx_bd, *tx_bd;
  201. u32 dma_addr;
  202. int i;
  203. rx_bd = greth->rx_bd_base;
  204. tx_bd = greth->tx_bd_base;
  205. /* Initialize descriptor rings and buffers */
  206. if (greth->gbit_mac) {
  207. for (i = 0; i < GRETH_RXBD_NUM; i++) {
  208. skb = netdev_alloc_skb(greth->netdev, MAX_FRAME_SIZE+NET_IP_ALIGN);
  209. if (skb == NULL) {
  210. if (netif_msg_ifup(greth))
  211. dev_err(greth->dev, "Error allocating DMA ring.\n");
  212. goto cleanup;
  213. }
  214. skb_reserve(skb, NET_IP_ALIGN);
  215. dma_addr = dma_map_single(greth->dev,
  216. skb->data,
  217. MAX_FRAME_SIZE+NET_IP_ALIGN,
  218. DMA_FROM_DEVICE);
  219. if (dma_mapping_error(greth->dev, dma_addr)) {
  220. if (netif_msg_ifup(greth))
  221. dev_err(greth->dev, "Could not create initial DMA mapping\n");
  222. goto cleanup;
  223. }
  224. greth->rx_skbuff[i] = skb;
  225. greth_write_bd(&rx_bd[i].addr, dma_addr);
  226. greth_write_bd(&rx_bd[i].stat, GRETH_BD_EN | GRETH_BD_IE);
  227. }
  228. } else {
  229. /* 10/100 MAC uses a fixed set of buffers and copy to/from SKBs */
  230. for (i = 0; i < GRETH_RXBD_NUM; i++) {
  231. greth->rx_bufs[i] = kmalloc(MAX_FRAME_SIZE, GFP_KERNEL);
  232. if (greth->rx_bufs[i] == NULL) {
  233. if (netif_msg_ifup(greth))
  234. dev_err(greth->dev, "Error allocating DMA ring.\n");
  235. goto cleanup;
  236. }
  237. dma_addr = dma_map_single(greth->dev,
  238. greth->rx_bufs[i],
  239. MAX_FRAME_SIZE,
  240. DMA_FROM_DEVICE);
  241. if (dma_mapping_error(greth->dev, dma_addr)) {
  242. if (netif_msg_ifup(greth))
  243. dev_err(greth->dev, "Could not create initial DMA mapping\n");
  244. goto cleanup;
  245. }
  246. greth_write_bd(&rx_bd[i].addr, dma_addr);
  247. greth_write_bd(&rx_bd[i].stat, GRETH_BD_EN | GRETH_BD_IE);
  248. }
  249. for (i = 0; i < GRETH_TXBD_NUM; i++) {
  250. greth->tx_bufs[i] = kmalloc(MAX_FRAME_SIZE, GFP_KERNEL);
  251. if (greth->tx_bufs[i] == NULL) {
  252. if (netif_msg_ifup(greth))
  253. dev_err(greth->dev, "Error allocating DMA ring.\n");
  254. goto cleanup;
  255. }
  256. dma_addr = dma_map_single(greth->dev,
  257. greth->tx_bufs[i],
  258. MAX_FRAME_SIZE,
  259. DMA_TO_DEVICE);
  260. if (dma_mapping_error(greth->dev, dma_addr)) {
  261. if (netif_msg_ifup(greth))
  262. dev_err(greth->dev, "Could not create initial DMA mapping\n");
  263. goto cleanup;
  264. }
  265. greth_write_bd(&tx_bd[i].addr, dma_addr);
  266. greth_write_bd(&tx_bd[i].stat, 0);
  267. }
  268. }
  269. greth_write_bd(&rx_bd[GRETH_RXBD_NUM - 1].stat,
  270. greth_read_bd(&rx_bd[GRETH_RXBD_NUM - 1].stat) | GRETH_BD_WR);
  271. /* Initialize pointers. */
  272. greth->rx_cur = 0;
  273. greth->tx_next = 0;
  274. greth->tx_last = 0;
  275. greth->tx_free = GRETH_TXBD_NUM;
  276. /* Initialize descriptor base address */
  277. GRETH_REGSAVE(greth->regs->tx_desc_p, greth->tx_bd_base_phys);
  278. GRETH_REGSAVE(greth->regs->rx_desc_p, greth->rx_bd_base_phys);
  279. return 0;
  280. cleanup:
  281. greth_clean_rings(greth);
  282. return -ENOMEM;
  283. }
  284. static int greth_open(struct net_device *dev)
  285. {
  286. struct greth_private *greth = netdev_priv(dev);
  287. int err;
  288. err = greth_init_rings(greth);
  289. if (err) {
  290. if (netif_msg_ifup(greth))
  291. dev_err(&dev->dev, "Could not allocate memory for DMA rings\n");
  292. return err;
  293. }
  294. err = request_irq(greth->irq, greth_interrupt, 0, "eth", (void *) dev);
  295. if (err) {
  296. if (netif_msg_ifup(greth))
  297. dev_err(&dev->dev, "Could not allocate interrupt %d\n", dev->irq);
  298. greth_clean_rings(greth);
  299. return err;
  300. }
  301. if (netif_msg_ifup(greth))
  302. dev_dbg(&dev->dev, " starting queue\n");
  303. netif_start_queue(dev);
  304. GRETH_REGSAVE(greth->regs->status, 0xFF);
  305. napi_enable(&greth->napi);
  306. greth_enable_irqs(greth);
  307. greth_enable_tx(greth);
  308. greth_enable_rx(greth);
  309. return 0;
  310. }
  311. static int greth_close(struct net_device *dev)
  312. {
  313. struct greth_private *greth = netdev_priv(dev);
  314. napi_disable(&greth->napi);
  315. greth_disable_irqs(greth);
  316. greth_disable_tx(greth);
  317. greth_disable_rx(greth);
  318. netif_stop_queue(dev);
  319. free_irq(greth->irq, (void *) dev);
  320. greth_clean_rings(greth);
  321. return 0;
  322. }
  323. static netdev_tx_t
  324. greth_start_xmit(struct sk_buff *skb, struct net_device *dev)
  325. {
  326. struct greth_private *greth = netdev_priv(dev);
  327. struct greth_bd *bdp;
  328. int err = NETDEV_TX_OK;
  329. u32 status, dma_addr, ctrl;
  330. unsigned long flags;
  331. /* Clean TX Ring */
  332. greth_clean_tx(greth->netdev);
  333. if (unlikely(greth->tx_free <= 0)) {
  334. spin_lock_irqsave(&greth->devlock, flags);/*save from poll/irq*/
  335. ctrl = GRETH_REGLOAD(greth->regs->control);
  336. /* Enable TX IRQ only if not already in poll() routine */
  337. if (ctrl & GRETH_RXI)
  338. GRETH_REGSAVE(greth->regs->control, ctrl | GRETH_TXI);
  339. netif_stop_queue(dev);
  340. spin_unlock_irqrestore(&greth->devlock, flags);
  341. return NETDEV_TX_BUSY;
  342. }
  343. if (netif_msg_pktdata(greth))
  344. greth_print_tx_packet(skb);
  345. if (unlikely(skb->len > MAX_FRAME_SIZE)) {
  346. dev->stats.tx_errors++;
  347. goto out;
  348. }
  349. bdp = greth->tx_bd_base + greth->tx_next;
  350. dma_addr = greth_read_bd(&bdp->addr);
  351. memcpy((unsigned char *) phys_to_virt(dma_addr), skb->data, skb->len);
  352. dma_sync_single_for_device(greth->dev, dma_addr, skb->len, DMA_TO_DEVICE);
  353. status = GRETH_BD_EN | GRETH_BD_IE | (skb->len & GRETH_BD_LEN);
  354. greth->tx_bufs_length[greth->tx_next] = skb->len & GRETH_BD_LEN;
  355. /* Wrap around descriptor ring */
  356. if (greth->tx_next == GRETH_TXBD_NUM_MASK) {
  357. status |= GRETH_BD_WR;
  358. }
  359. greth->tx_next = NEXT_TX(greth->tx_next);
  360. greth->tx_free--;
  361. /* Write descriptor control word and enable transmission */
  362. greth_write_bd(&bdp->stat, status);
  363. spin_lock_irqsave(&greth->devlock, flags); /*save from poll/irq*/
  364. greth_enable_tx(greth);
  365. spin_unlock_irqrestore(&greth->devlock, flags);
  366. out:
  367. dev_kfree_skb(skb);
  368. return err;
  369. }
  370. static inline u16 greth_num_free_bds(u16 tx_last, u16 tx_next)
  371. {
  372. if (tx_next < tx_last)
  373. return (tx_last - tx_next) - 1;
  374. else
  375. return GRETH_TXBD_NUM - (tx_next - tx_last) - 1;
  376. }
  377. static netdev_tx_t
  378. greth_start_xmit_gbit(struct sk_buff *skb, struct net_device *dev)
  379. {
  380. struct greth_private *greth = netdev_priv(dev);
  381. struct greth_bd *bdp;
  382. u32 status, dma_addr;
  383. int curr_tx, nr_frags, i, err = NETDEV_TX_OK;
  384. unsigned long flags;
  385. u16 tx_last;
  386. nr_frags = skb_shinfo(skb)->nr_frags;
  387. tx_last = greth->tx_last;
  388. rmb(); /* tx_last is updated by the poll task */
  389. if (greth_num_free_bds(tx_last, greth->tx_next) < nr_frags + 1) {
  390. netif_stop_queue(dev);
  391. err = NETDEV_TX_BUSY;
  392. goto out;
  393. }
  394. if (netif_msg_pktdata(greth))
  395. greth_print_tx_packet(skb);
  396. if (unlikely(skb->len > MAX_FRAME_SIZE)) {
  397. dev->stats.tx_errors++;
  398. goto out;
  399. }
  400. /* Save skb pointer. */
  401. greth->tx_skbuff[greth->tx_next] = skb;
  402. /* Linear buf */
  403. if (nr_frags != 0)
  404. status = GRETH_TXBD_MORE;
  405. else
  406. status = GRETH_BD_IE;
  407. if (skb->ip_summed == CHECKSUM_PARTIAL)
  408. status |= GRETH_TXBD_CSALL;
  409. status |= skb_headlen(skb) & GRETH_BD_LEN;
  410. if (greth->tx_next == GRETH_TXBD_NUM_MASK)
  411. status |= GRETH_BD_WR;
  412. bdp = greth->tx_bd_base + greth->tx_next;
  413. greth_write_bd(&bdp->stat, status);
  414. dma_addr = dma_map_single(greth->dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE);
  415. if (unlikely(dma_mapping_error(greth->dev, dma_addr)))
  416. goto map_error;
  417. greth_write_bd(&bdp->addr, dma_addr);
  418. curr_tx = NEXT_TX(greth->tx_next);
  419. /* Frags */
  420. for (i = 0; i < nr_frags; i++) {
  421. skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
  422. greth->tx_skbuff[curr_tx] = NULL;
  423. bdp = greth->tx_bd_base + curr_tx;
  424. status = GRETH_BD_EN;
  425. if (skb->ip_summed == CHECKSUM_PARTIAL)
  426. status |= GRETH_TXBD_CSALL;
  427. status |= skb_frag_size(frag) & GRETH_BD_LEN;
  428. /* Wrap around descriptor ring */
  429. if (curr_tx == GRETH_TXBD_NUM_MASK)
  430. status |= GRETH_BD_WR;
  431. /* More fragments left */
  432. if (i < nr_frags - 1)
  433. status |= GRETH_TXBD_MORE;
  434. else
  435. status |= GRETH_BD_IE; /* enable IRQ on last fragment */
  436. greth_write_bd(&bdp->stat, status);
  437. dma_addr = skb_frag_dma_map(greth->dev, frag, 0, skb_frag_size(frag),
  438. DMA_TO_DEVICE);
  439. if (unlikely(dma_mapping_error(greth->dev, dma_addr)))
  440. goto frag_map_error;
  441. greth_write_bd(&bdp->addr, dma_addr);
  442. curr_tx = NEXT_TX(curr_tx);
  443. }
  444. wmb();
  445. /* Enable the descriptor chain by enabling the first descriptor */
  446. bdp = greth->tx_bd_base + greth->tx_next;
  447. greth_write_bd(&bdp->stat,
  448. greth_read_bd(&bdp->stat) | GRETH_BD_EN);
  449. spin_lock_irqsave(&greth->devlock, flags); /*save from poll/irq*/
  450. greth->tx_next = curr_tx;
  451. greth_enable_tx_and_irq(greth);
  452. spin_unlock_irqrestore(&greth->devlock, flags);
  453. return NETDEV_TX_OK;
  454. frag_map_error:
  455. /* Unmap SKB mappings that succeeded and disable descriptor */
  456. for (i = 0; greth->tx_next + i != curr_tx; i++) {
  457. bdp = greth->tx_bd_base + greth->tx_next + i;
  458. dma_unmap_single(greth->dev,
  459. greth_read_bd(&bdp->addr),
  460. greth_read_bd(&bdp->stat) & GRETH_BD_LEN,
  461. DMA_TO_DEVICE);
  462. greth_write_bd(&bdp->stat, 0);
  463. }
  464. map_error:
  465. if (net_ratelimit())
  466. dev_warn(greth->dev, "Could not create TX DMA mapping\n");
  467. dev_kfree_skb(skb);
  468. out:
  469. return err;
  470. }
  471. static irqreturn_t greth_interrupt(int irq, void *dev_id)
  472. {
  473. struct net_device *dev = dev_id;
  474. struct greth_private *greth;
  475. u32 status, ctrl;
  476. irqreturn_t retval = IRQ_NONE;
  477. greth = netdev_priv(dev);
  478. spin_lock(&greth->devlock);
  479. /* Get the interrupt events that caused us to be here. */
  480. status = GRETH_REGLOAD(greth->regs->status);
  481. /* Must see if interrupts are enabled also, INT_TX|INT_RX flags may be
  482. * set regardless of whether IRQ is enabled or not. Especially
  483. * important when shared IRQ.
  484. */
  485. ctrl = GRETH_REGLOAD(greth->regs->control);
  486. /* Handle rx and tx interrupts through poll */
  487. if (((status & (GRETH_INT_RE | GRETH_INT_RX)) && (ctrl & GRETH_RXI)) ||
  488. ((status & (GRETH_INT_TE | GRETH_INT_TX)) && (ctrl & GRETH_TXI))) {
  489. retval = IRQ_HANDLED;
  490. /* Disable interrupts and schedule poll() */
  491. greth_disable_irqs(greth);
  492. napi_schedule(&greth->napi);
  493. }
  494. mmiowb();
  495. spin_unlock(&greth->devlock);
  496. return retval;
  497. }
  498. static void greth_clean_tx(struct net_device *dev)
  499. {
  500. struct greth_private *greth;
  501. struct greth_bd *bdp;
  502. u32 stat;
  503. greth = netdev_priv(dev);
  504. while (1) {
  505. bdp = greth->tx_bd_base + greth->tx_last;
  506. GRETH_REGSAVE(greth->regs->status, GRETH_INT_TE | GRETH_INT_TX);
  507. mb();
  508. stat = greth_read_bd(&bdp->stat);
  509. if (unlikely(stat & GRETH_BD_EN))
  510. break;
  511. if (greth->tx_free == GRETH_TXBD_NUM)
  512. break;
  513. /* Check status for errors */
  514. if (unlikely(stat & GRETH_TXBD_STATUS)) {
  515. dev->stats.tx_errors++;
  516. if (stat & GRETH_TXBD_ERR_AL)
  517. dev->stats.tx_aborted_errors++;
  518. if (stat & GRETH_TXBD_ERR_UE)
  519. dev->stats.tx_fifo_errors++;
  520. }
  521. dev->stats.tx_packets++;
  522. dev->stats.tx_bytes += greth->tx_bufs_length[greth->tx_last];
  523. greth->tx_last = NEXT_TX(greth->tx_last);
  524. greth->tx_free++;
  525. }
  526. if (greth->tx_free > 0) {
  527. netif_wake_queue(dev);
  528. }
  529. }
  530. static inline void greth_update_tx_stats(struct net_device *dev, u32 stat)
  531. {
  532. /* Check status for errors */
  533. if (unlikely(stat & GRETH_TXBD_STATUS)) {
  534. dev->stats.tx_errors++;
  535. if (stat & GRETH_TXBD_ERR_AL)
  536. dev->stats.tx_aborted_errors++;
  537. if (stat & GRETH_TXBD_ERR_UE)
  538. dev->stats.tx_fifo_errors++;
  539. if (stat & GRETH_TXBD_ERR_LC)
  540. dev->stats.tx_aborted_errors++;
  541. }
  542. dev->stats.tx_packets++;
  543. }
  544. static void greth_clean_tx_gbit(struct net_device *dev)
  545. {
  546. struct greth_private *greth;
  547. struct greth_bd *bdp, *bdp_last_frag;
  548. struct sk_buff *skb = NULL;
  549. u32 stat;
  550. int nr_frags, i;
  551. u16 tx_last;
  552. greth = netdev_priv(dev);
  553. tx_last = greth->tx_last;
  554. while (tx_last != greth->tx_next) {
  555. skb = greth->tx_skbuff[tx_last];
  556. nr_frags = skb_shinfo(skb)->nr_frags;
  557. /* We only clean fully completed SKBs */
  558. bdp_last_frag = greth->tx_bd_base + SKIP_TX(tx_last, nr_frags);
  559. GRETH_REGSAVE(greth->regs->status, GRETH_INT_TE | GRETH_INT_TX);
  560. mb();
  561. stat = greth_read_bd(&bdp_last_frag->stat);
  562. if (stat & GRETH_BD_EN)
  563. break;
  564. greth->tx_skbuff[tx_last] = NULL;
  565. greth_update_tx_stats(dev, stat);
  566. dev->stats.tx_bytes += skb->len;
  567. bdp = greth->tx_bd_base + tx_last;
  568. tx_last = NEXT_TX(tx_last);
  569. dma_unmap_single(greth->dev,
  570. greth_read_bd(&bdp->addr),
  571. skb_headlen(skb),
  572. DMA_TO_DEVICE);
  573. for (i = 0; i < nr_frags; i++) {
  574. skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
  575. bdp = greth->tx_bd_base + tx_last;
  576. dma_unmap_page(greth->dev,
  577. greth_read_bd(&bdp->addr),
  578. skb_frag_size(frag),
  579. DMA_TO_DEVICE);
  580. tx_last = NEXT_TX(tx_last);
  581. }
  582. dev_kfree_skb(skb);
  583. }
  584. if (skb) { /* skb is set only if the above while loop was entered */
  585. wmb();
  586. greth->tx_last = tx_last;
  587. if (netif_queue_stopped(dev) &&
  588. (greth_num_free_bds(tx_last, greth->tx_next) >
  589. (MAX_SKB_FRAGS+1)))
  590. netif_wake_queue(dev);
  591. }
  592. }
  593. static int greth_rx(struct net_device *dev, int limit)
  594. {
  595. struct greth_private *greth;
  596. struct greth_bd *bdp;
  597. struct sk_buff *skb;
  598. int pkt_len;
  599. int bad, count;
  600. u32 status, dma_addr;
  601. unsigned long flags;
  602. greth = netdev_priv(dev);
  603. for (count = 0; count < limit; ++count) {
  604. bdp = greth->rx_bd_base + greth->rx_cur;
  605. GRETH_REGSAVE(greth->regs->status, GRETH_INT_RE | GRETH_INT_RX);
  606. mb();
  607. status = greth_read_bd(&bdp->stat);
  608. if (unlikely(status & GRETH_BD_EN)) {
  609. break;
  610. }
  611. dma_addr = greth_read_bd(&bdp->addr);
  612. bad = 0;
  613. /* Check status for errors. */
  614. if (unlikely(status & GRETH_RXBD_STATUS)) {
  615. if (status & GRETH_RXBD_ERR_FT) {
  616. dev->stats.rx_length_errors++;
  617. bad = 1;
  618. }
  619. if (status & (GRETH_RXBD_ERR_AE | GRETH_RXBD_ERR_OE)) {
  620. dev->stats.rx_frame_errors++;
  621. bad = 1;
  622. }
  623. if (status & GRETH_RXBD_ERR_CRC) {
  624. dev->stats.rx_crc_errors++;
  625. bad = 1;
  626. }
  627. }
  628. if (unlikely(bad)) {
  629. dev->stats.rx_errors++;
  630. } else {
  631. pkt_len = status & GRETH_BD_LEN;
  632. skb = netdev_alloc_skb(dev, pkt_len + NET_IP_ALIGN);
  633. if (unlikely(skb == NULL)) {
  634. if (net_ratelimit())
  635. dev_warn(&dev->dev, "low on memory - " "packet dropped\n");
  636. dev->stats.rx_dropped++;
  637. } else {
  638. skb_reserve(skb, NET_IP_ALIGN);
  639. dma_sync_single_for_cpu(greth->dev,
  640. dma_addr,
  641. pkt_len,
  642. DMA_FROM_DEVICE);
  643. if (netif_msg_pktdata(greth))
  644. greth_print_rx_packet(phys_to_virt(dma_addr), pkt_len);
  645. memcpy(skb_put(skb, pkt_len), phys_to_virt(dma_addr), pkt_len);
  646. skb->protocol = eth_type_trans(skb, dev);
  647. dev->stats.rx_bytes += pkt_len;
  648. dev->stats.rx_packets++;
  649. netif_receive_skb(skb);
  650. }
  651. }
  652. status = GRETH_BD_EN | GRETH_BD_IE;
  653. if (greth->rx_cur == GRETH_RXBD_NUM_MASK) {
  654. status |= GRETH_BD_WR;
  655. }
  656. wmb();
  657. greth_write_bd(&bdp->stat, status);
  658. dma_sync_single_for_device(greth->dev, dma_addr, MAX_FRAME_SIZE, DMA_FROM_DEVICE);
  659. spin_lock_irqsave(&greth->devlock, flags); /* save from XMIT */
  660. greth_enable_rx(greth);
  661. spin_unlock_irqrestore(&greth->devlock, flags);
  662. greth->rx_cur = NEXT_RX(greth->rx_cur);
  663. }
  664. return count;
  665. }
  666. static inline int hw_checksummed(u32 status)
  667. {
  668. if (status & GRETH_RXBD_IP_FRAG)
  669. return 0;
  670. if (status & GRETH_RXBD_IP && status & GRETH_RXBD_IP_CSERR)
  671. return 0;
  672. if (status & GRETH_RXBD_UDP && status & GRETH_RXBD_UDP_CSERR)
  673. return 0;
  674. if (status & GRETH_RXBD_TCP && status & GRETH_RXBD_TCP_CSERR)
  675. return 0;
  676. return 1;
  677. }
  678. static int greth_rx_gbit(struct net_device *dev, int limit)
  679. {
  680. struct greth_private *greth;
  681. struct greth_bd *bdp;
  682. struct sk_buff *skb, *newskb;
  683. int pkt_len;
  684. int bad, count = 0;
  685. u32 status, dma_addr;
  686. unsigned long flags;
  687. greth = netdev_priv(dev);
  688. for (count = 0; count < limit; ++count) {
  689. bdp = greth->rx_bd_base + greth->rx_cur;
  690. skb = greth->rx_skbuff[greth->rx_cur];
  691. GRETH_REGSAVE(greth->regs->status, GRETH_INT_RE | GRETH_INT_RX);
  692. mb();
  693. status = greth_read_bd(&bdp->stat);
  694. bad = 0;
  695. if (status & GRETH_BD_EN)
  696. break;
  697. /* Check status for errors. */
  698. if (unlikely(status & GRETH_RXBD_STATUS)) {
  699. if (status & GRETH_RXBD_ERR_FT) {
  700. dev->stats.rx_length_errors++;
  701. bad = 1;
  702. } else if (status &
  703. (GRETH_RXBD_ERR_AE | GRETH_RXBD_ERR_OE | GRETH_RXBD_ERR_LE)) {
  704. dev->stats.rx_frame_errors++;
  705. bad = 1;
  706. } else if (status & GRETH_RXBD_ERR_CRC) {
  707. dev->stats.rx_crc_errors++;
  708. bad = 1;
  709. }
  710. }
  711. /* Allocate new skb to replace current, not needed if the
  712. * current skb can be reused */
  713. if (!bad && (newskb=netdev_alloc_skb(dev, MAX_FRAME_SIZE + NET_IP_ALIGN))) {
  714. skb_reserve(newskb, NET_IP_ALIGN);
  715. dma_addr = dma_map_single(greth->dev,
  716. newskb->data,
  717. MAX_FRAME_SIZE + NET_IP_ALIGN,
  718. DMA_FROM_DEVICE);
  719. if (!dma_mapping_error(greth->dev, dma_addr)) {
  720. /* Process the incoming frame. */
  721. pkt_len = status & GRETH_BD_LEN;
  722. dma_unmap_single(greth->dev,
  723. greth_read_bd(&bdp->addr),
  724. MAX_FRAME_SIZE + NET_IP_ALIGN,
  725. DMA_FROM_DEVICE);
  726. if (netif_msg_pktdata(greth))
  727. greth_print_rx_packet(phys_to_virt(greth_read_bd(&bdp->addr)), pkt_len);
  728. skb_put(skb, pkt_len);
  729. if (dev->features & NETIF_F_RXCSUM && hw_checksummed(status))
  730. skb->ip_summed = CHECKSUM_UNNECESSARY;
  731. else
  732. skb_checksum_none_assert(skb);
  733. skb->protocol = eth_type_trans(skb, dev);
  734. dev->stats.rx_packets++;
  735. dev->stats.rx_bytes += pkt_len;
  736. netif_receive_skb(skb);
  737. greth->rx_skbuff[greth->rx_cur] = newskb;
  738. greth_write_bd(&bdp->addr, dma_addr);
  739. } else {
  740. if (net_ratelimit())
  741. dev_warn(greth->dev, "Could not create DMA mapping, dropping packet\n");
  742. dev_kfree_skb(newskb);
  743. /* reusing current skb, so it is a drop */
  744. dev->stats.rx_dropped++;
  745. }
  746. } else if (bad) {
  747. /* Bad Frame transfer, the skb is reused */
  748. dev->stats.rx_dropped++;
  749. } else {
  750. /* Failed Allocating a new skb. This is rather stupid
  751. * but the current "filled" skb is reused, as if
  752. * transfer failure. One could argue that RX descriptor
  753. * table handling should be divided into cleaning and
  754. * filling as the TX part of the driver
  755. */
  756. if (net_ratelimit())
  757. dev_warn(greth->dev, "Could not allocate SKB, dropping packet\n");
  758. /* reusing current skb, so it is a drop */
  759. dev->stats.rx_dropped++;
  760. }
  761. status = GRETH_BD_EN | GRETH_BD_IE;
  762. if (greth->rx_cur == GRETH_RXBD_NUM_MASK) {
  763. status |= GRETH_BD_WR;
  764. }
  765. wmb();
  766. greth_write_bd(&bdp->stat, status);
  767. spin_lock_irqsave(&greth->devlock, flags);
  768. greth_enable_rx(greth);
  769. spin_unlock_irqrestore(&greth->devlock, flags);
  770. greth->rx_cur = NEXT_RX(greth->rx_cur);
  771. }
  772. return count;
  773. }
  774. static int greth_poll(struct napi_struct *napi, int budget)
  775. {
  776. struct greth_private *greth;
  777. int work_done = 0;
  778. unsigned long flags;
  779. u32 mask, ctrl;
  780. greth = container_of(napi, struct greth_private, napi);
  781. restart_txrx_poll:
  782. if (greth->gbit_mac) {
  783. greth_clean_tx_gbit(greth->netdev);
  784. work_done += greth_rx_gbit(greth->netdev, budget - work_done);
  785. } else {
  786. if (netif_queue_stopped(greth->netdev))
  787. greth_clean_tx(greth->netdev);
  788. work_done += greth_rx(greth->netdev, budget - work_done);
  789. }
  790. if (work_done < budget) {
  791. spin_lock_irqsave(&greth->devlock, flags);
  792. ctrl = GRETH_REGLOAD(greth->regs->control);
  793. if ((greth->gbit_mac && (greth->tx_last != greth->tx_next)) ||
  794. (!greth->gbit_mac && netif_queue_stopped(greth->netdev))) {
  795. GRETH_REGSAVE(greth->regs->control,
  796. ctrl | GRETH_TXI | GRETH_RXI);
  797. mask = GRETH_INT_RX | GRETH_INT_RE |
  798. GRETH_INT_TX | GRETH_INT_TE;
  799. } else {
  800. GRETH_REGSAVE(greth->regs->control, ctrl | GRETH_RXI);
  801. mask = GRETH_INT_RX | GRETH_INT_RE;
  802. }
  803. if (GRETH_REGLOAD(greth->regs->status) & mask) {
  804. GRETH_REGSAVE(greth->regs->control, ctrl);
  805. spin_unlock_irqrestore(&greth->devlock, flags);
  806. goto restart_txrx_poll;
  807. } else {
  808. __napi_complete(napi);
  809. spin_unlock_irqrestore(&greth->devlock, flags);
  810. }
  811. }
  812. return work_done;
  813. }
  814. static int greth_set_mac_add(struct net_device *dev, void *p)
  815. {
  816. struct sockaddr *addr = p;
  817. struct greth_private *greth;
  818. struct greth_regs *regs;
  819. greth = netdev_priv(dev);
  820. regs = greth->regs;
  821. if (!is_valid_ether_addr(addr->sa_data))
  822. return -EADDRNOTAVAIL;
  823. memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
  824. GRETH_REGSAVE(regs->esa_msb, dev->dev_addr[0] << 8 | dev->dev_addr[1]);
  825. GRETH_REGSAVE(regs->esa_lsb, dev->dev_addr[2] << 24 | dev->dev_addr[3] << 16 |
  826. dev->dev_addr[4] << 8 | dev->dev_addr[5]);
  827. return 0;
  828. }
  829. static u32 greth_hash_get_index(__u8 *addr)
  830. {
  831. return (ether_crc(6, addr)) & 0x3F;
  832. }
  833. static void greth_set_hash_filter(struct net_device *dev)
  834. {
  835. struct netdev_hw_addr *ha;
  836. struct greth_private *greth = netdev_priv(dev);
  837. struct greth_regs *regs = greth->regs;
  838. u32 mc_filter[2];
  839. unsigned int bitnr;
  840. mc_filter[0] = mc_filter[1] = 0;
  841. netdev_for_each_mc_addr(ha, dev) {
  842. bitnr = greth_hash_get_index(ha->addr);
  843. mc_filter[bitnr >> 5] |= 1 << (bitnr & 31);
  844. }
  845. GRETH_REGSAVE(regs->hash_msb, mc_filter[1]);
  846. GRETH_REGSAVE(regs->hash_lsb, mc_filter[0]);
  847. }
  848. static void greth_set_multicast_list(struct net_device *dev)
  849. {
  850. int cfg;
  851. struct greth_private *greth = netdev_priv(dev);
  852. struct greth_regs *regs = greth->regs;
  853. cfg = GRETH_REGLOAD(regs->control);
  854. if (dev->flags & IFF_PROMISC)
  855. cfg |= GRETH_CTRL_PR;
  856. else
  857. cfg &= ~GRETH_CTRL_PR;
  858. if (greth->multicast) {
  859. if (dev->flags & IFF_ALLMULTI) {
  860. GRETH_REGSAVE(regs->hash_msb, -1);
  861. GRETH_REGSAVE(regs->hash_lsb, -1);
  862. cfg |= GRETH_CTRL_MCEN;
  863. GRETH_REGSAVE(regs->control, cfg);
  864. return;
  865. }
  866. if (netdev_mc_empty(dev)) {
  867. cfg &= ~GRETH_CTRL_MCEN;
  868. GRETH_REGSAVE(regs->control, cfg);
  869. return;
  870. }
  871. /* Setup multicast filter */
  872. greth_set_hash_filter(dev);
  873. cfg |= GRETH_CTRL_MCEN;
  874. }
  875. GRETH_REGSAVE(regs->control, cfg);
  876. }
  877. static u32 greth_get_msglevel(struct net_device *dev)
  878. {
  879. struct greth_private *greth = netdev_priv(dev);
  880. return greth->msg_enable;
  881. }
  882. static void greth_set_msglevel(struct net_device *dev, u32 value)
  883. {
  884. struct greth_private *greth = netdev_priv(dev);
  885. greth->msg_enable = value;
  886. }
  887. static int greth_get_regs_len(struct net_device *dev)
  888. {
  889. return sizeof(struct greth_regs);
  890. }
  891. static void greth_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  892. {
  893. struct greth_private *greth = netdev_priv(dev);
  894. strlcpy(info->driver, dev_driver_string(greth->dev),
  895. sizeof(info->driver));
  896. strlcpy(info->version, "revision: 1.0", sizeof(info->version));
  897. strlcpy(info->bus_info, greth->dev->bus->name, sizeof(info->bus_info));
  898. strlcpy(info->fw_version, "N/A", sizeof(info->fw_version));
  899. }
  900. static void greth_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *p)
  901. {
  902. int i;
  903. struct greth_private *greth = netdev_priv(dev);
  904. u32 __iomem *greth_regs = (u32 __iomem *) greth->regs;
  905. u32 *buff = p;
  906. for (i = 0; i < sizeof(struct greth_regs) / sizeof(u32); i++)
  907. buff[i] = greth_read_bd(&greth_regs[i]);
  908. }
  909. static const struct ethtool_ops greth_ethtool_ops = {
  910. .get_msglevel = greth_get_msglevel,
  911. .set_msglevel = greth_set_msglevel,
  912. .get_drvinfo = greth_get_drvinfo,
  913. .get_regs_len = greth_get_regs_len,
  914. .get_regs = greth_get_regs,
  915. .get_link = ethtool_op_get_link,
  916. .get_link_ksettings = phy_ethtool_get_link_ksettings,
  917. .set_link_ksettings = phy_ethtool_set_link_ksettings,
  918. };
  919. static struct net_device_ops greth_netdev_ops = {
  920. .ndo_open = greth_open,
  921. .ndo_stop = greth_close,
  922. .ndo_start_xmit = greth_start_xmit,
  923. .ndo_set_mac_address = greth_set_mac_add,
  924. .ndo_validate_addr = eth_validate_addr,
  925. };
  926. static inline int wait_for_mdio(struct greth_private *greth)
  927. {
  928. unsigned long timeout = jiffies + 4*HZ/100;
  929. while (GRETH_REGLOAD(greth->regs->mdio) & GRETH_MII_BUSY) {
  930. if (time_after(jiffies, timeout))
  931. return 0;
  932. }
  933. return 1;
  934. }
  935. static int greth_mdio_read(struct mii_bus *bus, int phy, int reg)
  936. {
  937. struct greth_private *greth = bus->priv;
  938. int data;
  939. if (!wait_for_mdio(greth))
  940. return -EBUSY;
  941. GRETH_REGSAVE(greth->regs->mdio, ((phy & 0x1F) << 11) | ((reg & 0x1F) << 6) | 2);
  942. if (!wait_for_mdio(greth))
  943. return -EBUSY;
  944. if (!(GRETH_REGLOAD(greth->regs->mdio) & GRETH_MII_NVALID)) {
  945. data = (GRETH_REGLOAD(greth->regs->mdio) >> 16) & 0xFFFF;
  946. return data;
  947. } else {
  948. return -1;
  949. }
  950. }
  951. static int greth_mdio_write(struct mii_bus *bus, int phy, int reg, u16 val)
  952. {
  953. struct greth_private *greth = bus->priv;
  954. if (!wait_for_mdio(greth))
  955. return -EBUSY;
  956. GRETH_REGSAVE(greth->regs->mdio,
  957. ((val & 0xFFFF) << 16) | ((phy & 0x1F) << 11) | ((reg & 0x1F) << 6) | 1);
  958. if (!wait_for_mdio(greth))
  959. return -EBUSY;
  960. return 0;
  961. }
  962. static void greth_link_change(struct net_device *dev)
  963. {
  964. struct greth_private *greth = netdev_priv(dev);
  965. struct phy_device *phydev = dev->phydev;
  966. unsigned long flags;
  967. int status_change = 0;
  968. u32 ctrl;
  969. spin_lock_irqsave(&greth->devlock, flags);
  970. if (phydev->link) {
  971. if ((greth->speed != phydev->speed) || (greth->duplex != phydev->duplex)) {
  972. ctrl = GRETH_REGLOAD(greth->regs->control) &
  973. ~(GRETH_CTRL_FD | GRETH_CTRL_SP | GRETH_CTRL_GB);
  974. if (phydev->duplex)
  975. ctrl |= GRETH_CTRL_FD;
  976. if (phydev->speed == SPEED_100)
  977. ctrl |= GRETH_CTRL_SP;
  978. else if (phydev->speed == SPEED_1000)
  979. ctrl |= GRETH_CTRL_GB;
  980. GRETH_REGSAVE(greth->regs->control, ctrl);
  981. greth->speed = phydev->speed;
  982. greth->duplex = phydev->duplex;
  983. status_change = 1;
  984. }
  985. }
  986. if (phydev->link != greth->link) {
  987. if (!phydev->link) {
  988. greth->speed = 0;
  989. greth->duplex = -1;
  990. }
  991. greth->link = phydev->link;
  992. status_change = 1;
  993. }
  994. spin_unlock_irqrestore(&greth->devlock, flags);
  995. if (status_change) {
  996. if (phydev->link)
  997. pr_debug("%s: link up (%d/%s)\n",
  998. dev->name, phydev->speed,
  999. DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
  1000. else
  1001. pr_debug("%s: link down\n", dev->name);
  1002. }
  1003. }
  1004. static int greth_mdio_probe(struct net_device *dev)
  1005. {
  1006. struct greth_private *greth = netdev_priv(dev);
  1007. struct phy_device *phy = NULL;
  1008. int ret;
  1009. /* Find the first PHY */
  1010. phy = phy_find_first(greth->mdio);
  1011. if (!phy) {
  1012. if (netif_msg_probe(greth))
  1013. dev_err(&dev->dev, "no PHY found\n");
  1014. return -ENXIO;
  1015. }
  1016. ret = phy_connect_direct(dev, phy, &greth_link_change,
  1017. greth->gbit_mac ? PHY_INTERFACE_MODE_GMII : PHY_INTERFACE_MODE_MII);
  1018. if (ret) {
  1019. if (netif_msg_ifup(greth))
  1020. dev_err(&dev->dev, "could not attach to PHY\n");
  1021. return ret;
  1022. }
  1023. if (greth->gbit_mac)
  1024. phy->supported &= PHY_GBIT_FEATURES;
  1025. else
  1026. phy->supported &= PHY_BASIC_FEATURES;
  1027. phy->advertising = phy->supported;
  1028. greth->link = 0;
  1029. greth->speed = 0;
  1030. greth->duplex = -1;
  1031. return 0;
  1032. }
  1033. static inline int phy_aneg_done(struct phy_device *phydev)
  1034. {
  1035. int retval;
  1036. retval = phy_read(phydev, MII_BMSR);
  1037. return (retval < 0) ? retval : (retval & BMSR_ANEGCOMPLETE);
  1038. }
  1039. static int greth_mdio_init(struct greth_private *greth)
  1040. {
  1041. int ret;
  1042. unsigned long timeout;
  1043. struct net_device *ndev = greth->netdev;
  1044. greth->mdio = mdiobus_alloc();
  1045. if (!greth->mdio) {
  1046. return -ENOMEM;
  1047. }
  1048. greth->mdio->name = "greth-mdio";
  1049. snprintf(greth->mdio->id, MII_BUS_ID_SIZE, "%s-%d", greth->mdio->name, greth->irq);
  1050. greth->mdio->read = greth_mdio_read;
  1051. greth->mdio->write = greth_mdio_write;
  1052. greth->mdio->priv = greth;
  1053. ret = mdiobus_register(greth->mdio);
  1054. if (ret) {
  1055. goto error;
  1056. }
  1057. ret = greth_mdio_probe(greth->netdev);
  1058. if (ret) {
  1059. if (netif_msg_probe(greth))
  1060. dev_err(&greth->netdev->dev, "failed to probe MDIO bus\n");
  1061. goto unreg_mdio;
  1062. }
  1063. phy_start(ndev->phydev);
  1064. /* If Ethernet debug link is used make autoneg happen right away */
  1065. if (greth->edcl && greth_edcl == 1) {
  1066. phy_start_aneg(ndev->phydev);
  1067. timeout = jiffies + 6*HZ;
  1068. while (!phy_aneg_done(ndev->phydev) &&
  1069. time_before(jiffies, timeout)) {
  1070. }
  1071. phy_read_status(ndev->phydev);
  1072. greth_link_change(greth->netdev);
  1073. }
  1074. return 0;
  1075. unreg_mdio:
  1076. mdiobus_unregister(greth->mdio);
  1077. error:
  1078. mdiobus_free(greth->mdio);
  1079. return ret;
  1080. }
  1081. /* Initialize the GRETH MAC */
  1082. static int greth_of_probe(struct platform_device *ofdev)
  1083. {
  1084. struct net_device *dev;
  1085. struct greth_private *greth;
  1086. struct greth_regs *regs;
  1087. int i;
  1088. int err;
  1089. int tmp;
  1090. unsigned long timeout;
  1091. dev = alloc_etherdev(sizeof(struct greth_private));
  1092. if (dev == NULL)
  1093. return -ENOMEM;
  1094. greth = netdev_priv(dev);
  1095. greth->netdev = dev;
  1096. greth->dev = &ofdev->dev;
  1097. if (greth_debug > 0)
  1098. greth->msg_enable = greth_debug;
  1099. else
  1100. greth->msg_enable = GRETH_DEF_MSG_ENABLE;
  1101. spin_lock_init(&greth->devlock);
  1102. greth->regs = of_ioremap(&ofdev->resource[0], 0,
  1103. resource_size(&ofdev->resource[0]),
  1104. "grlib-greth regs");
  1105. if (greth->regs == NULL) {
  1106. if (netif_msg_probe(greth))
  1107. dev_err(greth->dev, "ioremap failure.\n");
  1108. err = -EIO;
  1109. goto error1;
  1110. }
  1111. regs = greth->regs;
  1112. greth->irq = ofdev->archdata.irqs[0];
  1113. dev_set_drvdata(greth->dev, dev);
  1114. SET_NETDEV_DEV(dev, greth->dev);
  1115. if (netif_msg_probe(greth))
  1116. dev_dbg(greth->dev, "resetting controller.\n");
  1117. /* Reset the controller. */
  1118. GRETH_REGSAVE(regs->control, GRETH_RESET);
  1119. /* Wait for MAC to reset itself */
  1120. timeout = jiffies + HZ/100;
  1121. while (GRETH_REGLOAD(regs->control) & GRETH_RESET) {
  1122. if (time_after(jiffies, timeout)) {
  1123. err = -EIO;
  1124. if (netif_msg_probe(greth))
  1125. dev_err(greth->dev, "timeout when waiting for reset.\n");
  1126. goto error2;
  1127. }
  1128. }
  1129. /* Get default PHY address */
  1130. greth->phyaddr = (GRETH_REGLOAD(regs->mdio) >> 11) & 0x1F;
  1131. /* Check if we have GBIT capable MAC */
  1132. tmp = GRETH_REGLOAD(regs->control);
  1133. greth->gbit_mac = (tmp >> 27) & 1;
  1134. /* Check for multicast capability */
  1135. greth->multicast = (tmp >> 25) & 1;
  1136. greth->edcl = (tmp >> 31) & 1;
  1137. /* If we have EDCL we disable the EDCL speed-duplex FSM so
  1138. * it doesn't interfere with the software */
  1139. if (greth->edcl != 0)
  1140. GRETH_REGORIN(regs->control, GRETH_CTRL_DISDUPLEX);
  1141. /* Check if MAC can handle MDIO interrupts */
  1142. greth->mdio_int_en = (tmp >> 26) & 1;
  1143. err = greth_mdio_init(greth);
  1144. if (err) {
  1145. if (netif_msg_probe(greth))
  1146. dev_err(greth->dev, "failed to register MDIO bus\n");
  1147. goto error2;
  1148. }
  1149. /* Allocate TX descriptor ring in coherent memory */
  1150. greth->tx_bd_base = dma_zalloc_coherent(greth->dev, 1024,
  1151. &greth->tx_bd_base_phys,
  1152. GFP_KERNEL);
  1153. if (!greth->tx_bd_base) {
  1154. err = -ENOMEM;
  1155. goto error3;
  1156. }
  1157. /* Allocate RX descriptor ring in coherent memory */
  1158. greth->rx_bd_base = dma_zalloc_coherent(greth->dev, 1024,
  1159. &greth->rx_bd_base_phys,
  1160. GFP_KERNEL);
  1161. if (!greth->rx_bd_base) {
  1162. err = -ENOMEM;
  1163. goto error4;
  1164. }
  1165. /* Get MAC address from: module param, OF property or ID prom */
  1166. for (i = 0; i < 6; i++) {
  1167. if (macaddr[i] != 0)
  1168. break;
  1169. }
  1170. if (i == 6) {
  1171. const unsigned char *addr;
  1172. int len;
  1173. addr = of_get_property(ofdev->dev.of_node, "local-mac-address",
  1174. &len);
  1175. if (addr != NULL && len == 6) {
  1176. for (i = 0; i < 6; i++)
  1177. macaddr[i] = (unsigned int) addr[i];
  1178. } else {
  1179. #ifdef CONFIG_SPARC
  1180. for (i = 0; i < 6; i++)
  1181. macaddr[i] = (unsigned int) idprom->id_ethaddr[i];
  1182. #endif
  1183. }
  1184. }
  1185. for (i = 0; i < 6; i++)
  1186. dev->dev_addr[i] = macaddr[i];
  1187. macaddr[5]++;
  1188. if (!is_valid_ether_addr(&dev->dev_addr[0])) {
  1189. if (netif_msg_probe(greth))
  1190. dev_err(greth->dev, "no valid ethernet address, aborting.\n");
  1191. err = -EINVAL;
  1192. goto error5;
  1193. }
  1194. GRETH_REGSAVE(regs->esa_msb, dev->dev_addr[0] << 8 | dev->dev_addr[1]);
  1195. GRETH_REGSAVE(regs->esa_lsb, dev->dev_addr[2] << 24 | dev->dev_addr[3] << 16 |
  1196. dev->dev_addr[4] << 8 | dev->dev_addr[5]);
  1197. /* Clear all pending interrupts except PHY irq */
  1198. GRETH_REGSAVE(regs->status, 0xFF);
  1199. if (greth->gbit_mac) {
  1200. dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM |
  1201. NETIF_F_RXCSUM;
  1202. dev->features = dev->hw_features | NETIF_F_HIGHDMA;
  1203. greth_netdev_ops.ndo_start_xmit = greth_start_xmit_gbit;
  1204. }
  1205. if (greth->multicast) {
  1206. greth_netdev_ops.ndo_set_rx_mode = greth_set_multicast_list;
  1207. dev->flags |= IFF_MULTICAST;
  1208. } else {
  1209. dev->flags &= ~IFF_MULTICAST;
  1210. }
  1211. dev->netdev_ops = &greth_netdev_ops;
  1212. dev->ethtool_ops = &greth_ethtool_ops;
  1213. err = register_netdev(dev);
  1214. if (err) {
  1215. if (netif_msg_probe(greth))
  1216. dev_err(greth->dev, "netdevice registration failed.\n");
  1217. goto error5;
  1218. }
  1219. /* setup NAPI */
  1220. netif_napi_add(dev, &greth->napi, greth_poll, 64);
  1221. return 0;
  1222. error5:
  1223. dma_free_coherent(greth->dev, 1024, greth->rx_bd_base, greth->rx_bd_base_phys);
  1224. error4:
  1225. dma_free_coherent(greth->dev, 1024, greth->tx_bd_base, greth->tx_bd_base_phys);
  1226. error3:
  1227. mdiobus_unregister(greth->mdio);
  1228. error2:
  1229. of_iounmap(&ofdev->resource[0], greth->regs, resource_size(&ofdev->resource[0]));
  1230. error1:
  1231. free_netdev(dev);
  1232. return err;
  1233. }
  1234. static int greth_of_remove(struct platform_device *of_dev)
  1235. {
  1236. struct net_device *ndev = platform_get_drvdata(of_dev);
  1237. struct greth_private *greth = netdev_priv(ndev);
  1238. /* Free descriptor areas */
  1239. dma_free_coherent(&of_dev->dev, 1024, greth->rx_bd_base, greth->rx_bd_base_phys);
  1240. dma_free_coherent(&of_dev->dev, 1024, greth->tx_bd_base, greth->tx_bd_base_phys);
  1241. if (ndev->phydev)
  1242. phy_stop(ndev->phydev);
  1243. mdiobus_unregister(greth->mdio);
  1244. unregister_netdev(ndev);
  1245. free_netdev(ndev);
  1246. of_iounmap(&of_dev->resource[0], greth->regs, resource_size(&of_dev->resource[0]));
  1247. return 0;
  1248. }
  1249. static const struct of_device_id greth_of_match[] = {
  1250. {
  1251. .name = "GAISLER_ETHMAC",
  1252. },
  1253. {
  1254. .name = "01_01d",
  1255. },
  1256. {},
  1257. };
  1258. MODULE_DEVICE_TABLE(of, greth_of_match);
  1259. static struct platform_driver greth_of_driver = {
  1260. .driver = {
  1261. .name = "grlib-greth",
  1262. .of_match_table = greth_of_match,
  1263. },
  1264. .probe = greth_of_probe,
  1265. .remove = greth_of_remove,
  1266. };
  1267. module_platform_driver(greth_of_driver);
  1268. MODULE_AUTHOR("Aeroflex Gaisler AB.");
  1269. MODULE_DESCRIPTION("Aeroflex Gaisler Ethernet MAC driver");
  1270. MODULE_LICENSE("GPL");