#734 Montevina thinkpads: Immediate resume failure in coreboot code

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opened 1 week ago by swiftgeek · 0 comments

Following would set SLP_S4# Stretching Policy just like on vendor fw (0b11 and enabled), but it's unclear whether it actually fixes anything. Possibly has something to do with PMH7 clocks, one of them being SUSCLK_32K

setpci -s 00:1f.0 A4.W # GEN_PMCON_3
0x30
or 0x30 0x08 # toggle enable bit (bit 3)
0x38
setpci -s 00:1f.0 A4.W=38
setpci -s 00:1f.0 A6.B # GEN_PMCON_LOCK
0x80
or 0x80 0x4
0x84
setpci -s 00:1f.0 A6.B=84 # SLP_S4# Stretching Policy Lock-Down

This shouldn't be used with any other notebooks

Actual purpose of SLP_S4# on ThinkPad is also unknown

Furthermore, it doesn't look like it would be ever used, looking at SLP_TYP field of PM1_CNT register, but timing charts are not exactly clear

Following would set *SLP_S4# Stretching Policy* just like on vendor fw (0b11 and enabled), but it's unclear whether it actually fixes anything. Possibly has something to do with PMH7 clocks, one of them being SUSCLK_32K ``` setpci -s 00:1f.0 A4.W # GEN_PMCON_3 0x30 or 0x30 0x08 # toggle enable bit (bit 3) 0x38 setpci -s 00:1f.0 A4.W=38 setpci -s 00:1f.0 A6.B # GEN_PMCON_LOCK 0x80 or 0x80 0x4 0x84 setpci -s 00:1f.0 A6.B=84 # SLP_S4# Stretching Policy Lock-Down ``` This shouldn't be used with any other notebooks Actual purpose of SLP_S4# on ThinkPad is also unknown Furthermore, it doesn't look like it would be ever used, looking at SLP_TYP field of PM1_CNT register, but timing charts are not exactly clear
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