TODO: All combinations needs to be actually checked, this was inhered from datasheet (together with at what voltage RTC_PWR_STS trips - should be around 2.0V)
As I understand Coreboot now has a new option "[*] Include a Top swap bootblock" that would make sure that topswap works.
If I understand well, this adds a second bootblock in the aread that is being swapped.
I don't remember the exact details about the BUC.TS register but this might enable to simplify the installation procedure and make it more robust at the same time.
What I don't remember is, when you boot from the stock BIOS, if you can, by changing the BUC.TS, manage to flash both bootblock areas without needing to reboot.
If we simplify the installation instructions, advanced users also need to be warned about it when installing an image that doesn't have that feature activated (like an old Libreboot version for instance).
It would still suffer from issues listed in first comment, BUC.TS rely on working (and correctly installed) RTC battery.
Other than that it just has to work or nothing was done so either way it's fine. The only issue is RTC battery and figuring out its state.
Apparently coreboot clears RTC Power Status (RTC_PWR_STS) (RTC_BATTERY_DEAD in coreboot) as soon as it sees it set. This needs to be fixed as it breaks everything including OS security and filesystem measures against multimount, among other things
ICH9M example - i82801ix_rtc_init
One way to fix it would be to check whether NVRAM has valid contents (and if so - nvramtool/nvramcui was used, therefore we can assume use has noticed RTC fault).
If needed clear the bit during shutdown via ACPI
Alternatively coreboot table would need to be added/extended to carry that parameter to payload/OS, in HW independent way