I'm working on a method to potentially disable the ME firmware from the descriptor on SandyBridge. There is no method that Intel documents, but it is theoretically possible.
The platform can boot without ME firmware present in SPI flash, but with a 30 minute reset. The theory under investigation is whether this 30 minute reset can be somehow disabled in the Flash Descriptor region inside the boot flash.
Progress to be determined, and this issue will be updated as and when progress is made (or if the effort is abandoned).
Are you still working on this goal you're describing, completely removing the ME part?
How compatible with libreboot would be the proprietary ME part, but with me_cleaner applied to it? (How model-independend can one ROM image be using this approach?).
Are there other issues to be solved for supporting the X220?
In case you want to have an image tested on a random X220, I'd happily do that.
I would gladly acquire an X220 to help out with testing on my end if that can help the effort for this particular issue.
I've reached a state of annoyance with my coreboot x220 where I'm willing to help you out to fix my work interruptions.
If I remember correctly I don't have ME cleaned up fully (could be wrong, flashing hapened long time ago) and I'm getting sporadic "glitches".
These glitches can be recovered from by closing the lid and opening it again once the laptop has changed its power status.
Ultimately these glitches lead to a final glitch which is just a "dark glitch" (the other glitches are colorful) which can not be recovered from.
I'm able to run it for more than 30 minutes (a whole day and sometimes more), but this might be because of ME (again, I don't remember if it's still there).
A short notice on my last message here:
What I encounter is in fact a variant of
and not related to coreboot.