From 0821d0290e7e17e375ffdb48a86b56504db4f77e Mon Sep 17 00:00:00 2001
From: Damien Zammit <damien@zamaudio.com>
Date: Sat, 27 Aug 2016 00:35:48 +1000
Subject: [PATCH] nb/intel/gm45: Fix IOMMU

Previously the ME was being reported as present in ACPI
even when it's firmware was missing.  Now we do a check via the pci device
(HECI) to verify if the ME is there or not.

Note that this test could fail if ME is present but disabled in devicetree,
but in that case you won't see it in the lspci tree anyway so it shouldn't
be an issue.

Change-Id: Ib692d476d85236b4886ecf3d6e6814229f441de0
Signed-off-by: Damien Zammit <damien@zamaudio.com>
---
 src/northbridge/intel/gm45/acpi.c  | 3 ++-
 src/northbridge/intel/gm45/iommu.c | 2 ++
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/northbridge/intel/gm45/acpi.c b/src/northbridge/intel/gm45/acpi.c
index 8990c3b..b90afca 100644
--- a/src/northbridge/intel/gm45/acpi.c
+++ b/src/northbridge/intel/gm45/acpi.c
@@ -72,7 +72,8 @@ unsigned long acpi_fill_mcfg(unsigned long current)
 
 static unsigned long acpi_fill_dmar(unsigned long current)
 {
-	int me_active = (dev_find_slot(0, PCI_DEVFN(3, 0)) != NULL);
+	int me_active = (dev_find_slot(0, PCI_DEVFN(3, 0)) != NULL) &&
+		(pci_read_config8(dev_find_slot(0, PCI_DEVFN(3, 0)), PCI_CLASS_REVISION) != 0xff);
 	int stepping = pci_read_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), PCI_CLASS_REVISION);
 
 	unsigned long tmp = current;
diff --git a/src/northbridge/intel/gm45/iommu.c b/src/northbridge/intel/gm45/iommu.c
index 10548f4..0c3c18e 100644
--- a/src/northbridge/intel/gm45/iommu.c
+++ b/src/northbridge/intel/gm45/iommu.c
@@ -40,6 +40,8 @@ void init_iommu()
 	}
 	if (me_active) {
 		MCHBAR32(0x10) = IOMMU_BASE3 | 1; /* ME  @ 0:3.0-3 */
+	} else {
+		MCHBAR32(0x10) = 0; /* disable IOMMU for ME */
 	}
 	MCHBAR32(0x20) = IOMMU_BASE4 | 1; /* all other DMA sources */
 
-- 
2.9.3

