qib_rc.c 61 KB

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  1. /*
  2. * Copyright (c) 2006, 2007, 2008, 2009 QLogic Corporation. All rights reserved.
  3. * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include <linux/io.h>
  34. #include "qib.h"
  35. /* cut down ridiculously long IB macro names */
  36. #define OP(x) IB_OPCODE_RC_##x
  37. static void rc_timeout(unsigned long arg);
  38. static u32 restart_sge(struct qib_sge_state *ss, struct qib_swqe *wqe,
  39. u32 psn, u32 pmtu)
  40. {
  41. u32 len;
  42. len = ((psn - wqe->psn) & QIB_PSN_MASK) * pmtu;
  43. ss->sge = wqe->sg_list[0];
  44. ss->sg_list = wqe->sg_list + 1;
  45. ss->num_sge = wqe->wr.num_sge;
  46. ss->total_len = wqe->length;
  47. qib_skip_sge(ss, len, 0);
  48. return wqe->length - len;
  49. }
  50. static void start_timer(struct qib_qp *qp)
  51. {
  52. qp->s_flags |= QIB_S_TIMER;
  53. qp->s_timer.function = rc_timeout;
  54. /* 4.096 usec. * (1 << qp->timeout) */
  55. qp->s_timer.expires = jiffies + qp->timeout_jiffies;
  56. add_timer(&qp->s_timer);
  57. }
  58. /**
  59. * qib_make_rc_ack - construct a response packet (ACK, NAK, or RDMA read)
  60. * @dev: the device for this QP
  61. * @qp: a pointer to the QP
  62. * @ohdr: a pointer to the IB header being constructed
  63. * @pmtu: the path MTU
  64. *
  65. * Return 1 if constructed; otherwise, return 0.
  66. * Note that we are in the responder's side of the QP context.
  67. * Note the QP s_lock must be held.
  68. */
  69. static int qib_make_rc_ack(struct qib_ibdev *dev, struct qib_qp *qp,
  70. struct qib_other_headers *ohdr, u32 pmtu)
  71. {
  72. struct qib_ack_entry *e;
  73. u32 hwords;
  74. u32 len;
  75. u32 bth0;
  76. u32 bth2;
  77. /* Don't send an ACK if we aren't supposed to. */
  78. if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_RECV_OK))
  79. goto bail;
  80. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  81. hwords = 5;
  82. switch (qp->s_ack_state) {
  83. case OP(RDMA_READ_RESPONSE_LAST):
  84. case OP(RDMA_READ_RESPONSE_ONLY):
  85. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  86. if (e->rdma_sge.mr) {
  87. qib_put_mr(e->rdma_sge.mr);
  88. e->rdma_sge.mr = NULL;
  89. }
  90. /* FALLTHROUGH */
  91. case OP(ATOMIC_ACKNOWLEDGE):
  92. /*
  93. * We can increment the tail pointer now that the last
  94. * response has been sent instead of only being
  95. * constructed.
  96. */
  97. if (++qp->s_tail_ack_queue > QIB_MAX_RDMA_ATOMIC)
  98. qp->s_tail_ack_queue = 0;
  99. /* FALLTHROUGH */
  100. case OP(SEND_ONLY):
  101. case OP(ACKNOWLEDGE):
  102. /* Check for no next entry in the queue. */
  103. if (qp->r_head_ack_queue == qp->s_tail_ack_queue) {
  104. if (qp->s_flags & QIB_S_ACK_PENDING)
  105. goto normal;
  106. goto bail;
  107. }
  108. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  109. if (e->opcode == OP(RDMA_READ_REQUEST)) {
  110. /*
  111. * If a RDMA read response is being resent and
  112. * we haven't seen the duplicate request yet,
  113. * then stop sending the remaining responses the
  114. * responder has seen until the requester resends it.
  115. */
  116. len = e->rdma_sge.sge_length;
  117. if (len && !e->rdma_sge.mr) {
  118. qp->s_tail_ack_queue = qp->r_head_ack_queue;
  119. goto bail;
  120. }
  121. /* Copy SGE state in case we need to resend */
  122. qp->s_rdma_mr = e->rdma_sge.mr;
  123. if (qp->s_rdma_mr)
  124. qib_get_mr(qp->s_rdma_mr);
  125. qp->s_ack_rdma_sge.sge = e->rdma_sge;
  126. qp->s_ack_rdma_sge.num_sge = 1;
  127. qp->s_cur_sge = &qp->s_ack_rdma_sge;
  128. if (len > pmtu) {
  129. len = pmtu;
  130. qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST);
  131. } else {
  132. qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY);
  133. e->sent = 1;
  134. }
  135. ohdr->u.aeth = qib_compute_aeth(qp);
  136. hwords++;
  137. qp->s_ack_rdma_psn = e->psn;
  138. bth2 = qp->s_ack_rdma_psn++ & QIB_PSN_MASK;
  139. } else {
  140. /* COMPARE_SWAP or FETCH_ADD */
  141. qp->s_cur_sge = NULL;
  142. len = 0;
  143. qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE);
  144. ohdr->u.at.aeth = qib_compute_aeth(qp);
  145. ohdr->u.at.atomic_ack_eth[0] =
  146. cpu_to_be32(e->atomic_data >> 32);
  147. ohdr->u.at.atomic_ack_eth[1] =
  148. cpu_to_be32(e->atomic_data);
  149. hwords += sizeof(ohdr->u.at) / sizeof(u32);
  150. bth2 = e->psn & QIB_PSN_MASK;
  151. e->sent = 1;
  152. }
  153. bth0 = qp->s_ack_state << 24;
  154. break;
  155. case OP(RDMA_READ_RESPONSE_FIRST):
  156. qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  157. /* FALLTHROUGH */
  158. case OP(RDMA_READ_RESPONSE_MIDDLE):
  159. qp->s_cur_sge = &qp->s_ack_rdma_sge;
  160. qp->s_rdma_mr = qp->s_ack_rdma_sge.sge.mr;
  161. if (qp->s_rdma_mr)
  162. qib_get_mr(qp->s_rdma_mr);
  163. len = qp->s_ack_rdma_sge.sge.sge_length;
  164. if (len > pmtu)
  165. len = pmtu;
  166. else {
  167. ohdr->u.aeth = qib_compute_aeth(qp);
  168. hwords++;
  169. qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST);
  170. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  171. e->sent = 1;
  172. }
  173. bth0 = qp->s_ack_state << 24;
  174. bth2 = qp->s_ack_rdma_psn++ & QIB_PSN_MASK;
  175. break;
  176. default:
  177. normal:
  178. /*
  179. * Send a regular ACK.
  180. * Set the s_ack_state so we wait until after sending
  181. * the ACK before setting s_ack_state to ACKNOWLEDGE
  182. * (see above).
  183. */
  184. qp->s_ack_state = OP(SEND_ONLY);
  185. qp->s_flags &= ~QIB_S_ACK_PENDING;
  186. qp->s_cur_sge = NULL;
  187. if (qp->s_nak_state)
  188. ohdr->u.aeth =
  189. cpu_to_be32((qp->r_msn & QIB_MSN_MASK) |
  190. (qp->s_nak_state <<
  191. QIB_AETH_CREDIT_SHIFT));
  192. else
  193. ohdr->u.aeth = qib_compute_aeth(qp);
  194. hwords++;
  195. len = 0;
  196. bth0 = OP(ACKNOWLEDGE) << 24;
  197. bth2 = qp->s_ack_psn & QIB_PSN_MASK;
  198. }
  199. qp->s_rdma_ack_cnt++;
  200. qp->s_hdrwords = hwords;
  201. qp->s_cur_size = len;
  202. qib_make_ruc_header(qp, ohdr, bth0, bth2);
  203. return 1;
  204. bail:
  205. qp->s_ack_state = OP(ACKNOWLEDGE);
  206. qp->s_flags &= ~(QIB_S_RESP_PENDING | QIB_S_ACK_PENDING);
  207. return 0;
  208. }
  209. /**
  210. * qib_make_rc_req - construct a request packet (SEND, RDMA r/w, ATOMIC)
  211. * @qp: a pointer to the QP
  212. *
  213. * Return 1 if constructed; otherwise, return 0.
  214. */
  215. int qib_make_rc_req(struct qib_qp *qp)
  216. {
  217. struct qib_ibdev *dev = to_idev(qp->ibqp.device);
  218. struct qib_other_headers *ohdr;
  219. struct qib_sge_state *ss;
  220. struct qib_swqe *wqe;
  221. u32 hwords;
  222. u32 len;
  223. u32 bth0;
  224. u32 bth2;
  225. u32 pmtu = qp->pmtu;
  226. char newreq;
  227. unsigned long flags;
  228. int ret = 0;
  229. int delta;
  230. ohdr = &qp->s_hdr->u.oth;
  231. if (qp->remote_ah_attr.ah_flags & IB_AH_GRH)
  232. ohdr = &qp->s_hdr->u.l.oth;
  233. /*
  234. * The lock is needed to synchronize between the sending tasklet,
  235. * the receive interrupt handler, and timeout resends.
  236. */
  237. spin_lock_irqsave(&qp->s_lock, flags);
  238. /* Sending responses has higher priority over sending requests. */
  239. if ((qp->s_flags & QIB_S_RESP_PENDING) &&
  240. qib_make_rc_ack(dev, qp, ohdr, pmtu))
  241. goto done;
  242. if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_SEND_OK)) {
  243. if (!(ib_qib_state_ops[qp->state] & QIB_FLUSH_SEND))
  244. goto bail;
  245. /* We are in the error state, flush the work request. */
  246. if (qp->s_last == qp->s_head)
  247. goto bail;
  248. /* If DMAs are in progress, we can't flush immediately. */
  249. if (atomic_read(&qp->s_dma_busy)) {
  250. qp->s_flags |= QIB_S_WAIT_DMA;
  251. goto bail;
  252. }
  253. wqe = get_swqe_ptr(qp, qp->s_last);
  254. qib_send_complete(qp, wqe, qp->s_last != qp->s_acked ?
  255. IB_WC_SUCCESS : IB_WC_WR_FLUSH_ERR);
  256. /* will get called again */
  257. goto done;
  258. }
  259. if (qp->s_flags & (QIB_S_WAIT_RNR | QIB_S_WAIT_ACK))
  260. goto bail;
  261. if (qib_cmp24(qp->s_psn, qp->s_sending_hpsn) <= 0) {
  262. if (qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) <= 0) {
  263. qp->s_flags |= QIB_S_WAIT_PSN;
  264. goto bail;
  265. }
  266. qp->s_sending_psn = qp->s_psn;
  267. qp->s_sending_hpsn = qp->s_psn - 1;
  268. }
  269. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  270. hwords = 5;
  271. bth0 = 0;
  272. /* Send a request. */
  273. wqe = get_swqe_ptr(qp, qp->s_cur);
  274. switch (qp->s_state) {
  275. default:
  276. if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_NEXT_SEND_OK))
  277. goto bail;
  278. /*
  279. * Resend an old request or start a new one.
  280. *
  281. * We keep track of the current SWQE so that
  282. * we don't reset the "furthest progress" state
  283. * if we need to back up.
  284. */
  285. newreq = 0;
  286. if (qp->s_cur == qp->s_tail) {
  287. /* Check if send work queue is empty. */
  288. if (qp->s_tail == qp->s_head)
  289. goto bail;
  290. /*
  291. * If a fence is requested, wait for previous
  292. * RDMA read and atomic operations to finish.
  293. */
  294. if ((wqe->wr.send_flags & IB_SEND_FENCE) &&
  295. qp->s_num_rd_atomic) {
  296. qp->s_flags |= QIB_S_WAIT_FENCE;
  297. goto bail;
  298. }
  299. wqe->psn = qp->s_next_psn;
  300. newreq = 1;
  301. }
  302. /*
  303. * Note that we have to be careful not to modify the
  304. * original work request since we may need to resend
  305. * it.
  306. */
  307. len = wqe->length;
  308. ss = &qp->s_sge;
  309. bth2 = qp->s_psn & QIB_PSN_MASK;
  310. switch (wqe->wr.opcode) {
  311. case IB_WR_SEND:
  312. case IB_WR_SEND_WITH_IMM:
  313. /* If no credit, return. */
  314. if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT) &&
  315. qib_cmp24(wqe->ssn, qp->s_lsn + 1) > 0) {
  316. qp->s_flags |= QIB_S_WAIT_SSN_CREDIT;
  317. goto bail;
  318. }
  319. wqe->lpsn = wqe->psn;
  320. if (len > pmtu) {
  321. wqe->lpsn += (len - 1) / pmtu;
  322. qp->s_state = OP(SEND_FIRST);
  323. len = pmtu;
  324. break;
  325. }
  326. if (wqe->wr.opcode == IB_WR_SEND)
  327. qp->s_state = OP(SEND_ONLY);
  328. else {
  329. qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE);
  330. /* Immediate data comes after the BTH */
  331. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  332. hwords += 1;
  333. }
  334. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  335. bth0 |= IB_BTH_SOLICITED;
  336. bth2 |= IB_BTH_REQ_ACK;
  337. if (++qp->s_cur == qp->s_size)
  338. qp->s_cur = 0;
  339. break;
  340. case IB_WR_RDMA_WRITE:
  341. if (newreq && !(qp->s_flags & QIB_S_UNLIMITED_CREDIT))
  342. qp->s_lsn++;
  343. /* FALLTHROUGH */
  344. case IB_WR_RDMA_WRITE_WITH_IMM:
  345. /* If no credit, return. */
  346. if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT) &&
  347. qib_cmp24(wqe->ssn, qp->s_lsn + 1) > 0) {
  348. qp->s_flags |= QIB_S_WAIT_SSN_CREDIT;
  349. goto bail;
  350. }
  351. ohdr->u.rc.reth.vaddr =
  352. cpu_to_be64(wqe->wr.wr.rdma.remote_addr);
  353. ohdr->u.rc.reth.rkey =
  354. cpu_to_be32(wqe->wr.wr.rdma.rkey);
  355. ohdr->u.rc.reth.length = cpu_to_be32(len);
  356. hwords += sizeof(struct ib_reth) / sizeof(u32);
  357. wqe->lpsn = wqe->psn;
  358. if (len > pmtu) {
  359. wqe->lpsn += (len - 1) / pmtu;
  360. qp->s_state = OP(RDMA_WRITE_FIRST);
  361. len = pmtu;
  362. break;
  363. }
  364. if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
  365. qp->s_state = OP(RDMA_WRITE_ONLY);
  366. else {
  367. qp->s_state =
  368. OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
  369. /* Immediate data comes after RETH */
  370. ohdr->u.rc.imm_data = wqe->wr.ex.imm_data;
  371. hwords += 1;
  372. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  373. bth0 |= IB_BTH_SOLICITED;
  374. }
  375. bth2 |= IB_BTH_REQ_ACK;
  376. if (++qp->s_cur == qp->s_size)
  377. qp->s_cur = 0;
  378. break;
  379. case IB_WR_RDMA_READ:
  380. /*
  381. * Don't allow more operations to be started
  382. * than the QP limits allow.
  383. */
  384. if (newreq) {
  385. if (qp->s_num_rd_atomic >=
  386. qp->s_max_rd_atomic) {
  387. qp->s_flags |= QIB_S_WAIT_RDMAR;
  388. goto bail;
  389. }
  390. qp->s_num_rd_atomic++;
  391. if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT))
  392. qp->s_lsn++;
  393. /*
  394. * Adjust s_next_psn to count the
  395. * expected number of responses.
  396. */
  397. if (len > pmtu)
  398. qp->s_next_psn += (len - 1) / pmtu;
  399. wqe->lpsn = qp->s_next_psn++;
  400. }
  401. ohdr->u.rc.reth.vaddr =
  402. cpu_to_be64(wqe->wr.wr.rdma.remote_addr);
  403. ohdr->u.rc.reth.rkey =
  404. cpu_to_be32(wqe->wr.wr.rdma.rkey);
  405. ohdr->u.rc.reth.length = cpu_to_be32(len);
  406. qp->s_state = OP(RDMA_READ_REQUEST);
  407. hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
  408. ss = NULL;
  409. len = 0;
  410. bth2 |= IB_BTH_REQ_ACK;
  411. if (++qp->s_cur == qp->s_size)
  412. qp->s_cur = 0;
  413. break;
  414. case IB_WR_ATOMIC_CMP_AND_SWP:
  415. case IB_WR_ATOMIC_FETCH_AND_ADD:
  416. /*
  417. * Don't allow more operations to be started
  418. * than the QP limits allow.
  419. */
  420. if (newreq) {
  421. if (qp->s_num_rd_atomic >=
  422. qp->s_max_rd_atomic) {
  423. qp->s_flags |= QIB_S_WAIT_RDMAR;
  424. goto bail;
  425. }
  426. qp->s_num_rd_atomic++;
  427. if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT))
  428. qp->s_lsn++;
  429. wqe->lpsn = wqe->psn;
  430. }
  431. if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) {
  432. qp->s_state = OP(COMPARE_SWAP);
  433. ohdr->u.atomic_eth.swap_data = cpu_to_be64(
  434. wqe->wr.wr.atomic.swap);
  435. ohdr->u.atomic_eth.compare_data = cpu_to_be64(
  436. wqe->wr.wr.atomic.compare_add);
  437. } else {
  438. qp->s_state = OP(FETCH_ADD);
  439. ohdr->u.atomic_eth.swap_data = cpu_to_be64(
  440. wqe->wr.wr.atomic.compare_add);
  441. ohdr->u.atomic_eth.compare_data = 0;
  442. }
  443. ohdr->u.atomic_eth.vaddr[0] = cpu_to_be32(
  444. wqe->wr.wr.atomic.remote_addr >> 32);
  445. ohdr->u.atomic_eth.vaddr[1] = cpu_to_be32(
  446. wqe->wr.wr.atomic.remote_addr);
  447. ohdr->u.atomic_eth.rkey = cpu_to_be32(
  448. wqe->wr.wr.atomic.rkey);
  449. hwords += sizeof(struct ib_atomic_eth) / sizeof(u32);
  450. ss = NULL;
  451. len = 0;
  452. bth2 |= IB_BTH_REQ_ACK;
  453. if (++qp->s_cur == qp->s_size)
  454. qp->s_cur = 0;
  455. break;
  456. default:
  457. goto bail;
  458. }
  459. qp->s_sge.sge = wqe->sg_list[0];
  460. qp->s_sge.sg_list = wqe->sg_list + 1;
  461. qp->s_sge.num_sge = wqe->wr.num_sge;
  462. qp->s_sge.total_len = wqe->length;
  463. qp->s_len = wqe->length;
  464. if (newreq) {
  465. qp->s_tail++;
  466. if (qp->s_tail >= qp->s_size)
  467. qp->s_tail = 0;
  468. }
  469. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  470. qp->s_psn = wqe->lpsn + 1;
  471. else {
  472. qp->s_psn++;
  473. if (qib_cmp24(qp->s_psn, qp->s_next_psn) > 0)
  474. qp->s_next_psn = qp->s_psn;
  475. }
  476. break;
  477. case OP(RDMA_READ_RESPONSE_FIRST):
  478. /*
  479. * qp->s_state is normally set to the opcode of the
  480. * last packet constructed for new requests and therefore
  481. * is never set to RDMA read response.
  482. * RDMA_READ_RESPONSE_FIRST is used by the ACK processing
  483. * thread to indicate a SEND needs to be restarted from an
  484. * earlier PSN without interferring with the sending thread.
  485. * See qib_restart_rc().
  486. */
  487. qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
  488. /* FALLTHROUGH */
  489. case OP(SEND_FIRST):
  490. qp->s_state = OP(SEND_MIDDLE);
  491. /* FALLTHROUGH */
  492. case OP(SEND_MIDDLE):
  493. bth2 = qp->s_psn++ & QIB_PSN_MASK;
  494. if (qib_cmp24(qp->s_psn, qp->s_next_psn) > 0)
  495. qp->s_next_psn = qp->s_psn;
  496. ss = &qp->s_sge;
  497. len = qp->s_len;
  498. if (len > pmtu) {
  499. len = pmtu;
  500. break;
  501. }
  502. if (wqe->wr.opcode == IB_WR_SEND)
  503. qp->s_state = OP(SEND_LAST);
  504. else {
  505. qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
  506. /* Immediate data comes after the BTH */
  507. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  508. hwords += 1;
  509. }
  510. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  511. bth0 |= IB_BTH_SOLICITED;
  512. bth2 |= IB_BTH_REQ_ACK;
  513. qp->s_cur++;
  514. if (qp->s_cur >= qp->s_size)
  515. qp->s_cur = 0;
  516. break;
  517. case OP(RDMA_READ_RESPONSE_LAST):
  518. /*
  519. * qp->s_state is normally set to the opcode of the
  520. * last packet constructed for new requests and therefore
  521. * is never set to RDMA read response.
  522. * RDMA_READ_RESPONSE_LAST is used by the ACK processing
  523. * thread to indicate a RDMA write needs to be restarted from
  524. * an earlier PSN without interferring with the sending thread.
  525. * See qib_restart_rc().
  526. */
  527. qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
  528. /* FALLTHROUGH */
  529. case OP(RDMA_WRITE_FIRST):
  530. qp->s_state = OP(RDMA_WRITE_MIDDLE);
  531. /* FALLTHROUGH */
  532. case OP(RDMA_WRITE_MIDDLE):
  533. bth2 = qp->s_psn++ & QIB_PSN_MASK;
  534. if (qib_cmp24(qp->s_psn, qp->s_next_psn) > 0)
  535. qp->s_next_psn = qp->s_psn;
  536. ss = &qp->s_sge;
  537. len = qp->s_len;
  538. if (len > pmtu) {
  539. len = pmtu;
  540. break;
  541. }
  542. if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
  543. qp->s_state = OP(RDMA_WRITE_LAST);
  544. else {
  545. qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
  546. /* Immediate data comes after the BTH */
  547. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  548. hwords += 1;
  549. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  550. bth0 |= IB_BTH_SOLICITED;
  551. }
  552. bth2 |= IB_BTH_REQ_ACK;
  553. qp->s_cur++;
  554. if (qp->s_cur >= qp->s_size)
  555. qp->s_cur = 0;
  556. break;
  557. case OP(RDMA_READ_RESPONSE_MIDDLE):
  558. /*
  559. * qp->s_state is normally set to the opcode of the
  560. * last packet constructed for new requests and therefore
  561. * is never set to RDMA read response.
  562. * RDMA_READ_RESPONSE_MIDDLE is used by the ACK processing
  563. * thread to indicate a RDMA read needs to be restarted from
  564. * an earlier PSN without interferring with the sending thread.
  565. * See qib_restart_rc().
  566. */
  567. len = ((qp->s_psn - wqe->psn) & QIB_PSN_MASK) * pmtu;
  568. ohdr->u.rc.reth.vaddr =
  569. cpu_to_be64(wqe->wr.wr.rdma.remote_addr + len);
  570. ohdr->u.rc.reth.rkey =
  571. cpu_to_be32(wqe->wr.wr.rdma.rkey);
  572. ohdr->u.rc.reth.length = cpu_to_be32(wqe->length - len);
  573. qp->s_state = OP(RDMA_READ_REQUEST);
  574. hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
  575. bth2 = (qp->s_psn & QIB_PSN_MASK) | IB_BTH_REQ_ACK;
  576. qp->s_psn = wqe->lpsn + 1;
  577. ss = NULL;
  578. len = 0;
  579. qp->s_cur++;
  580. if (qp->s_cur == qp->s_size)
  581. qp->s_cur = 0;
  582. break;
  583. }
  584. qp->s_sending_hpsn = bth2;
  585. delta = (((int) bth2 - (int) wqe->psn) << 8) >> 8;
  586. if (delta && delta % QIB_PSN_CREDIT == 0)
  587. bth2 |= IB_BTH_REQ_ACK;
  588. if (qp->s_flags & QIB_S_SEND_ONE) {
  589. qp->s_flags &= ~QIB_S_SEND_ONE;
  590. qp->s_flags |= QIB_S_WAIT_ACK;
  591. bth2 |= IB_BTH_REQ_ACK;
  592. }
  593. qp->s_len -= len;
  594. qp->s_hdrwords = hwords;
  595. qp->s_cur_sge = ss;
  596. qp->s_cur_size = len;
  597. qib_make_ruc_header(qp, ohdr, bth0 | (qp->s_state << 24), bth2);
  598. done:
  599. ret = 1;
  600. goto unlock;
  601. bail:
  602. qp->s_flags &= ~QIB_S_BUSY;
  603. unlock:
  604. spin_unlock_irqrestore(&qp->s_lock, flags);
  605. return ret;
  606. }
  607. /**
  608. * qib_send_rc_ack - Construct an ACK packet and send it
  609. * @qp: a pointer to the QP
  610. *
  611. * This is called from qib_rc_rcv() and qib_kreceive().
  612. * Note that RDMA reads and atomics are handled in the
  613. * send side QP state and tasklet.
  614. */
  615. void qib_send_rc_ack(struct qib_qp *qp)
  616. {
  617. struct qib_devdata *dd = dd_from_ibdev(qp->ibqp.device);
  618. struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  619. struct qib_pportdata *ppd = ppd_from_ibp(ibp);
  620. u64 pbc;
  621. u16 lrh0;
  622. u32 bth0;
  623. u32 hwords;
  624. u32 pbufn;
  625. u32 __iomem *piobuf;
  626. struct qib_ib_header hdr;
  627. struct qib_other_headers *ohdr;
  628. u32 control;
  629. unsigned long flags;
  630. spin_lock_irqsave(&qp->s_lock, flags);
  631. if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_RECV_OK))
  632. goto unlock;
  633. /* Don't send ACK or NAK if a RDMA read or atomic is pending. */
  634. if ((qp->s_flags & QIB_S_RESP_PENDING) || qp->s_rdma_ack_cnt)
  635. goto queue_ack;
  636. /* Construct the header with s_lock held so APM doesn't change it. */
  637. ohdr = &hdr.u.oth;
  638. lrh0 = QIB_LRH_BTH;
  639. /* header size in 32-bit words LRH+BTH+AETH = (8+12+4)/4. */
  640. hwords = 6;
  641. if (unlikely(qp->remote_ah_attr.ah_flags & IB_AH_GRH)) {
  642. hwords += qib_make_grh(ibp, &hdr.u.l.grh,
  643. &qp->remote_ah_attr.grh, hwords, 0);
  644. ohdr = &hdr.u.l.oth;
  645. lrh0 = QIB_LRH_GRH;
  646. }
  647. /* read pkey_index w/o lock (its atomic) */
  648. bth0 = qib_get_pkey(ibp, qp->s_pkey_index) | (OP(ACKNOWLEDGE) << 24);
  649. if (qp->s_mig_state == IB_MIG_MIGRATED)
  650. bth0 |= IB_BTH_MIG_REQ;
  651. if (qp->r_nak_state)
  652. ohdr->u.aeth = cpu_to_be32((qp->r_msn & QIB_MSN_MASK) |
  653. (qp->r_nak_state <<
  654. QIB_AETH_CREDIT_SHIFT));
  655. else
  656. ohdr->u.aeth = qib_compute_aeth(qp);
  657. lrh0 |= ibp->sl_to_vl[qp->remote_ah_attr.sl] << 12 |
  658. qp->remote_ah_attr.sl << 4;
  659. hdr.lrh[0] = cpu_to_be16(lrh0);
  660. hdr.lrh[1] = cpu_to_be16(qp->remote_ah_attr.dlid);
  661. hdr.lrh[2] = cpu_to_be16(hwords + SIZE_OF_CRC);
  662. hdr.lrh[3] = cpu_to_be16(ppd->lid | qp->remote_ah_attr.src_path_bits);
  663. ohdr->bth[0] = cpu_to_be32(bth0);
  664. ohdr->bth[1] = cpu_to_be32(qp->remote_qpn);
  665. ohdr->bth[2] = cpu_to_be32(qp->r_ack_psn & QIB_PSN_MASK);
  666. spin_unlock_irqrestore(&qp->s_lock, flags);
  667. /* Don't try to send ACKs if the link isn't ACTIVE */
  668. if (!(ppd->lflags & QIBL_LINKACTIVE))
  669. goto done;
  670. control = dd->f_setpbc_control(ppd, hwords + SIZE_OF_CRC,
  671. qp->s_srate, lrh0 >> 12);
  672. /* length is + 1 for the control dword */
  673. pbc = ((u64) control << 32) | (hwords + 1);
  674. piobuf = dd->f_getsendbuf(ppd, pbc, &pbufn);
  675. if (!piobuf) {
  676. /*
  677. * We are out of PIO buffers at the moment.
  678. * Pass responsibility for sending the ACK to the
  679. * send tasklet so that when a PIO buffer becomes
  680. * available, the ACK is sent ahead of other outgoing
  681. * packets.
  682. */
  683. spin_lock_irqsave(&qp->s_lock, flags);
  684. goto queue_ack;
  685. }
  686. /*
  687. * Write the pbc.
  688. * We have to flush after the PBC for correctness
  689. * on some cpus or WC buffer can be written out of order.
  690. */
  691. writeq(pbc, piobuf);
  692. if (dd->flags & QIB_PIO_FLUSH_WC) {
  693. u32 *hdrp = (u32 *) &hdr;
  694. qib_flush_wc();
  695. qib_pio_copy(piobuf + 2, hdrp, hwords - 1);
  696. qib_flush_wc();
  697. __raw_writel(hdrp[hwords - 1], piobuf + hwords + 1);
  698. } else
  699. qib_pio_copy(piobuf + 2, (u32 *) &hdr, hwords);
  700. if (dd->flags & QIB_USE_SPCL_TRIG) {
  701. u32 spcl_off = (pbufn >= dd->piobcnt2k) ? 2047 : 1023;
  702. qib_flush_wc();
  703. __raw_writel(0xaebecede, piobuf + spcl_off);
  704. }
  705. qib_flush_wc();
  706. qib_sendbuf_done(dd, pbufn);
  707. this_cpu_inc(ibp->pmastats->n_unicast_xmit);
  708. goto done;
  709. queue_ack:
  710. if (ib_qib_state_ops[qp->state] & QIB_PROCESS_RECV_OK) {
  711. ibp->n_rc_qacks++;
  712. qp->s_flags |= QIB_S_ACK_PENDING | QIB_S_RESP_PENDING;
  713. qp->s_nak_state = qp->r_nak_state;
  714. qp->s_ack_psn = qp->r_ack_psn;
  715. /* Schedule the send tasklet. */
  716. qib_schedule_send(qp);
  717. }
  718. unlock:
  719. spin_unlock_irqrestore(&qp->s_lock, flags);
  720. done:
  721. return;
  722. }
  723. /**
  724. * reset_psn - reset the QP state to send starting from PSN
  725. * @qp: the QP
  726. * @psn: the packet sequence number to restart at
  727. *
  728. * This is called from qib_rc_rcv() to process an incoming RC ACK
  729. * for the given QP.
  730. * Called at interrupt level with the QP s_lock held.
  731. */
  732. static void reset_psn(struct qib_qp *qp, u32 psn)
  733. {
  734. u32 n = qp->s_acked;
  735. struct qib_swqe *wqe = get_swqe_ptr(qp, n);
  736. u32 opcode;
  737. qp->s_cur = n;
  738. /*
  739. * If we are starting the request from the beginning,
  740. * let the normal send code handle initialization.
  741. */
  742. if (qib_cmp24(psn, wqe->psn) <= 0) {
  743. qp->s_state = OP(SEND_LAST);
  744. goto done;
  745. }
  746. /* Find the work request opcode corresponding to the given PSN. */
  747. opcode = wqe->wr.opcode;
  748. for (;;) {
  749. int diff;
  750. if (++n == qp->s_size)
  751. n = 0;
  752. if (n == qp->s_tail)
  753. break;
  754. wqe = get_swqe_ptr(qp, n);
  755. diff = qib_cmp24(psn, wqe->psn);
  756. if (diff < 0)
  757. break;
  758. qp->s_cur = n;
  759. /*
  760. * If we are starting the request from the beginning,
  761. * let the normal send code handle initialization.
  762. */
  763. if (diff == 0) {
  764. qp->s_state = OP(SEND_LAST);
  765. goto done;
  766. }
  767. opcode = wqe->wr.opcode;
  768. }
  769. /*
  770. * Set the state to restart in the middle of a request.
  771. * Don't change the s_sge, s_cur_sge, or s_cur_size.
  772. * See qib_make_rc_req().
  773. */
  774. switch (opcode) {
  775. case IB_WR_SEND:
  776. case IB_WR_SEND_WITH_IMM:
  777. qp->s_state = OP(RDMA_READ_RESPONSE_FIRST);
  778. break;
  779. case IB_WR_RDMA_WRITE:
  780. case IB_WR_RDMA_WRITE_WITH_IMM:
  781. qp->s_state = OP(RDMA_READ_RESPONSE_LAST);
  782. break;
  783. case IB_WR_RDMA_READ:
  784. qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  785. break;
  786. default:
  787. /*
  788. * This case shouldn't happen since its only
  789. * one PSN per req.
  790. */
  791. qp->s_state = OP(SEND_LAST);
  792. }
  793. done:
  794. qp->s_psn = psn;
  795. /*
  796. * Set QIB_S_WAIT_PSN as qib_rc_complete() may start the timer
  797. * asynchronously before the send tasklet can get scheduled.
  798. * Doing it in qib_make_rc_req() is too late.
  799. */
  800. if ((qib_cmp24(qp->s_psn, qp->s_sending_hpsn) <= 0) &&
  801. (qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) <= 0))
  802. qp->s_flags |= QIB_S_WAIT_PSN;
  803. }
  804. /*
  805. * Back up requester to resend the last un-ACKed request.
  806. * The QP r_lock and s_lock should be held and interrupts disabled.
  807. */
  808. static void qib_restart_rc(struct qib_qp *qp, u32 psn, int wait)
  809. {
  810. struct qib_swqe *wqe = get_swqe_ptr(qp, qp->s_acked);
  811. struct qib_ibport *ibp;
  812. if (qp->s_retry == 0) {
  813. if (qp->s_mig_state == IB_MIG_ARMED) {
  814. qib_migrate_qp(qp);
  815. qp->s_retry = qp->s_retry_cnt;
  816. } else if (qp->s_last == qp->s_acked) {
  817. qib_send_complete(qp, wqe, IB_WC_RETRY_EXC_ERR);
  818. qib_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  819. return;
  820. } else /* XXX need to handle delayed completion */
  821. return;
  822. } else
  823. qp->s_retry--;
  824. ibp = to_iport(qp->ibqp.device, qp->port_num);
  825. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  826. ibp->n_rc_resends++;
  827. else
  828. ibp->n_rc_resends += (qp->s_psn - psn) & QIB_PSN_MASK;
  829. qp->s_flags &= ~(QIB_S_WAIT_FENCE | QIB_S_WAIT_RDMAR |
  830. QIB_S_WAIT_SSN_CREDIT | QIB_S_WAIT_PSN |
  831. QIB_S_WAIT_ACK);
  832. if (wait)
  833. qp->s_flags |= QIB_S_SEND_ONE;
  834. reset_psn(qp, psn);
  835. }
  836. /*
  837. * This is called from s_timer for missing responses.
  838. */
  839. static void rc_timeout(unsigned long arg)
  840. {
  841. struct qib_qp *qp = (struct qib_qp *)arg;
  842. struct qib_ibport *ibp;
  843. unsigned long flags;
  844. spin_lock_irqsave(&qp->r_lock, flags);
  845. spin_lock(&qp->s_lock);
  846. if (qp->s_flags & QIB_S_TIMER) {
  847. ibp = to_iport(qp->ibqp.device, qp->port_num);
  848. ibp->n_rc_timeouts++;
  849. qp->s_flags &= ~QIB_S_TIMER;
  850. del_timer(&qp->s_timer);
  851. qib_restart_rc(qp, qp->s_last_psn + 1, 1);
  852. qib_schedule_send(qp);
  853. }
  854. spin_unlock(&qp->s_lock);
  855. spin_unlock_irqrestore(&qp->r_lock, flags);
  856. }
  857. /*
  858. * This is called from s_timer for RNR timeouts.
  859. */
  860. void qib_rc_rnr_retry(unsigned long arg)
  861. {
  862. struct qib_qp *qp = (struct qib_qp *)arg;
  863. unsigned long flags;
  864. spin_lock_irqsave(&qp->s_lock, flags);
  865. if (qp->s_flags & QIB_S_WAIT_RNR) {
  866. qp->s_flags &= ~QIB_S_WAIT_RNR;
  867. del_timer(&qp->s_timer);
  868. qib_schedule_send(qp);
  869. }
  870. spin_unlock_irqrestore(&qp->s_lock, flags);
  871. }
  872. /*
  873. * Set qp->s_sending_psn to the next PSN after the given one.
  874. * This would be psn+1 except when RDMA reads are present.
  875. */
  876. static void reset_sending_psn(struct qib_qp *qp, u32 psn)
  877. {
  878. struct qib_swqe *wqe;
  879. u32 n = qp->s_last;
  880. /* Find the work request corresponding to the given PSN. */
  881. for (;;) {
  882. wqe = get_swqe_ptr(qp, n);
  883. if (qib_cmp24(psn, wqe->lpsn) <= 0) {
  884. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  885. qp->s_sending_psn = wqe->lpsn + 1;
  886. else
  887. qp->s_sending_psn = psn + 1;
  888. break;
  889. }
  890. if (++n == qp->s_size)
  891. n = 0;
  892. if (n == qp->s_tail)
  893. break;
  894. }
  895. }
  896. /*
  897. * This should be called with the QP s_lock held and interrupts disabled.
  898. */
  899. void qib_rc_send_complete(struct qib_qp *qp, struct qib_ib_header *hdr)
  900. {
  901. struct qib_other_headers *ohdr;
  902. struct qib_swqe *wqe;
  903. struct ib_wc wc;
  904. unsigned i;
  905. u32 opcode;
  906. u32 psn;
  907. if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_OR_FLUSH_SEND))
  908. return;
  909. /* Find out where the BTH is */
  910. if ((be16_to_cpu(hdr->lrh[0]) & 3) == QIB_LRH_BTH)
  911. ohdr = &hdr->u.oth;
  912. else
  913. ohdr = &hdr->u.l.oth;
  914. opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
  915. if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
  916. opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
  917. WARN_ON(!qp->s_rdma_ack_cnt);
  918. qp->s_rdma_ack_cnt--;
  919. return;
  920. }
  921. psn = be32_to_cpu(ohdr->bth[2]);
  922. reset_sending_psn(qp, psn);
  923. /*
  924. * Start timer after a packet requesting an ACK has been sent and
  925. * there are still requests that haven't been acked.
  926. */
  927. if ((psn & IB_BTH_REQ_ACK) && qp->s_acked != qp->s_tail &&
  928. !(qp->s_flags & (QIB_S_TIMER | QIB_S_WAIT_RNR | QIB_S_WAIT_PSN)) &&
  929. (ib_qib_state_ops[qp->state] & QIB_PROCESS_RECV_OK))
  930. start_timer(qp);
  931. while (qp->s_last != qp->s_acked) {
  932. wqe = get_swqe_ptr(qp, qp->s_last);
  933. if (qib_cmp24(wqe->lpsn, qp->s_sending_psn) >= 0 &&
  934. qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) <= 0)
  935. break;
  936. for (i = 0; i < wqe->wr.num_sge; i++) {
  937. struct qib_sge *sge = &wqe->sg_list[i];
  938. qib_put_mr(sge->mr);
  939. }
  940. /* Post a send completion queue entry if requested. */
  941. if (!(qp->s_flags & QIB_S_SIGNAL_REQ_WR) ||
  942. (wqe->wr.send_flags & IB_SEND_SIGNALED)) {
  943. memset(&wc, 0, sizeof(wc));
  944. wc.wr_id = wqe->wr.wr_id;
  945. wc.status = IB_WC_SUCCESS;
  946. wc.opcode = ib_qib_wc_opcode[wqe->wr.opcode];
  947. wc.byte_len = wqe->length;
  948. wc.qp = &qp->ibqp;
  949. qib_cq_enter(to_icq(qp->ibqp.send_cq), &wc, 0);
  950. }
  951. if (++qp->s_last >= qp->s_size)
  952. qp->s_last = 0;
  953. }
  954. /*
  955. * If we were waiting for sends to complete before resending,
  956. * and they are now complete, restart sending.
  957. */
  958. if (qp->s_flags & QIB_S_WAIT_PSN &&
  959. qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
  960. qp->s_flags &= ~QIB_S_WAIT_PSN;
  961. qp->s_sending_psn = qp->s_psn;
  962. qp->s_sending_hpsn = qp->s_psn - 1;
  963. qib_schedule_send(qp);
  964. }
  965. }
  966. static inline void update_last_psn(struct qib_qp *qp, u32 psn)
  967. {
  968. qp->s_last_psn = psn;
  969. }
  970. /*
  971. * Generate a SWQE completion.
  972. * This is similar to qib_send_complete but has to check to be sure
  973. * that the SGEs are not being referenced if the SWQE is being resent.
  974. */
  975. static struct qib_swqe *do_rc_completion(struct qib_qp *qp,
  976. struct qib_swqe *wqe,
  977. struct qib_ibport *ibp)
  978. {
  979. struct ib_wc wc;
  980. unsigned i;
  981. /*
  982. * Don't decrement refcount and don't generate a
  983. * completion if the SWQE is being resent until the send
  984. * is finished.
  985. */
  986. if (qib_cmp24(wqe->lpsn, qp->s_sending_psn) < 0 ||
  987. qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
  988. for (i = 0; i < wqe->wr.num_sge; i++) {
  989. struct qib_sge *sge = &wqe->sg_list[i];
  990. qib_put_mr(sge->mr);
  991. }
  992. /* Post a send completion queue entry if requested. */
  993. if (!(qp->s_flags & QIB_S_SIGNAL_REQ_WR) ||
  994. (wqe->wr.send_flags & IB_SEND_SIGNALED)) {
  995. memset(&wc, 0, sizeof(wc));
  996. wc.wr_id = wqe->wr.wr_id;
  997. wc.status = IB_WC_SUCCESS;
  998. wc.opcode = ib_qib_wc_opcode[wqe->wr.opcode];
  999. wc.byte_len = wqe->length;
  1000. wc.qp = &qp->ibqp;
  1001. qib_cq_enter(to_icq(qp->ibqp.send_cq), &wc, 0);
  1002. }
  1003. if (++qp->s_last >= qp->s_size)
  1004. qp->s_last = 0;
  1005. } else
  1006. ibp->n_rc_delayed_comp++;
  1007. qp->s_retry = qp->s_retry_cnt;
  1008. update_last_psn(qp, wqe->lpsn);
  1009. /*
  1010. * If we are completing a request which is in the process of
  1011. * being resent, we can stop resending it since we know the
  1012. * responder has already seen it.
  1013. */
  1014. if (qp->s_acked == qp->s_cur) {
  1015. if (++qp->s_cur >= qp->s_size)
  1016. qp->s_cur = 0;
  1017. qp->s_acked = qp->s_cur;
  1018. wqe = get_swqe_ptr(qp, qp->s_cur);
  1019. if (qp->s_acked != qp->s_tail) {
  1020. qp->s_state = OP(SEND_LAST);
  1021. qp->s_psn = wqe->psn;
  1022. }
  1023. } else {
  1024. if (++qp->s_acked >= qp->s_size)
  1025. qp->s_acked = 0;
  1026. if (qp->state == IB_QPS_SQD && qp->s_acked == qp->s_cur)
  1027. qp->s_draining = 0;
  1028. wqe = get_swqe_ptr(qp, qp->s_acked);
  1029. }
  1030. return wqe;
  1031. }
  1032. /**
  1033. * do_rc_ack - process an incoming RC ACK
  1034. * @qp: the QP the ACK came in on
  1035. * @psn: the packet sequence number of the ACK
  1036. * @opcode: the opcode of the request that resulted in the ACK
  1037. *
  1038. * This is called from qib_rc_rcv_resp() to process an incoming RC ACK
  1039. * for the given QP.
  1040. * Called at interrupt level with the QP s_lock held.
  1041. * Returns 1 if OK, 0 if current operation should be aborted (NAK).
  1042. */
  1043. static int do_rc_ack(struct qib_qp *qp, u32 aeth, u32 psn, int opcode,
  1044. u64 val, struct qib_ctxtdata *rcd)
  1045. {
  1046. struct qib_ibport *ibp;
  1047. enum ib_wc_status status;
  1048. struct qib_swqe *wqe;
  1049. int ret = 0;
  1050. u32 ack_psn;
  1051. int diff;
  1052. /* Remove QP from retry timer */
  1053. if (qp->s_flags & (QIB_S_TIMER | QIB_S_WAIT_RNR)) {
  1054. qp->s_flags &= ~(QIB_S_TIMER | QIB_S_WAIT_RNR);
  1055. del_timer(&qp->s_timer);
  1056. }
  1057. /*
  1058. * Note that NAKs implicitly ACK outstanding SEND and RDMA write
  1059. * requests and implicitly NAK RDMA read and atomic requests issued
  1060. * before the NAK'ed request. The MSN won't include the NAK'ed
  1061. * request but will include an ACK'ed request(s).
  1062. */
  1063. ack_psn = psn;
  1064. if (aeth >> 29)
  1065. ack_psn--;
  1066. wqe = get_swqe_ptr(qp, qp->s_acked);
  1067. ibp = to_iport(qp->ibqp.device, qp->port_num);
  1068. /*
  1069. * The MSN might be for a later WQE than the PSN indicates so
  1070. * only complete WQEs that the PSN finishes.
  1071. */
  1072. while ((diff = qib_cmp24(ack_psn, wqe->lpsn)) >= 0) {
  1073. /*
  1074. * RDMA_READ_RESPONSE_ONLY is a special case since
  1075. * we want to generate completion events for everything
  1076. * before the RDMA read, copy the data, then generate
  1077. * the completion for the read.
  1078. */
  1079. if (wqe->wr.opcode == IB_WR_RDMA_READ &&
  1080. opcode == OP(RDMA_READ_RESPONSE_ONLY) &&
  1081. diff == 0) {
  1082. ret = 1;
  1083. goto bail;
  1084. }
  1085. /*
  1086. * If this request is a RDMA read or atomic, and the ACK is
  1087. * for a later operation, this ACK NAKs the RDMA read or
  1088. * atomic. In other words, only a RDMA_READ_LAST or ONLY
  1089. * can ACK a RDMA read and likewise for atomic ops. Note
  1090. * that the NAK case can only happen if relaxed ordering is
  1091. * used and requests are sent after an RDMA read or atomic
  1092. * is sent but before the response is received.
  1093. */
  1094. if ((wqe->wr.opcode == IB_WR_RDMA_READ &&
  1095. (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) ||
  1096. ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1097. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) &&
  1098. (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) {
  1099. /* Retry this request. */
  1100. if (!(qp->r_flags & QIB_R_RDMAR_SEQ)) {
  1101. qp->r_flags |= QIB_R_RDMAR_SEQ;
  1102. qib_restart_rc(qp, qp->s_last_psn + 1, 0);
  1103. if (list_empty(&qp->rspwait)) {
  1104. qp->r_flags |= QIB_R_RSP_SEND;
  1105. atomic_inc(&qp->refcount);
  1106. list_add_tail(&qp->rspwait,
  1107. &rcd->qp_wait_list);
  1108. }
  1109. }
  1110. /*
  1111. * No need to process the ACK/NAK since we are
  1112. * restarting an earlier request.
  1113. */
  1114. goto bail;
  1115. }
  1116. if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1117. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) {
  1118. u64 *vaddr = wqe->sg_list[0].vaddr;
  1119. *vaddr = val;
  1120. }
  1121. if (qp->s_num_rd_atomic &&
  1122. (wqe->wr.opcode == IB_WR_RDMA_READ ||
  1123. wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1124. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) {
  1125. qp->s_num_rd_atomic--;
  1126. /* Restart sending task if fence is complete */
  1127. if ((qp->s_flags & QIB_S_WAIT_FENCE) &&
  1128. !qp->s_num_rd_atomic) {
  1129. qp->s_flags &= ~(QIB_S_WAIT_FENCE |
  1130. QIB_S_WAIT_ACK);
  1131. qib_schedule_send(qp);
  1132. } else if (qp->s_flags & QIB_S_WAIT_RDMAR) {
  1133. qp->s_flags &= ~(QIB_S_WAIT_RDMAR |
  1134. QIB_S_WAIT_ACK);
  1135. qib_schedule_send(qp);
  1136. }
  1137. }
  1138. wqe = do_rc_completion(qp, wqe, ibp);
  1139. if (qp->s_acked == qp->s_tail)
  1140. break;
  1141. }
  1142. switch (aeth >> 29) {
  1143. case 0: /* ACK */
  1144. ibp->n_rc_acks++;
  1145. if (qp->s_acked != qp->s_tail) {
  1146. /*
  1147. * We are expecting more ACKs so
  1148. * reset the retransmit timer.
  1149. */
  1150. start_timer(qp);
  1151. /*
  1152. * We can stop resending the earlier packets and
  1153. * continue with the next packet the receiver wants.
  1154. */
  1155. if (qib_cmp24(qp->s_psn, psn) <= 0)
  1156. reset_psn(qp, psn + 1);
  1157. } else if (qib_cmp24(qp->s_psn, psn) <= 0) {
  1158. qp->s_state = OP(SEND_LAST);
  1159. qp->s_psn = psn + 1;
  1160. }
  1161. if (qp->s_flags & QIB_S_WAIT_ACK) {
  1162. qp->s_flags &= ~QIB_S_WAIT_ACK;
  1163. qib_schedule_send(qp);
  1164. }
  1165. qib_get_credit(qp, aeth);
  1166. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  1167. qp->s_retry = qp->s_retry_cnt;
  1168. update_last_psn(qp, psn);
  1169. ret = 1;
  1170. goto bail;
  1171. case 1: /* RNR NAK */
  1172. ibp->n_rnr_naks++;
  1173. if (qp->s_acked == qp->s_tail)
  1174. goto bail;
  1175. if (qp->s_flags & QIB_S_WAIT_RNR)
  1176. goto bail;
  1177. if (qp->s_rnr_retry == 0) {
  1178. status = IB_WC_RNR_RETRY_EXC_ERR;
  1179. goto class_b;
  1180. }
  1181. if (qp->s_rnr_retry_cnt < 7)
  1182. qp->s_rnr_retry--;
  1183. /* The last valid PSN is the previous PSN. */
  1184. update_last_psn(qp, psn - 1);
  1185. ibp->n_rc_resends += (qp->s_psn - psn) & QIB_PSN_MASK;
  1186. reset_psn(qp, psn);
  1187. qp->s_flags &= ~(QIB_S_WAIT_SSN_CREDIT | QIB_S_WAIT_ACK);
  1188. qp->s_flags |= QIB_S_WAIT_RNR;
  1189. qp->s_timer.function = qib_rc_rnr_retry;
  1190. qp->s_timer.expires = jiffies + usecs_to_jiffies(
  1191. ib_qib_rnr_table[(aeth >> QIB_AETH_CREDIT_SHIFT) &
  1192. QIB_AETH_CREDIT_MASK]);
  1193. add_timer(&qp->s_timer);
  1194. goto bail;
  1195. case 3: /* NAK */
  1196. if (qp->s_acked == qp->s_tail)
  1197. goto bail;
  1198. /* The last valid PSN is the previous PSN. */
  1199. update_last_psn(qp, psn - 1);
  1200. switch ((aeth >> QIB_AETH_CREDIT_SHIFT) &
  1201. QIB_AETH_CREDIT_MASK) {
  1202. case 0: /* PSN sequence error */
  1203. ibp->n_seq_naks++;
  1204. /*
  1205. * Back up to the responder's expected PSN.
  1206. * Note that we might get a NAK in the middle of an
  1207. * RDMA READ response which terminates the RDMA
  1208. * READ.
  1209. */
  1210. qib_restart_rc(qp, psn, 0);
  1211. qib_schedule_send(qp);
  1212. break;
  1213. case 1: /* Invalid Request */
  1214. status = IB_WC_REM_INV_REQ_ERR;
  1215. ibp->n_other_naks++;
  1216. goto class_b;
  1217. case 2: /* Remote Access Error */
  1218. status = IB_WC_REM_ACCESS_ERR;
  1219. ibp->n_other_naks++;
  1220. goto class_b;
  1221. case 3: /* Remote Operation Error */
  1222. status = IB_WC_REM_OP_ERR;
  1223. ibp->n_other_naks++;
  1224. class_b:
  1225. if (qp->s_last == qp->s_acked) {
  1226. qib_send_complete(qp, wqe, status);
  1227. qib_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  1228. }
  1229. break;
  1230. default:
  1231. /* Ignore other reserved NAK error codes */
  1232. goto reserved;
  1233. }
  1234. qp->s_retry = qp->s_retry_cnt;
  1235. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  1236. goto bail;
  1237. default: /* 2: reserved */
  1238. reserved:
  1239. /* Ignore reserved NAK codes. */
  1240. goto bail;
  1241. }
  1242. bail:
  1243. return ret;
  1244. }
  1245. /*
  1246. * We have seen an out of sequence RDMA read middle or last packet.
  1247. * This ACKs SENDs and RDMA writes up to the first RDMA read or atomic SWQE.
  1248. */
  1249. static void rdma_seq_err(struct qib_qp *qp, struct qib_ibport *ibp, u32 psn,
  1250. struct qib_ctxtdata *rcd)
  1251. {
  1252. struct qib_swqe *wqe;
  1253. /* Remove QP from retry timer */
  1254. if (qp->s_flags & (QIB_S_TIMER | QIB_S_WAIT_RNR)) {
  1255. qp->s_flags &= ~(QIB_S_TIMER | QIB_S_WAIT_RNR);
  1256. del_timer(&qp->s_timer);
  1257. }
  1258. wqe = get_swqe_ptr(qp, qp->s_acked);
  1259. while (qib_cmp24(psn, wqe->lpsn) > 0) {
  1260. if (wqe->wr.opcode == IB_WR_RDMA_READ ||
  1261. wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1262. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)
  1263. break;
  1264. wqe = do_rc_completion(qp, wqe, ibp);
  1265. }
  1266. ibp->n_rdma_seq++;
  1267. qp->r_flags |= QIB_R_RDMAR_SEQ;
  1268. qib_restart_rc(qp, qp->s_last_psn + 1, 0);
  1269. if (list_empty(&qp->rspwait)) {
  1270. qp->r_flags |= QIB_R_RSP_SEND;
  1271. atomic_inc(&qp->refcount);
  1272. list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
  1273. }
  1274. }
  1275. /**
  1276. * qib_rc_rcv_resp - process an incoming RC response packet
  1277. * @ibp: the port this packet came in on
  1278. * @ohdr: the other headers for this packet
  1279. * @data: the packet data
  1280. * @tlen: the packet length
  1281. * @qp: the QP for this packet
  1282. * @opcode: the opcode for this packet
  1283. * @psn: the packet sequence number for this packet
  1284. * @hdrsize: the header length
  1285. * @pmtu: the path MTU
  1286. *
  1287. * This is called from qib_rc_rcv() to process an incoming RC response
  1288. * packet for the given QP.
  1289. * Called at interrupt level.
  1290. */
  1291. static void qib_rc_rcv_resp(struct qib_ibport *ibp,
  1292. struct qib_other_headers *ohdr,
  1293. void *data, u32 tlen,
  1294. struct qib_qp *qp,
  1295. u32 opcode,
  1296. u32 psn, u32 hdrsize, u32 pmtu,
  1297. struct qib_ctxtdata *rcd)
  1298. {
  1299. struct qib_swqe *wqe;
  1300. struct qib_pportdata *ppd = ppd_from_ibp(ibp);
  1301. enum ib_wc_status status;
  1302. unsigned long flags;
  1303. int diff;
  1304. u32 pad;
  1305. u32 aeth;
  1306. u64 val;
  1307. if (opcode != OP(RDMA_READ_RESPONSE_MIDDLE)) {
  1308. /*
  1309. * If ACK'd PSN on SDMA busy list try to make progress to
  1310. * reclaim SDMA credits.
  1311. */
  1312. if ((qib_cmp24(psn, qp->s_sending_psn) >= 0) &&
  1313. (qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) <= 0)) {
  1314. /*
  1315. * If send tasklet not running attempt to progress
  1316. * SDMA queue.
  1317. */
  1318. if (!(qp->s_flags & QIB_S_BUSY)) {
  1319. /* Acquire SDMA Lock */
  1320. spin_lock_irqsave(&ppd->sdma_lock, flags);
  1321. /* Invoke sdma make progress */
  1322. qib_sdma_make_progress(ppd);
  1323. /* Release SDMA Lock */
  1324. spin_unlock_irqrestore(&ppd->sdma_lock, flags);
  1325. }
  1326. }
  1327. }
  1328. spin_lock_irqsave(&qp->s_lock, flags);
  1329. if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_RECV_OK))
  1330. goto ack_done;
  1331. /* Ignore invalid responses. */
  1332. if (qib_cmp24(psn, qp->s_next_psn) >= 0)
  1333. goto ack_done;
  1334. /* Ignore duplicate responses. */
  1335. diff = qib_cmp24(psn, qp->s_last_psn);
  1336. if (unlikely(diff <= 0)) {
  1337. /* Update credits for "ghost" ACKs */
  1338. if (diff == 0 && opcode == OP(ACKNOWLEDGE)) {
  1339. aeth = be32_to_cpu(ohdr->u.aeth);
  1340. if ((aeth >> 29) == 0)
  1341. qib_get_credit(qp, aeth);
  1342. }
  1343. goto ack_done;
  1344. }
  1345. /*
  1346. * Skip everything other than the PSN we expect, if we are waiting
  1347. * for a reply to a restarted RDMA read or atomic op.
  1348. */
  1349. if (qp->r_flags & QIB_R_RDMAR_SEQ) {
  1350. if (qib_cmp24(psn, qp->s_last_psn + 1) != 0)
  1351. goto ack_done;
  1352. qp->r_flags &= ~QIB_R_RDMAR_SEQ;
  1353. }
  1354. if (unlikely(qp->s_acked == qp->s_tail))
  1355. goto ack_done;
  1356. wqe = get_swqe_ptr(qp, qp->s_acked);
  1357. status = IB_WC_SUCCESS;
  1358. switch (opcode) {
  1359. case OP(ACKNOWLEDGE):
  1360. case OP(ATOMIC_ACKNOWLEDGE):
  1361. case OP(RDMA_READ_RESPONSE_FIRST):
  1362. aeth = be32_to_cpu(ohdr->u.aeth);
  1363. if (opcode == OP(ATOMIC_ACKNOWLEDGE)) {
  1364. __be32 *p = ohdr->u.at.atomic_ack_eth;
  1365. val = ((u64) be32_to_cpu(p[0]) << 32) |
  1366. be32_to_cpu(p[1]);
  1367. } else
  1368. val = 0;
  1369. if (!do_rc_ack(qp, aeth, psn, opcode, val, rcd) ||
  1370. opcode != OP(RDMA_READ_RESPONSE_FIRST))
  1371. goto ack_done;
  1372. hdrsize += 4;
  1373. wqe = get_swqe_ptr(qp, qp->s_acked);
  1374. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1375. goto ack_op_err;
  1376. /*
  1377. * If this is a response to a resent RDMA read, we
  1378. * have to be careful to copy the data to the right
  1379. * location.
  1380. */
  1381. qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
  1382. wqe, psn, pmtu);
  1383. goto read_middle;
  1384. case OP(RDMA_READ_RESPONSE_MIDDLE):
  1385. /* no AETH, no ACK */
  1386. if (unlikely(qib_cmp24(psn, qp->s_last_psn + 1)))
  1387. goto ack_seq_err;
  1388. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1389. goto ack_op_err;
  1390. read_middle:
  1391. if (unlikely(tlen != (hdrsize + pmtu + 4)))
  1392. goto ack_len_err;
  1393. if (unlikely(pmtu >= qp->s_rdma_read_len))
  1394. goto ack_len_err;
  1395. /*
  1396. * We got a response so update the timeout.
  1397. * 4.096 usec. * (1 << qp->timeout)
  1398. */
  1399. qp->s_flags |= QIB_S_TIMER;
  1400. mod_timer(&qp->s_timer, jiffies + qp->timeout_jiffies);
  1401. if (qp->s_flags & QIB_S_WAIT_ACK) {
  1402. qp->s_flags &= ~QIB_S_WAIT_ACK;
  1403. qib_schedule_send(qp);
  1404. }
  1405. if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE))
  1406. qp->s_retry = qp->s_retry_cnt;
  1407. /*
  1408. * Update the RDMA receive state but do the copy w/o
  1409. * holding the locks and blocking interrupts.
  1410. */
  1411. qp->s_rdma_read_len -= pmtu;
  1412. update_last_psn(qp, psn);
  1413. spin_unlock_irqrestore(&qp->s_lock, flags);
  1414. qib_copy_sge(&qp->s_rdma_read_sge, data, pmtu, 0);
  1415. goto bail;
  1416. case OP(RDMA_READ_RESPONSE_ONLY):
  1417. aeth = be32_to_cpu(ohdr->u.aeth);
  1418. if (!do_rc_ack(qp, aeth, psn, opcode, 0, rcd))
  1419. goto ack_done;
  1420. /* Get the number of bytes the message was padded by. */
  1421. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1422. /*
  1423. * Check that the data size is >= 0 && <= pmtu.
  1424. * Remember to account for the AETH header (4) and
  1425. * ICRC (4).
  1426. */
  1427. if (unlikely(tlen < (hdrsize + pad + 8)))
  1428. goto ack_len_err;
  1429. /*
  1430. * If this is a response to a resent RDMA read, we
  1431. * have to be careful to copy the data to the right
  1432. * location.
  1433. */
  1434. wqe = get_swqe_ptr(qp, qp->s_acked);
  1435. qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
  1436. wqe, psn, pmtu);
  1437. goto read_last;
  1438. case OP(RDMA_READ_RESPONSE_LAST):
  1439. /* ACKs READ req. */
  1440. if (unlikely(qib_cmp24(psn, qp->s_last_psn + 1)))
  1441. goto ack_seq_err;
  1442. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1443. goto ack_op_err;
  1444. /* Get the number of bytes the message was padded by. */
  1445. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1446. /*
  1447. * Check that the data size is >= 1 && <= pmtu.
  1448. * Remember to account for the AETH header (4) and
  1449. * ICRC (4).
  1450. */
  1451. if (unlikely(tlen <= (hdrsize + pad + 8)))
  1452. goto ack_len_err;
  1453. read_last:
  1454. tlen -= hdrsize + pad + 8;
  1455. if (unlikely(tlen != qp->s_rdma_read_len))
  1456. goto ack_len_err;
  1457. aeth = be32_to_cpu(ohdr->u.aeth);
  1458. qib_copy_sge(&qp->s_rdma_read_sge, data, tlen, 0);
  1459. WARN_ON(qp->s_rdma_read_sge.num_sge);
  1460. (void) do_rc_ack(qp, aeth, psn,
  1461. OP(RDMA_READ_RESPONSE_LAST), 0, rcd);
  1462. goto ack_done;
  1463. }
  1464. ack_op_err:
  1465. status = IB_WC_LOC_QP_OP_ERR;
  1466. goto ack_err;
  1467. ack_seq_err:
  1468. rdma_seq_err(qp, ibp, psn, rcd);
  1469. goto ack_done;
  1470. ack_len_err:
  1471. status = IB_WC_LOC_LEN_ERR;
  1472. ack_err:
  1473. if (qp->s_last == qp->s_acked) {
  1474. qib_send_complete(qp, wqe, status);
  1475. qib_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  1476. }
  1477. ack_done:
  1478. spin_unlock_irqrestore(&qp->s_lock, flags);
  1479. bail:
  1480. return;
  1481. }
  1482. /**
  1483. * qib_rc_rcv_error - process an incoming duplicate or error RC packet
  1484. * @ohdr: the other headers for this packet
  1485. * @data: the packet data
  1486. * @qp: the QP for this packet
  1487. * @opcode: the opcode for this packet
  1488. * @psn: the packet sequence number for this packet
  1489. * @diff: the difference between the PSN and the expected PSN
  1490. *
  1491. * This is called from qib_rc_rcv() to process an unexpected
  1492. * incoming RC packet for the given QP.
  1493. * Called at interrupt level.
  1494. * Return 1 if no more processing is needed; otherwise return 0 to
  1495. * schedule a response to be sent.
  1496. */
  1497. static int qib_rc_rcv_error(struct qib_other_headers *ohdr,
  1498. void *data,
  1499. struct qib_qp *qp,
  1500. u32 opcode,
  1501. u32 psn,
  1502. int diff,
  1503. struct qib_ctxtdata *rcd)
  1504. {
  1505. struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  1506. struct qib_ack_entry *e;
  1507. unsigned long flags;
  1508. u8 i, prev;
  1509. int old_req;
  1510. if (diff > 0) {
  1511. /*
  1512. * Packet sequence error.
  1513. * A NAK will ACK earlier sends and RDMA writes.
  1514. * Don't queue the NAK if we already sent one.
  1515. */
  1516. if (!qp->r_nak_state) {
  1517. ibp->n_rc_seqnak++;
  1518. qp->r_nak_state = IB_NAK_PSN_ERROR;
  1519. /* Use the expected PSN. */
  1520. qp->r_ack_psn = qp->r_psn;
  1521. /*
  1522. * Wait to send the sequence NAK until all packets
  1523. * in the receive queue have been processed.
  1524. * Otherwise, we end up propagating congestion.
  1525. */
  1526. if (list_empty(&qp->rspwait)) {
  1527. qp->r_flags |= QIB_R_RSP_NAK;
  1528. atomic_inc(&qp->refcount);
  1529. list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
  1530. }
  1531. }
  1532. goto done;
  1533. }
  1534. /*
  1535. * Handle a duplicate request. Don't re-execute SEND, RDMA
  1536. * write or atomic op. Don't NAK errors, just silently drop
  1537. * the duplicate request. Note that r_sge, r_len, and
  1538. * r_rcv_len may be in use so don't modify them.
  1539. *
  1540. * We are supposed to ACK the earliest duplicate PSN but we
  1541. * can coalesce an outstanding duplicate ACK. We have to
  1542. * send the earliest so that RDMA reads can be restarted at
  1543. * the requester's expected PSN.
  1544. *
  1545. * First, find where this duplicate PSN falls within the
  1546. * ACKs previously sent.
  1547. * old_req is true if there is an older response that is scheduled
  1548. * to be sent before sending this one.
  1549. */
  1550. e = NULL;
  1551. old_req = 1;
  1552. ibp->n_rc_dupreq++;
  1553. spin_lock_irqsave(&qp->s_lock, flags);
  1554. for (i = qp->r_head_ack_queue; ; i = prev) {
  1555. if (i == qp->s_tail_ack_queue)
  1556. old_req = 0;
  1557. if (i)
  1558. prev = i - 1;
  1559. else
  1560. prev = QIB_MAX_RDMA_ATOMIC;
  1561. if (prev == qp->r_head_ack_queue) {
  1562. e = NULL;
  1563. break;
  1564. }
  1565. e = &qp->s_ack_queue[prev];
  1566. if (!e->opcode) {
  1567. e = NULL;
  1568. break;
  1569. }
  1570. if (qib_cmp24(psn, e->psn) >= 0) {
  1571. if (prev == qp->s_tail_ack_queue &&
  1572. qib_cmp24(psn, e->lpsn) <= 0)
  1573. old_req = 0;
  1574. break;
  1575. }
  1576. }
  1577. switch (opcode) {
  1578. case OP(RDMA_READ_REQUEST): {
  1579. struct ib_reth *reth;
  1580. u32 offset;
  1581. u32 len;
  1582. /*
  1583. * If we didn't find the RDMA read request in the ack queue,
  1584. * we can ignore this request.
  1585. */
  1586. if (!e || e->opcode != OP(RDMA_READ_REQUEST))
  1587. goto unlock_done;
  1588. /* RETH comes after BTH */
  1589. reth = &ohdr->u.rc.reth;
  1590. /*
  1591. * Address range must be a subset of the original
  1592. * request and start on pmtu boundaries.
  1593. * We reuse the old ack_queue slot since the requester
  1594. * should not back up and request an earlier PSN for the
  1595. * same request.
  1596. */
  1597. offset = ((psn - e->psn) & QIB_PSN_MASK) *
  1598. qp->pmtu;
  1599. len = be32_to_cpu(reth->length);
  1600. if (unlikely(offset + len != e->rdma_sge.sge_length))
  1601. goto unlock_done;
  1602. if (e->rdma_sge.mr) {
  1603. qib_put_mr(e->rdma_sge.mr);
  1604. e->rdma_sge.mr = NULL;
  1605. }
  1606. if (len != 0) {
  1607. u32 rkey = be32_to_cpu(reth->rkey);
  1608. u64 vaddr = be64_to_cpu(reth->vaddr);
  1609. int ok;
  1610. ok = qib_rkey_ok(qp, &e->rdma_sge, len, vaddr, rkey,
  1611. IB_ACCESS_REMOTE_READ);
  1612. if (unlikely(!ok))
  1613. goto unlock_done;
  1614. } else {
  1615. e->rdma_sge.vaddr = NULL;
  1616. e->rdma_sge.length = 0;
  1617. e->rdma_sge.sge_length = 0;
  1618. }
  1619. e->psn = psn;
  1620. if (old_req)
  1621. goto unlock_done;
  1622. qp->s_tail_ack_queue = prev;
  1623. break;
  1624. }
  1625. case OP(COMPARE_SWAP):
  1626. case OP(FETCH_ADD): {
  1627. /*
  1628. * If we didn't find the atomic request in the ack queue
  1629. * or the send tasklet is already backed up to send an
  1630. * earlier entry, we can ignore this request.
  1631. */
  1632. if (!e || e->opcode != (u8) opcode || old_req)
  1633. goto unlock_done;
  1634. qp->s_tail_ack_queue = prev;
  1635. break;
  1636. }
  1637. default:
  1638. /*
  1639. * Ignore this operation if it doesn't request an ACK
  1640. * or an earlier RDMA read or atomic is going to be resent.
  1641. */
  1642. if (!(psn & IB_BTH_REQ_ACK) || old_req)
  1643. goto unlock_done;
  1644. /*
  1645. * Resend the most recent ACK if this request is
  1646. * after all the previous RDMA reads and atomics.
  1647. */
  1648. if (i == qp->r_head_ack_queue) {
  1649. spin_unlock_irqrestore(&qp->s_lock, flags);
  1650. qp->r_nak_state = 0;
  1651. qp->r_ack_psn = qp->r_psn - 1;
  1652. goto send_ack;
  1653. }
  1654. /*
  1655. * Try to send a simple ACK to work around a Mellanox bug
  1656. * which doesn't accept a RDMA read response or atomic
  1657. * response as an ACK for earlier SENDs or RDMA writes.
  1658. */
  1659. if (!(qp->s_flags & QIB_S_RESP_PENDING)) {
  1660. spin_unlock_irqrestore(&qp->s_lock, flags);
  1661. qp->r_nak_state = 0;
  1662. qp->r_ack_psn = qp->s_ack_queue[i].psn - 1;
  1663. goto send_ack;
  1664. }
  1665. /*
  1666. * Resend the RDMA read or atomic op which
  1667. * ACKs this duplicate request.
  1668. */
  1669. qp->s_tail_ack_queue = i;
  1670. break;
  1671. }
  1672. qp->s_ack_state = OP(ACKNOWLEDGE);
  1673. qp->s_flags |= QIB_S_RESP_PENDING;
  1674. qp->r_nak_state = 0;
  1675. qib_schedule_send(qp);
  1676. unlock_done:
  1677. spin_unlock_irqrestore(&qp->s_lock, flags);
  1678. done:
  1679. return 1;
  1680. send_ack:
  1681. return 0;
  1682. }
  1683. void qib_rc_error(struct qib_qp *qp, enum ib_wc_status err)
  1684. {
  1685. unsigned long flags;
  1686. int lastwqe;
  1687. spin_lock_irqsave(&qp->s_lock, flags);
  1688. lastwqe = qib_error_qp(qp, err);
  1689. spin_unlock_irqrestore(&qp->s_lock, flags);
  1690. if (lastwqe) {
  1691. struct ib_event ev;
  1692. ev.device = qp->ibqp.device;
  1693. ev.element.qp = &qp->ibqp;
  1694. ev.event = IB_EVENT_QP_LAST_WQE_REACHED;
  1695. qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
  1696. }
  1697. }
  1698. static inline void qib_update_ack_queue(struct qib_qp *qp, unsigned n)
  1699. {
  1700. unsigned next;
  1701. next = n + 1;
  1702. if (next > QIB_MAX_RDMA_ATOMIC)
  1703. next = 0;
  1704. qp->s_tail_ack_queue = next;
  1705. qp->s_ack_state = OP(ACKNOWLEDGE);
  1706. }
  1707. /**
  1708. * qib_rc_rcv - process an incoming RC packet
  1709. * @rcd: the context pointer
  1710. * @hdr: the header of this packet
  1711. * @has_grh: true if the header has a GRH
  1712. * @data: the packet data
  1713. * @tlen: the packet length
  1714. * @qp: the QP for this packet
  1715. *
  1716. * This is called from qib_qp_rcv() to process an incoming RC packet
  1717. * for the given QP.
  1718. * Called at interrupt level.
  1719. */
  1720. void qib_rc_rcv(struct qib_ctxtdata *rcd, struct qib_ib_header *hdr,
  1721. int has_grh, void *data, u32 tlen, struct qib_qp *qp)
  1722. {
  1723. struct qib_ibport *ibp = &rcd->ppd->ibport_data;
  1724. struct qib_other_headers *ohdr;
  1725. u32 opcode;
  1726. u32 hdrsize;
  1727. u32 psn;
  1728. u32 pad;
  1729. struct ib_wc wc;
  1730. u32 pmtu = qp->pmtu;
  1731. int diff;
  1732. struct ib_reth *reth;
  1733. unsigned long flags;
  1734. int ret;
  1735. /* Check for GRH */
  1736. if (!has_grh) {
  1737. ohdr = &hdr->u.oth;
  1738. hdrsize = 8 + 12; /* LRH + BTH */
  1739. } else {
  1740. ohdr = &hdr->u.l.oth;
  1741. hdrsize = 8 + 40 + 12; /* LRH + GRH + BTH */
  1742. }
  1743. opcode = be32_to_cpu(ohdr->bth[0]);
  1744. if (qib_ruc_check_hdr(ibp, hdr, has_grh, qp, opcode))
  1745. return;
  1746. psn = be32_to_cpu(ohdr->bth[2]);
  1747. opcode >>= 24;
  1748. /*
  1749. * Process responses (ACKs) before anything else. Note that the
  1750. * packet sequence number will be for something in the send work
  1751. * queue rather than the expected receive packet sequence number.
  1752. * In other words, this QP is the requester.
  1753. */
  1754. if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
  1755. opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
  1756. qib_rc_rcv_resp(ibp, ohdr, data, tlen, qp, opcode, psn,
  1757. hdrsize, pmtu, rcd);
  1758. return;
  1759. }
  1760. /* Compute 24 bits worth of difference. */
  1761. diff = qib_cmp24(psn, qp->r_psn);
  1762. if (unlikely(diff)) {
  1763. if (qib_rc_rcv_error(ohdr, data, qp, opcode, psn, diff, rcd))
  1764. return;
  1765. goto send_ack;
  1766. }
  1767. /* Check for opcode sequence errors. */
  1768. switch (qp->r_state) {
  1769. case OP(SEND_FIRST):
  1770. case OP(SEND_MIDDLE):
  1771. if (opcode == OP(SEND_MIDDLE) ||
  1772. opcode == OP(SEND_LAST) ||
  1773. opcode == OP(SEND_LAST_WITH_IMMEDIATE))
  1774. break;
  1775. goto nack_inv;
  1776. case OP(RDMA_WRITE_FIRST):
  1777. case OP(RDMA_WRITE_MIDDLE):
  1778. if (opcode == OP(RDMA_WRITE_MIDDLE) ||
  1779. opcode == OP(RDMA_WRITE_LAST) ||
  1780. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1781. break;
  1782. goto nack_inv;
  1783. default:
  1784. if (opcode == OP(SEND_MIDDLE) ||
  1785. opcode == OP(SEND_LAST) ||
  1786. opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
  1787. opcode == OP(RDMA_WRITE_MIDDLE) ||
  1788. opcode == OP(RDMA_WRITE_LAST) ||
  1789. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1790. goto nack_inv;
  1791. /*
  1792. * Note that it is up to the requester to not send a new
  1793. * RDMA read or atomic operation before receiving an ACK
  1794. * for the previous operation.
  1795. */
  1796. break;
  1797. }
  1798. if (qp->state == IB_QPS_RTR && !(qp->r_flags & QIB_R_COMM_EST)) {
  1799. qp->r_flags |= QIB_R_COMM_EST;
  1800. if (qp->ibqp.event_handler) {
  1801. struct ib_event ev;
  1802. ev.device = qp->ibqp.device;
  1803. ev.element.qp = &qp->ibqp;
  1804. ev.event = IB_EVENT_COMM_EST;
  1805. qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
  1806. }
  1807. }
  1808. /* OK, process the packet. */
  1809. switch (opcode) {
  1810. case OP(SEND_FIRST):
  1811. ret = qib_get_rwqe(qp, 0);
  1812. if (ret < 0)
  1813. goto nack_op_err;
  1814. if (!ret)
  1815. goto rnr_nak;
  1816. qp->r_rcv_len = 0;
  1817. /* FALLTHROUGH */
  1818. case OP(SEND_MIDDLE):
  1819. case OP(RDMA_WRITE_MIDDLE):
  1820. send_middle:
  1821. /* Check for invalid length PMTU or posted rwqe len. */
  1822. if (unlikely(tlen != (hdrsize + pmtu + 4)))
  1823. goto nack_inv;
  1824. qp->r_rcv_len += pmtu;
  1825. if (unlikely(qp->r_rcv_len > qp->r_len))
  1826. goto nack_inv;
  1827. qib_copy_sge(&qp->r_sge, data, pmtu, 1);
  1828. break;
  1829. case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
  1830. /* consume RWQE */
  1831. ret = qib_get_rwqe(qp, 1);
  1832. if (ret < 0)
  1833. goto nack_op_err;
  1834. if (!ret)
  1835. goto rnr_nak;
  1836. goto send_last_imm;
  1837. case OP(SEND_ONLY):
  1838. case OP(SEND_ONLY_WITH_IMMEDIATE):
  1839. ret = qib_get_rwqe(qp, 0);
  1840. if (ret < 0)
  1841. goto nack_op_err;
  1842. if (!ret)
  1843. goto rnr_nak;
  1844. qp->r_rcv_len = 0;
  1845. if (opcode == OP(SEND_ONLY))
  1846. goto no_immediate_data;
  1847. /* FALLTHROUGH for SEND_ONLY_WITH_IMMEDIATE */
  1848. case OP(SEND_LAST_WITH_IMMEDIATE):
  1849. send_last_imm:
  1850. wc.ex.imm_data = ohdr->u.imm_data;
  1851. hdrsize += 4;
  1852. wc.wc_flags = IB_WC_WITH_IMM;
  1853. goto send_last;
  1854. case OP(SEND_LAST):
  1855. case OP(RDMA_WRITE_LAST):
  1856. no_immediate_data:
  1857. wc.wc_flags = 0;
  1858. wc.ex.imm_data = 0;
  1859. send_last:
  1860. /* Get the number of bytes the message was padded by. */
  1861. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1862. /* Check for invalid length. */
  1863. /* XXX LAST len should be >= 1 */
  1864. if (unlikely(tlen < (hdrsize + pad + 4)))
  1865. goto nack_inv;
  1866. /* Don't count the CRC. */
  1867. tlen -= (hdrsize + pad + 4);
  1868. wc.byte_len = tlen + qp->r_rcv_len;
  1869. if (unlikely(wc.byte_len > qp->r_len))
  1870. goto nack_inv;
  1871. qib_copy_sge(&qp->r_sge, data, tlen, 1);
  1872. qib_put_ss(&qp->r_sge);
  1873. qp->r_msn++;
  1874. if (!test_and_clear_bit(QIB_R_WRID_VALID, &qp->r_aflags))
  1875. break;
  1876. wc.wr_id = qp->r_wr_id;
  1877. wc.status = IB_WC_SUCCESS;
  1878. if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) ||
  1879. opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))
  1880. wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
  1881. else
  1882. wc.opcode = IB_WC_RECV;
  1883. wc.qp = &qp->ibqp;
  1884. wc.src_qp = qp->remote_qpn;
  1885. wc.slid = qp->remote_ah_attr.dlid;
  1886. wc.sl = qp->remote_ah_attr.sl;
  1887. /* zero fields that are N/A */
  1888. wc.vendor_err = 0;
  1889. wc.pkey_index = 0;
  1890. wc.dlid_path_bits = 0;
  1891. wc.port_num = 0;
  1892. /* Signal completion event if the solicited bit is set. */
  1893. qib_cq_enter(to_icq(qp->ibqp.recv_cq), &wc,
  1894. (ohdr->bth[0] &
  1895. cpu_to_be32(IB_BTH_SOLICITED)) != 0);
  1896. break;
  1897. case OP(RDMA_WRITE_FIRST):
  1898. case OP(RDMA_WRITE_ONLY):
  1899. case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
  1900. if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_WRITE)))
  1901. goto nack_inv;
  1902. /* consume RWQE */
  1903. reth = &ohdr->u.rc.reth;
  1904. hdrsize += sizeof(*reth);
  1905. qp->r_len = be32_to_cpu(reth->length);
  1906. qp->r_rcv_len = 0;
  1907. qp->r_sge.sg_list = NULL;
  1908. if (qp->r_len != 0) {
  1909. u32 rkey = be32_to_cpu(reth->rkey);
  1910. u64 vaddr = be64_to_cpu(reth->vaddr);
  1911. int ok;
  1912. /* Check rkey & NAK */
  1913. ok = qib_rkey_ok(qp, &qp->r_sge.sge, qp->r_len, vaddr,
  1914. rkey, IB_ACCESS_REMOTE_WRITE);
  1915. if (unlikely(!ok))
  1916. goto nack_acc;
  1917. qp->r_sge.num_sge = 1;
  1918. } else {
  1919. qp->r_sge.num_sge = 0;
  1920. qp->r_sge.sge.mr = NULL;
  1921. qp->r_sge.sge.vaddr = NULL;
  1922. qp->r_sge.sge.length = 0;
  1923. qp->r_sge.sge.sge_length = 0;
  1924. }
  1925. if (opcode == OP(RDMA_WRITE_FIRST))
  1926. goto send_middle;
  1927. else if (opcode == OP(RDMA_WRITE_ONLY))
  1928. goto no_immediate_data;
  1929. ret = qib_get_rwqe(qp, 1);
  1930. if (ret < 0)
  1931. goto nack_op_err;
  1932. if (!ret)
  1933. goto rnr_nak;
  1934. wc.ex.imm_data = ohdr->u.rc.imm_data;
  1935. hdrsize += 4;
  1936. wc.wc_flags = IB_WC_WITH_IMM;
  1937. goto send_last;
  1938. case OP(RDMA_READ_REQUEST): {
  1939. struct qib_ack_entry *e;
  1940. u32 len;
  1941. u8 next;
  1942. if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_READ)))
  1943. goto nack_inv;
  1944. next = qp->r_head_ack_queue + 1;
  1945. /* s_ack_queue is size QIB_MAX_RDMA_ATOMIC+1 so use > not >= */
  1946. if (next > QIB_MAX_RDMA_ATOMIC)
  1947. next = 0;
  1948. spin_lock_irqsave(&qp->s_lock, flags);
  1949. if (unlikely(next == qp->s_tail_ack_queue)) {
  1950. if (!qp->s_ack_queue[next].sent)
  1951. goto nack_inv_unlck;
  1952. qib_update_ack_queue(qp, next);
  1953. }
  1954. e = &qp->s_ack_queue[qp->r_head_ack_queue];
  1955. if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) {
  1956. qib_put_mr(e->rdma_sge.mr);
  1957. e->rdma_sge.mr = NULL;
  1958. }
  1959. reth = &ohdr->u.rc.reth;
  1960. len = be32_to_cpu(reth->length);
  1961. if (len) {
  1962. u32 rkey = be32_to_cpu(reth->rkey);
  1963. u64 vaddr = be64_to_cpu(reth->vaddr);
  1964. int ok;
  1965. /* Check rkey & NAK */
  1966. ok = qib_rkey_ok(qp, &e->rdma_sge, len, vaddr,
  1967. rkey, IB_ACCESS_REMOTE_READ);
  1968. if (unlikely(!ok))
  1969. goto nack_acc_unlck;
  1970. /*
  1971. * Update the next expected PSN. We add 1 later
  1972. * below, so only add the remainder here.
  1973. */
  1974. if (len > pmtu)
  1975. qp->r_psn += (len - 1) / pmtu;
  1976. } else {
  1977. e->rdma_sge.mr = NULL;
  1978. e->rdma_sge.vaddr = NULL;
  1979. e->rdma_sge.length = 0;
  1980. e->rdma_sge.sge_length = 0;
  1981. }
  1982. e->opcode = opcode;
  1983. e->sent = 0;
  1984. e->psn = psn;
  1985. e->lpsn = qp->r_psn;
  1986. /*
  1987. * We need to increment the MSN here instead of when we
  1988. * finish sending the result since a duplicate request would
  1989. * increment it more than once.
  1990. */
  1991. qp->r_msn++;
  1992. qp->r_psn++;
  1993. qp->r_state = opcode;
  1994. qp->r_nak_state = 0;
  1995. qp->r_head_ack_queue = next;
  1996. /* Schedule the send tasklet. */
  1997. qp->s_flags |= QIB_S_RESP_PENDING;
  1998. qib_schedule_send(qp);
  1999. goto sunlock;
  2000. }
  2001. case OP(COMPARE_SWAP):
  2002. case OP(FETCH_ADD): {
  2003. struct ib_atomic_eth *ateth;
  2004. struct qib_ack_entry *e;
  2005. u64 vaddr;
  2006. atomic64_t *maddr;
  2007. u64 sdata;
  2008. u32 rkey;
  2009. u8 next;
  2010. if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC)))
  2011. goto nack_inv;
  2012. next = qp->r_head_ack_queue + 1;
  2013. if (next > QIB_MAX_RDMA_ATOMIC)
  2014. next = 0;
  2015. spin_lock_irqsave(&qp->s_lock, flags);
  2016. if (unlikely(next == qp->s_tail_ack_queue)) {
  2017. if (!qp->s_ack_queue[next].sent)
  2018. goto nack_inv_unlck;
  2019. qib_update_ack_queue(qp, next);
  2020. }
  2021. e = &qp->s_ack_queue[qp->r_head_ack_queue];
  2022. if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) {
  2023. qib_put_mr(e->rdma_sge.mr);
  2024. e->rdma_sge.mr = NULL;
  2025. }
  2026. ateth = &ohdr->u.atomic_eth;
  2027. vaddr = ((u64) be32_to_cpu(ateth->vaddr[0]) << 32) |
  2028. be32_to_cpu(ateth->vaddr[1]);
  2029. if (unlikely(vaddr & (sizeof(u64) - 1)))
  2030. goto nack_inv_unlck;
  2031. rkey = be32_to_cpu(ateth->rkey);
  2032. /* Check rkey & NAK */
  2033. if (unlikely(!qib_rkey_ok(qp, &qp->r_sge.sge, sizeof(u64),
  2034. vaddr, rkey,
  2035. IB_ACCESS_REMOTE_ATOMIC)))
  2036. goto nack_acc_unlck;
  2037. /* Perform atomic OP and save result. */
  2038. maddr = (atomic64_t *) qp->r_sge.sge.vaddr;
  2039. sdata = be64_to_cpu(ateth->swap_data);
  2040. e->atomic_data = (opcode == OP(FETCH_ADD)) ?
  2041. (u64) atomic64_add_return(sdata, maddr) - sdata :
  2042. (u64) cmpxchg((u64 *) qp->r_sge.sge.vaddr,
  2043. be64_to_cpu(ateth->compare_data),
  2044. sdata);
  2045. qib_put_mr(qp->r_sge.sge.mr);
  2046. qp->r_sge.num_sge = 0;
  2047. e->opcode = opcode;
  2048. e->sent = 0;
  2049. e->psn = psn;
  2050. e->lpsn = psn;
  2051. qp->r_msn++;
  2052. qp->r_psn++;
  2053. qp->r_state = opcode;
  2054. qp->r_nak_state = 0;
  2055. qp->r_head_ack_queue = next;
  2056. /* Schedule the send tasklet. */
  2057. qp->s_flags |= QIB_S_RESP_PENDING;
  2058. qib_schedule_send(qp);
  2059. goto sunlock;
  2060. }
  2061. default:
  2062. /* NAK unknown opcodes. */
  2063. goto nack_inv;
  2064. }
  2065. qp->r_psn++;
  2066. qp->r_state = opcode;
  2067. qp->r_ack_psn = psn;
  2068. qp->r_nak_state = 0;
  2069. /* Send an ACK if requested or required. */
  2070. if (psn & (1 << 31))
  2071. goto send_ack;
  2072. return;
  2073. rnr_nak:
  2074. qp->r_nak_state = IB_RNR_NAK | qp->r_min_rnr_timer;
  2075. qp->r_ack_psn = qp->r_psn;
  2076. /* Queue RNR NAK for later */
  2077. if (list_empty(&qp->rspwait)) {
  2078. qp->r_flags |= QIB_R_RSP_NAK;
  2079. atomic_inc(&qp->refcount);
  2080. list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
  2081. }
  2082. return;
  2083. nack_op_err:
  2084. qib_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
  2085. qp->r_nak_state = IB_NAK_REMOTE_OPERATIONAL_ERROR;
  2086. qp->r_ack_psn = qp->r_psn;
  2087. /* Queue NAK for later */
  2088. if (list_empty(&qp->rspwait)) {
  2089. qp->r_flags |= QIB_R_RSP_NAK;
  2090. atomic_inc(&qp->refcount);
  2091. list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
  2092. }
  2093. return;
  2094. nack_inv_unlck:
  2095. spin_unlock_irqrestore(&qp->s_lock, flags);
  2096. nack_inv:
  2097. qib_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
  2098. qp->r_nak_state = IB_NAK_INVALID_REQUEST;
  2099. qp->r_ack_psn = qp->r_psn;
  2100. /* Queue NAK for later */
  2101. if (list_empty(&qp->rspwait)) {
  2102. qp->r_flags |= QIB_R_RSP_NAK;
  2103. atomic_inc(&qp->refcount);
  2104. list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
  2105. }
  2106. return;
  2107. nack_acc_unlck:
  2108. spin_unlock_irqrestore(&qp->s_lock, flags);
  2109. nack_acc:
  2110. qib_rc_error(qp, IB_WC_LOC_PROT_ERR);
  2111. qp->r_nak_state = IB_NAK_REMOTE_ACCESS_ERROR;
  2112. qp->r_ack_psn = qp->r_psn;
  2113. send_ack:
  2114. qib_send_rc_ack(qp);
  2115. return;
  2116. sunlock:
  2117. spin_unlock_irqrestore(&qp->s_lock, flags);
  2118. }