ops-sh5.c 1.4 KB

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  1. /*
  2. * Support functions for the SH5 PCI hardware.
  3. *
  4. * Copyright (C) 2001 David J. Mckay (david.mckay@st.com)
  5. * Copyright (C) 2003, 2004 Paul Mundt
  6. * Copyright (C) 2004 Richard Curnow
  7. *
  8. * May be copied or modified under the terms of the GNU General Public
  9. * License. See linux/COPYING for more information.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/rwsem.h>
  13. #include <linux/smp.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/init.h>
  16. #include <linux/errno.h>
  17. #include <linux/pci.h>
  18. #include <linux/delay.h>
  19. #include <linux/types.h>
  20. #include <linux/irq.h>
  21. #include <asm/io.h>
  22. #include "pci-sh5.h"
  23. static int sh5pci_read(struct pci_bus *bus, unsigned int devfn, int where,
  24. int size, u32 *val)
  25. {
  26. SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where));
  27. switch (size) {
  28. case 1:
  29. *val = (u8)SH5PCI_READ_BYTE(PDR + (where & 3));
  30. break;
  31. case 2:
  32. *val = (u16)SH5PCI_READ_SHORT(PDR + (where & 2));
  33. break;
  34. case 4:
  35. *val = SH5PCI_READ(PDR);
  36. break;
  37. }
  38. return PCIBIOS_SUCCESSFUL;
  39. }
  40. static int sh5pci_write(struct pci_bus *bus, unsigned int devfn, int where,
  41. int size, u32 val)
  42. {
  43. SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where));
  44. switch (size) {
  45. case 1:
  46. SH5PCI_WRITE_BYTE(PDR + (where & 3), (u8)val);
  47. break;
  48. case 2:
  49. SH5PCI_WRITE_SHORT(PDR + (where & 2), (u16)val);
  50. break;
  51. case 4:
  52. SH5PCI_WRITE(PDR, val);
  53. break;
  54. }
  55. return PCIBIOS_SUCCESSFUL;
  56. }
  57. struct pci_ops sh5_pci_ops = {
  58. .read = sh5pci_read,
  59. .write = sh5pci_write,
  60. };