vf610-adc.txt 1.1 KB

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  1. Freescale vf610 Analog to Digital Converter bindings
  2. The devicetree bindings are for the new ADC driver written for
  3. vf610/i.MX6slx and upward SoCs from Freescale.
  4. Required properties:
  5. - compatible: Should contain "fsl,vf610-adc"
  6. - reg: Offset and length of the register set for the device
  7. - interrupts: Should contain the interrupt for the device
  8. - clocks: The clock is needed by the ADC controller, ADC clock source is ipg clock.
  9. - clock-names: Must contain "adc", matching entry in the clocks property.
  10. - vref-supply: The regulator supply ADC reference voltage.
  11. Recommended properties:
  12. - fsl,adck-max-frequency: Maximum frequencies according to datasheets operating
  13. requirements. Three values are required, depending on conversion mode:
  14. - Frequency in normal mode (ADLPC=0, ADHSC=0)
  15. - Frequency in high-speed mode (ADLPC=0, ADHSC=1)
  16. - Frequency in low-power mode (ADLPC=1, ADHSC=0)
  17. Example:
  18. adc0: adc@4003b000 {
  19. compatible = "fsl,vf610-adc";
  20. reg = <0x4003b000 0x1000>;
  21. interrupts = <0 53 0x04>;
  22. clocks = <&clks VF610_CLK_ADC0>;
  23. clock-names = "adc";
  24. fsl,adck-max-frequency = <30000000>, <40000000>,
  25. <20000000>;
  26. vref-supply = <&reg_vcc_3v3_mcu>;
  27. };