vermilion.c 28 KB

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  1. /*
  2. * Copyright (c) Intel Corp. 2007.
  3. * All Rights Reserved.
  4. *
  5. * Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
  6. * develop this driver.
  7. *
  8. * This file is part of the Vermilion Range fb driver.
  9. * The Vermilion Range fb driver is free software;
  10. * you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * The Vermilion Range fb driver is distributed
  16. * in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this driver; if not, write to the Free Software
  23. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  24. *
  25. * Authors:
  26. * Thomas Hellström <thomas-at-tungstengraphics-dot-com>
  27. * Michel Dänzer <michel-at-tungstengraphics-dot-com>
  28. * Alan Hourihane <alanh-at-tungstengraphics-dot-com>
  29. */
  30. #include <linux/module.h>
  31. #include <linux/kernel.h>
  32. #include <linux/errno.h>
  33. #include <linux/string.h>
  34. #include <linux/delay.h>
  35. #include <linux/slab.h>
  36. #include <linux/mm.h>
  37. #include <linux/fb.h>
  38. #include <linux/pci.h>
  39. #include <asm/cacheflush.h>
  40. #include <asm/tlbflush.h>
  41. #include <linux/mmzone.h>
  42. /* #define VERMILION_DEBUG */
  43. #include "vermilion.h"
  44. #define MODULE_NAME "vmlfb"
  45. #define VML_TOHW(_val, _width) ((((_val) << (_width)) + 0x7FFF - (_val)) >> 16)
  46. static struct mutex vml_mutex;
  47. static struct list_head global_no_mode;
  48. static struct list_head global_has_mode;
  49. static struct fb_ops vmlfb_ops;
  50. static struct vml_sys *subsys = NULL;
  51. static char *vml_default_mode = "1024x768@60";
  52. static struct fb_videomode defaultmode = {
  53. NULL, 60, 1024, 768, 12896, 144, 24, 29, 3, 136, 6,
  54. 0, FB_VMODE_NONINTERLACED
  55. };
  56. static u32 vml_mem_requested = (10 * 1024 * 1024);
  57. static u32 vml_mem_contig = (4 * 1024 * 1024);
  58. static u32 vml_mem_min = (4 * 1024 * 1024);
  59. static u32 vml_clocks[] = {
  60. 6750,
  61. 13500,
  62. 27000,
  63. 29700,
  64. 37125,
  65. 54000,
  66. 59400,
  67. 74250,
  68. 120000,
  69. 148500
  70. };
  71. static u32 vml_num_clocks = ARRAY_SIZE(vml_clocks);
  72. /*
  73. * Allocate a contiguous vram area and make its linear kernel map
  74. * uncached.
  75. */
  76. static int vmlfb_alloc_vram_area(struct vram_area *va, unsigned max_order,
  77. unsigned min_order)
  78. {
  79. gfp_t flags;
  80. unsigned long i;
  81. max_order++;
  82. do {
  83. /*
  84. * Really try hard to get the needed memory.
  85. * We need memory below the first 32MB, so we
  86. * add the __GFP_DMA flag that guarantees that we are
  87. * below the first 16MB.
  88. */
  89. flags = __GFP_DMA | __GFP_HIGH;
  90. va->logical =
  91. __get_free_pages(flags, --max_order);
  92. } while (va->logical == 0 && max_order > min_order);
  93. if (!va->logical)
  94. return -ENOMEM;
  95. va->phys = virt_to_phys((void *)va->logical);
  96. va->size = PAGE_SIZE << max_order;
  97. va->order = max_order;
  98. /*
  99. * It seems like __get_free_pages only ups the usage count
  100. * of the first page. This doesn't work with fault mapping, so
  101. * up the usage count once more (XXX: should use split_page or
  102. * compound page).
  103. */
  104. memset((void *)va->logical, 0x00, va->size);
  105. for (i = va->logical; i < va->logical + va->size; i += PAGE_SIZE) {
  106. get_page(virt_to_page(i));
  107. }
  108. /*
  109. * Change caching policy of the linear kernel map to avoid
  110. * mapping type conflicts with user-space mappings.
  111. */
  112. set_pages_uc(virt_to_page(va->logical), va->size >> PAGE_SHIFT);
  113. printk(KERN_DEBUG MODULE_NAME
  114. ": Allocated %ld bytes vram area at 0x%08lx\n",
  115. va->size, va->phys);
  116. return 0;
  117. }
  118. /*
  119. * Free a contiguous vram area and reset its linear kernel map
  120. * mapping type.
  121. */
  122. static void vmlfb_free_vram_area(struct vram_area *va)
  123. {
  124. unsigned long j;
  125. if (va->logical) {
  126. /*
  127. * Reset the linear kernel map caching policy.
  128. */
  129. set_pages_wb(virt_to_page(va->logical),
  130. va->size >> PAGE_SHIFT);
  131. /*
  132. * Decrease the usage count on the pages we've used
  133. * to compensate for upping when allocating.
  134. */
  135. for (j = va->logical; j < va->logical + va->size;
  136. j += PAGE_SIZE) {
  137. (void)put_page_testzero(virt_to_page(j));
  138. }
  139. printk(KERN_DEBUG MODULE_NAME
  140. ": Freeing %ld bytes vram area at 0x%08lx\n",
  141. va->size, va->phys);
  142. free_pages(va->logical, va->order);
  143. va->logical = 0;
  144. }
  145. }
  146. /*
  147. * Free allocated vram.
  148. */
  149. static void vmlfb_free_vram(struct vml_info *vinfo)
  150. {
  151. int i;
  152. for (i = 0; i < vinfo->num_areas; ++i) {
  153. vmlfb_free_vram_area(&vinfo->vram[i]);
  154. }
  155. vinfo->num_areas = 0;
  156. }
  157. /*
  158. * Allocate vram. Currently we try to allocate contiguous areas from the
  159. * __GFP_DMA zone and puzzle them together. A better approach would be to
  160. * allocate one contiguous area for scanout and use one-page allocations for
  161. * offscreen areas. This requires user-space and GPU virtual mappings.
  162. */
  163. static int vmlfb_alloc_vram(struct vml_info *vinfo,
  164. size_t requested,
  165. size_t min_total, size_t min_contig)
  166. {
  167. int i, j;
  168. int order;
  169. int contiguous;
  170. int err;
  171. struct vram_area *va;
  172. struct vram_area *va2;
  173. vinfo->num_areas = 0;
  174. for (i = 0; i < VML_VRAM_AREAS; ++i) {
  175. va = &vinfo->vram[i];
  176. order = 0;
  177. while (requested > (PAGE_SIZE << order) && order < MAX_ORDER)
  178. order++;
  179. err = vmlfb_alloc_vram_area(va, order, 0);
  180. if (err)
  181. break;
  182. if (i == 0) {
  183. vinfo->vram_start = va->phys;
  184. vinfo->vram_logical = (void __iomem *) va->logical;
  185. vinfo->vram_contig_size = va->size;
  186. vinfo->num_areas = 1;
  187. } else {
  188. contiguous = 0;
  189. for (j = 0; j < i; ++j) {
  190. va2 = &vinfo->vram[j];
  191. if (va->phys + va->size == va2->phys ||
  192. va2->phys + va2->size == va->phys) {
  193. contiguous = 1;
  194. break;
  195. }
  196. }
  197. if (contiguous) {
  198. vinfo->num_areas++;
  199. if (va->phys < vinfo->vram_start) {
  200. vinfo->vram_start = va->phys;
  201. vinfo->vram_logical =
  202. (void __iomem *)va->logical;
  203. }
  204. vinfo->vram_contig_size += va->size;
  205. } else {
  206. vmlfb_free_vram_area(va);
  207. break;
  208. }
  209. }
  210. if (requested < va->size)
  211. break;
  212. else
  213. requested -= va->size;
  214. }
  215. if (vinfo->vram_contig_size > min_total &&
  216. vinfo->vram_contig_size > min_contig) {
  217. printk(KERN_DEBUG MODULE_NAME
  218. ": Contiguous vram: %ld bytes at physical 0x%08lx.\n",
  219. (unsigned long)vinfo->vram_contig_size,
  220. (unsigned long)vinfo->vram_start);
  221. return 0;
  222. }
  223. printk(KERN_ERR MODULE_NAME
  224. ": Could not allocate requested minimal amount of vram.\n");
  225. vmlfb_free_vram(vinfo);
  226. return -ENOMEM;
  227. }
  228. /*
  229. * Find the GPU to use with our display controller.
  230. */
  231. static int vmlfb_get_gpu(struct vml_par *par)
  232. {
  233. mutex_lock(&vml_mutex);
  234. par->gpu = pci_get_device(PCI_VENDOR_ID_INTEL, VML_DEVICE_GPU, NULL);
  235. if (!par->gpu) {
  236. mutex_unlock(&vml_mutex);
  237. return -ENODEV;
  238. }
  239. mutex_unlock(&vml_mutex);
  240. if (pci_enable_device(par->gpu) < 0)
  241. return -ENODEV;
  242. return 0;
  243. }
  244. /*
  245. * Find a contiguous vram area that contains a given offset from vram start.
  246. */
  247. static int vmlfb_vram_offset(struct vml_info *vinfo, unsigned long offset)
  248. {
  249. unsigned long aoffset;
  250. unsigned i;
  251. for (i = 0; i < vinfo->num_areas; ++i) {
  252. aoffset = offset - (vinfo->vram[i].phys - vinfo->vram_start);
  253. if (aoffset < vinfo->vram[i].size) {
  254. return 0;
  255. }
  256. }
  257. return -EINVAL;
  258. }
  259. /*
  260. * Remap the MMIO register spaces of the VDC and the GPU.
  261. */
  262. static int vmlfb_enable_mmio(struct vml_par *par)
  263. {
  264. int err;
  265. par->vdc_mem_base = pci_resource_start(par->vdc, 0);
  266. par->vdc_mem_size = pci_resource_len(par->vdc, 0);
  267. if (!request_mem_region(par->vdc_mem_base, par->vdc_mem_size, "vmlfb")) {
  268. printk(KERN_ERR MODULE_NAME
  269. ": Could not claim display controller MMIO.\n");
  270. return -EBUSY;
  271. }
  272. par->vdc_mem = ioremap_nocache(par->vdc_mem_base, par->vdc_mem_size);
  273. if (par->vdc_mem == NULL) {
  274. printk(KERN_ERR MODULE_NAME
  275. ": Could not map display controller MMIO.\n");
  276. err = -ENOMEM;
  277. goto out_err_0;
  278. }
  279. par->gpu_mem_base = pci_resource_start(par->gpu, 0);
  280. par->gpu_mem_size = pci_resource_len(par->gpu, 0);
  281. if (!request_mem_region(par->gpu_mem_base, par->gpu_mem_size, "vmlfb")) {
  282. printk(KERN_ERR MODULE_NAME ": Could not claim GPU MMIO.\n");
  283. err = -EBUSY;
  284. goto out_err_1;
  285. }
  286. par->gpu_mem = ioremap_nocache(par->gpu_mem_base, par->gpu_mem_size);
  287. if (par->gpu_mem == NULL) {
  288. printk(KERN_ERR MODULE_NAME ": Could not map GPU MMIO.\n");
  289. err = -ENOMEM;
  290. goto out_err_2;
  291. }
  292. return 0;
  293. out_err_2:
  294. release_mem_region(par->gpu_mem_base, par->gpu_mem_size);
  295. out_err_1:
  296. iounmap(par->vdc_mem);
  297. out_err_0:
  298. release_mem_region(par->vdc_mem_base, par->vdc_mem_size);
  299. return err;
  300. }
  301. /*
  302. * Unmap the VDC and GPU register spaces.
  303. */
  304. static void vmlfb_disable_mmio(struct vml_par *par)
  305. {
  306. iounmap(par->gpu_mem);
  307. release_mem_region(par->gpu_mem_base, par->gpu_mem_size);
  308. iounmap(par->vdc_mem);
  309. release_mem_region(par->vdc_mem_base, par->vdc_mem_size);
  310. }
  311. /*
  312. * Release and uninit the VDC and GPU.
  313. */
  314. static void vmlfb_release_devices(struct vml_par *par)
  315. {
  316. if (atomic_dec_and_test(&par->refcount)) {
  317. pci_disable_device(par->gpu);
  318. pci_disable_device(par->vdc);
  319. }
  320. }
  321. /*
  322. * Free up allocated resources for a device.
  323. */
  324. static void vml_pci_remove(struct pci_dev *dev)
  325. {
  326. struct fb_info *info;
  327. struct vml_info *vinfo;
  328. struct vml_par *par;
  329. info = pci_get_drvdata(dev);
  330. if (info) {
  331. vinfo = container_of(info, struct vml_info, info);
  332. par = vinfo->par;
  333. mutex_lock(&vml_mutex);
  334. unregister_framebuffer(info);
  335. fb_dealloc_cmap(&info->cmap);
  336. vmlfb_free_vram(vinfo);
  337. vmlfb_disable_mmio(par);
  338. vmlfb_release_devices(par);
  339. kfree(vinfo);
  340. kfree(par);
  341. mutex_unlock(&vml_mutex);
  342. }
  343. }
  344. static void vmlfb_set_pref_pixel_format(struct fb_var_screeninfo *var)
  345. {
  346. switch (var->bits_per_pixel) {
  347. case 16:
  348. var->blue.offset = 0;
  349. var->blue.length = 5;
  350. var->green.offset = 5;
  351. var->green.length = 5;
  352. var->red.offset = 10;
  353. var->red.length = 5;
  354. var->transp.offset = 15;
  355. var->transp.length = 1;
  356. break;
  357. case 32:
  358. var->blue.offset = 0;
  359. var->blue.length = 8;
  360. var->green.offset = 8;
  361. var->green.length = 8;
  362. var->red.offset = 16;
  363. var->red.length = 8;
  364. var->transp.offset = 24;
  365. var->transp.length = 0;
  366. break;
  367. default:
  368. break;
  369. }
  370. var->blue.msb_right = var->green.msb_right =
  371. var->red.msb_right = var->transp.msb_right = 0;
  372. }
  373. /*
  374. * Device initialization.
  375. * We initialize one vml_par struct per device and one vml_info
  376. * struct per pipe. Currently we have only one pipe.
  377. */
  378. static int vml_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
  379. {
  380. struct vml_info *vinfo;
  381. struct fb_info *info;
  382. struct vml_par *par;
  383. int err = 0;
  384. par = kzalloc(sizeof(*par), GFP_KERNEL);
  385. if (par == NULL)
  386. return -ENOMEM;
  387. vinfo = kzalloc(sizeof(*vinfo), GFP_KERNEL);
  388. if (vinfo == NULL) {
  389. err = -ENOMEM;
  390. goto out_err_0;
  391. }
  392. vinfo->par = par;
  393. par->vdc = dev;
  394. atomic_set(&par->refcount, 1);
  395. switch (id->device) {
  396. case VML_DEVICE_VDC:
  397. if ((err = vmlfb_get_gpu(par)))
  398. goto out_err_1;
  399. pci_set_drvdata(dev, &vinfo->info);
  400. break;
  401. default:
  402. err = -ENODEV;
  403. goto out_err_1;
  404. }
  405. info = &vinfo->info;
  406. info->flags = FBINFO_DEFAULT | FBINFO_PARTIAL_PAN_OK;
  407. err = vmlfb_enable_mmio(par);
  408. if (err)
  409. goto out_err_2;
  410. err = vmlfb_alloc_vram(vinfo, vml_mem_requested,
  411. vml_mem_contig, vml_mem_min);
  412. if (err)
  413. goto out_err_3;
  414. strcpy(info->fix.id, "Vermilion Range");
  415. info->fix.mmio_start = 0;
  416. info->fix.mmio_len = 0;
  417. info->fix.smem_start = vinfo->vram_start;
  418. info->fix.smem_len = vinfo->vram_contig_size;
  419. info->fix.type = FB_TYPE_PACKED_PIXELS;
  420. info->fix.visual = FB_VISUAL_TRUECOLOR;
  421. info->fix.ypanstep = 1;
  422. info->fix.xpanstep = 1;
  423. info->fix.ywrapstep = 0;
  424. info->fix.accel = FB_ACCEL_NONE;
  425. info->screen_base = vinfo->vram_logical;
  426. info->pseudo_palette = vinfo->pseudo_palette;
  427. info->par = par;
  428. info->fbops = &vmlfb_ops;
  429. info->device = &dev->dev;
  430. INIT_LIST_HEAD(&vinfo->head);
  431. vinfo->pipe_disabled = 1;
  432. vinfo->cur_blank_mode = FB_BLANK_UNBLANK;
  433. info->var.grayscale = 0;
  434. info->var.bits_per_pixel = 16;
  435. vmlfb_set_pref_pixel_format(&info->var);
  436. if (!fb_find_mode
  437. (&info->var, info, vml_default_mode, NULL, 0, &defaultmode, 16)) {
  438. printk(KERN_ERR MODULE_NAME ": Could not find initial mode\n");
  439. }
  440. if (fb_alloc_cmap(&info->cmap, 256, 1) < 0) {
  441. err = -ENOMEM;
  442. goto out_err_4;
  443. }
  444. err = register_framebuffer(info);
  445. if (err) {
  446. printk(KERN_ERR MODULE_NAME ": Register framebuffer error.\n");
  447. goto out_err_5;
  448. }
  449. printk("Initialized vmlfb\n");
  450. return 0;
  451. out_err_5:
  452. fb_dealloc_cmap(&info->cmap);
  453. out_err_4:
  454. vmlfb_free_vram(vinfo);
  455. out_err_3:
  456. vmlfb_disable_mmio(par);
  457. out_err_2:
  458. vmlfb_release_devices(par);
  459. out_err_1:
  460. kfree(vinfo);
  461. out_err_0:
  462. kfree(par);
  463. return err;
  464. }
  465. static int vmlfb_open(struct fb_info *info, int user)
  466. {
  467. /*
  468. * Save registers here?
  469. */
  470. return 0;
  471. }
  472. static int vmlfb_release(struct fb_info *info, int user)
  473. {
  474. /*
  475. * Restore registers here.
  476. */
  477. return 0;
  478. }
  479. static int vml_nearest_clock(int clock)
  480. {
  481. int i;
  482. int cur_index;
  483. int cur_diff;
  484. int diff;
  485. cur_index = 0;
  486. cur_diff = clock - vml_clocks[0];
  487. cur_diff = (cur_diff < 0) ? -cur_diff : cur_diff;
  488. for (i = 1; i < vml_num_clocks; ++i) {
  489. diff = clock - vml_clocks[i];
  490. diff = (diff < 0) ? -diff : diff;
  491. if (diff < cur_diff) {
  492. cur_index = i;
  493. cur_diff = diff;
  494. }
  495. }
  496. return vml_clocks[cur_index];
  497. }
  498. static int vmlfb_check_var_locked(struct fb_var_screeninfo *var,
  499. struct vml_info *vinfo)
  500. {
  501. u32 pitch;
  502. u64 mem;
  503. int nearest_clock;
  504. int clock;
  505. int clock_diff;
  506. struct fb_var_screeninfo v;
  507. v = *var;
  508. clock = PICOS2KHZ(var->pixclock);
  509. if (subsys && subsys->nearest_clock) {
  510. nearest_clock = subsys->nearest_clock(subsys, clock);
  511. } else {
  512. nearest_clock = vml_nearest_clock(clock);
  513. }
  514. /*
  515. * Accept a 20% diff.
  516. */
  517. clock_diff = nearest_clock - clock;
  518. clock_diff = (clock_diff < 0) ? -clock_diff : clock_diff;
  519. if (clock_diff > clock / 5) {
  520. #if 0
  521. printk(KERN_DEBUG MODULE_NAME ": Diff failure. %d %d\n",clock_diff,clock);
  522. #endif
  523. return -EINVAL;
  524. }
  525. v.pixclock = KHZ2PICOS(nearest_clock);
  526. if (var->xres > VML_MAX_XRES || var->yres > VML_MAX_YRES) {
  527. printk(KERN_DEBUG MODULE_NAME ": Resolution failure.\n");
  528. return -EINVAL;
  529. }
  530. if (var->xres_virtual > VML_MAX_XRES_VIRTUAL) {
  531. printk(KERN_DEBUG MODULE_NAME
  532. ": Virtual resolution failure.\n");
  533. return -EINVAL;
  534. }
  535. switch (v.bits_per_pixel) {
  536. case 0 ... 16:
  537. v.bits_per_pixel = 16;
  538. break;
  539. case 17 ... 32:
  540. v.bits_per_pixel = 32;
  541. break;
  542. default:
  543. printk(KERN_DEBUG MODULE_NAME ": Invalid bpp: %d.\n",
  544. var->bits_per_pixel);
  545. return -EINVAL;
  546. }
  547. pitch = ALIGN((var->xres * var->bits_per_pixel) >> 3, 0x40);
  548. mem = pitch * var->yres_virtual;
  549. if (mem > vinfo->vram_contig_size) {
  550. return -ENOMEM;
  551. }
  552. switch (v.bits_per_pixel) {
  553. case 16:
  554. if (var->blue.offset != 0 ||
  555. var->blue.length != 5 ||
  556. var->green.offset != 5 ||
  557. var->green.length != 5 ||
  558. var->red.offset != 10 ||
  559. var->red.length != 5 ||
  560. var->transp.offset != 15 || var->transp.length != 1) {
  561. vmlfb_set_pref_pixel_format(&v);
  562. }
  563. break;
  564. case 32:
  565. if (var->blue.offset != 0 ||
  566. var->blue.length != 8 ||
  567. var->green.offset != 8 ||
  568. var->green.length != 8 ||
  569. var->red.offset != 16 ||
  570. var->red.length != 8 ||
  571. (var->transp.length != 0 && var->transp.length != 8) ||
  572. (var->transp.length == 8 && var->transp.offset != 24)) {
  573. vmlfb_set_pref_pixel_format(&v);
  574. }
  575. break;
  576. default:
  577. return -EINVAL;
  578. }
  579. *var = v;
  580. return 0;
  581. }
  582. static int vmlfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
  583. {
  584. struct vml_info *vinfo = container_of(info, struct vml_info, info);
  585. int ret;
  586. mutex_lock(&vml_mutex);
  587. ret = vmlfb_check_var_locked(var, vinfo);
  588. mutex_unlock(&vml_mutex);
  589. return ret;
  590. }
  591. static void vml_wait_vblank(struct vml_info *vinfo)
  592. {
  593. /* Wait for vblank. For now, just wait for a 50Hz cycle (20ms)) */
  594. mdelay(20);
  595. }
  596. static void vmlfb_disable_pipe(struct vml_info *vinfo)
  597. {
  598. struct vml_par *par = vinfo->par;
  599. /* Disable the MDVO pad */
  600. VML_WRITE32(par, VML_RCOMPSTAT, 0);
  601. while (!(VML_READ32(par, VML_RCOMPSTAT) & VML_MDVO_VDC_I_RCOMP)) ;
  602. /* Disable display planes */
  603. VML_WRITE32(par, VML_DSPCCNTR,
  604. VML_READ32(par, VML_DSPCCNTR) & ~VML_GFX_ENABLE);
  605. (void)VML_READ32(par, VML_DSPCCNTR);
  606. /* Wait for vblank for the disable to take effect */
  607. vml_wait_vblank(vinfo);
  608. /* Next, disable display pipes */
  609. VML_WRITE32(par, VML_PIPEACONF, 0);
  610. (void)VML_READ32(par, VML_PIPEACONF);
  611. vinfo->pipe_disabled = 1;
  612. }
  613. #ifdef VERMILION_DEBUG
  614. static void vml_dump_regs(struct vml_info *vinfo)
  615. {
  616. struct vml_par *par = vinfo->par;
  617. printk(KERN_DEBUG MODULE_NAME ": Modesetting register dump:\n");
  618. printk(KERN_DEBUG MODULE_NAME ": \tHTOTAL_A : 0x%08x\n",
  619. (unsigned)VML_READ32(par, VML_HTOTAL_A));
  620. printk(KERN_DEBUG MODULE_NAME ": \tHBLANK_A : 0x%08x\n",
  621. (unsigned)VML_READ32(par, VML_HBLANK_A));
  622. printk(KERN_DEBUG MODULE_NAME ": \tHSYNC_A : 0x%08x\n",
  623. (unsigned)VML_READ32(par, VML_HSYNC_A));
  624. printk(KERN_DEBUG MODULE_NAME ": \tVTOTAL_A : 0x%08x\n",
  625. (unsigned)VML_READ32(par, VML_VTOTAL_A));
  626. printk(KERN_DEBUG MODULE_NAME ": \tVBLANK_A : 0x%08x\n",
  627. (unsigned)VML_READ32(par, VML_VBLANK_A));
  628. printk(KERN_DEBUG MODULE_NAME ": \tVSYNC_A : 0x%08x\n",
  629. (unsigned)VML_READ32(par, VML_VSYNC_A));
  630. printk(KERN_DEBUG MODULE_NAME ": \tDSPCSTRIDE : 0x%08x\n",
  631. (unsigned)VML_READ32(par, VML_DSPCSTRIDE));
  632. printk(KERN_DEBUG MODULE_NAME ": \tDSPCSIZE : 0x%08x\n",
  633. (unsigned)VML_READ32(par, VML_DSPCSIZE));
  634. printk(KERN_DEBUG MODULE_NAME ": \tDSPCPOS : 0x%08x\n",
  635. (unsigned)VML_READ32(par, VML_DSPCPOS));
  636. printk(KERN_DEBUG MODULE_NAME ": \tDSPARB : 0x%08x\n",
  637. (unsigned)VML_READ32(par, VML_DSPARB));
  638. printk(KERN_DEBUG MODULE_NAME ": \tDSPCADDR : 0x%08x\n",
  639. (unsigned)VML_READ32(par, VML_DSPCADDR));
  640. printk(KERN_DEBUG MODULE_NAME ": \tBCLRPAT_A : 0x%08x\n",
  641. (unsigned)VML_READ32(par, VML_BCLRPAT_A));
  642. printk(KERN_DEBUG MODULE_NAME ": \tCANVSCLR_A : 0x%08x\n",
  643. (unsigned)VML_READ32(par, VML_CANVSCLR_A));
  644. printk(KERN_DEBUG MODULE_NAME ": \tPIPEASRC : 0x%08x\n",
  645. (unsigned)VML_READ32(par, VML_PIPEASRC));
  646. printk(KERN_DEBUG MODULE_NAME ": \tPIPEACONF : 0x%08x\n",
  647. (unsigned)VML_READ32(par, VML_PIPEACONF));
  648. printk(KERN_DEBUG MODULE_NAME ": \tDSPCCNTR : 0x%08x\n",
  649. (unsigned)VML_READ32(par, VML_DSPCCNTR));
  650. printk(KERN_DEBUG MODULE_NAME ": \tRCOMPSTAT : 0x%08x\n",
  651. (unsigned)VML_READ32(par, VML_RCOMPSTAT));
  652. printk(KERN_DEBUG MODULE_NAME ": End of modesetting register dump.\n");
  653. }
  654. #endif
  655. static int vmlfb_set_par_locked(struct vml_info *vinfo)
  656. {
  657. struct vml_par *par = vinfo->par;
  658. struct fb_info *info = &vinfo->info;
  659. struct fb_var_screeninfo *var = &info->var;
  660. u32 htotal, hactive, hblank_start, hblank_end, hsync_start, hsync_end;
  661. u32 vtotal, vactive, vblank_start, vblank_end, vsync_start, vsync_end;
  662. u32 dspcntr;
  663. int clock;
  664. vinfo->bytes_per_pixel = var->bits_per_pixel >> 3;
  665. vinfo->stride = ALIGN(var->xres_virtual * vinfo->bytes_per_pixel, 0x40);
  666. info->fix.line_length = vinfo->stride;
  667. if (!subsys)
  668. return 0;
  669. htotal =
  670. var->xres + var->right_margin + var->hsync_len + var->left_margin;
  671. hactive = var->xres;
  672. hblank_start = var->xres;
  673. hblank_end = htotal;
  674. hsync_start = hactive + var->right_margin;
  675. hsync_end = hsync_start + var->hsync_len;
  676. vtotal =
  677. var->yres + var->lower_margin + var->vsync_len + var->upper_margin;
  678. vactive = var->yres;
  679. vblank_start = var->yres;
  680. vblank_end = vtotal;
  681. vsync_start = vactive + var->lower_margin;
  682. vsync_end = vsync_start + var->vsync_len;
  683. dspcntr = VML_GFX_ENABLE | VML_GFX_GAMMABYPASS;
  684. clock = PICOS2KHZ(var->pixclock);
  685. if (subsys->nearest_clock) {
  686. clock = subsys->nearest_clock(subsys, clock);
  687. } else {
  688. clock = vml_nearest_clock(clock);
  689. }
  690. printk(KERN_DEBUG MODULE_NAME
  691. ": Set mode Hfreq : %d kHz, Vfreq : %d Hz.\n", clock / htotal,
  692. ((clock / htotal) * 1000) / vtotal);
  693. switch (var->bits_per_pixel) {
  694. case 16:
  695. dspcntr |= VML_GFX_ARGB1555;
  696. break;
  697. case 32:
  698. if (var->transp.length == 8)
  699. dspcntr |= VML_GFX_ARGB8888 | VML_GFX_ALPHAMULT;
  700. else
  701. dspcntr |= VML_GFX_RGB0888;
  702. break;
  703. default:
  704. return -EINVAL;
  705. }
  706. vmlfb_disable_pipe(vinfo);
  707. mb();
  708. if (subsys->set_clock)
  709. subsys->set_clock(subsys, clock);
  710. else
  711. return -EINVAL;
  712. VML_WRITE32(par, VML_HTOTAL_A, ((htotal - 1) << 16) | (hactive - 1));
  713. VML_WRITE32(par, VML_HBLANK_A,
  714. ((hblank_end - 1) << 16) | (hblank_start - 1));
  715. VML_WRITE32(par, VML_HSYNC_A,
  716. ((hsync_end - 1) << 16) | (hsync_start - 1));
  717. VML_WRITE32(par, VML_VTOTAL_A, ((vtotal - 1) << 16) | (vactive - 1));
  718. VML_WRITE32(par, VML_VBLANK_A,
  719. ((vblank_end - 1) << 16) | (vblank_start - 1));
  720. VML_WRITE32(par, VML_VSYNC_A,
  721. ((vsync_end - 1) << 16) | (vsync_start - 1));
  722. VML_WRITE32(par, VML_DSPCSTRIDE, vinfo->stride);
  723. VML_WRITE32(par, VML_DSPCSIZE,
  724. ((var->yres - 1) << 16) | (var->xres - 1));
  725. VML_WRITE32(par, VML_DSPCPOS, 0x00000000);
  726. VML_WRITE32(par, VML_DSPARB, VML_FIFO_DEFAULT);
  727. VML_WRITE32(par, VML_BCLRPAT_A, 0x00000000);
  728. VML_WRITE32(par, VML_CANVSCLR_A, 0x00000000);
  729. VML_WRITE32(par, VML_PIPEASRC,
  730. ((var->xres - 1) << 16) | (var->yres - 1));
  731. wmb();
  732. VML_WRITE32(par, VML_PIPEACONF, VML_PIPE_ENABLE);
  733. wmb();
  734. VML_WRITE32(par, VML_DSPCCNTR, dspcntr);
  735. wmb();
  736. VML_WRITE32(par, VML_DSPCADDR, (u32) vinfo->vram_start +
  737. var->yoffset * vinfo->stride +
  738. var->xoffset * vinfo->bytes_per_pixel);
  739. VML_WRITE32(par, VML_RCOMPSTAT, VML_MDVO_PAD_ENABLE);
  740. while (!(VML_READ32(par, VML_RCOMPSTAT) &
  741. (VML_MDVO_VDC_I_RCOMP | VML_MDVO_PAD_ENABLE))) ;
  742. vinfo->pipe_disabled = 0;
  743. #ifdef VERMILION_DEBUG
  744. vml_dump_regs(vinfo);
  745. #endif
  746. return 0;
  747. }
  748. static int vmlfb_set_par(struct fb_info *info)
  749. {
  750. struct vml_info *vinfo = container_of(info, struct vml_info, info);
  751. int ret;
  752. mutex_lock(&vml_mutex);
  753. list_move(&vinfo->head, (subsys) ? &global_has_mode : &global_no_mode);
  754. ret = vmlfb_set_par_locked(vinfo);
  755. mutex_unlock(&vml_mutex);
  756. return ret;
  757. }
  758. static int vmlfb_blank_locked(struct vml_info *vinfo)
  759. {
  760. struct vml_par *par = vinfo->par;
  761. u32 cur = VML_READ32(par, VML_PIPEACONF);
  762. switch (vinfo->cur_blank_mode) {
  763. case FB_BLANK_UNBLANK:
  764. if (vinfo->pipe_disabled) {
  765. vmlfb_set_par_locked(vinfo);
  766. }
  767. VML_WRITE32(par, VML_PIPEACONF, cur & ~VML_PIPE_FORCE_BORDER);
  768. (void)VML_READ32(par, VML_PIPEACONF);
  769. break;
  770. case FB_BLANK_NORMAL:
  771. if (vinfo->pipe_disabled) {
  772. vmlfb_set_par_locked(vinfo);
  773. }
  774. VML_WRITE32(par, VML_PIPEACONF, cur | VML_PIPE_FORCE_BORDER);
  775. (void)VML_READ32(par, VML_PIPEACONF);
  776. break;
  777. case FB_BLANK_VSYNC_SUSPEND:
  778. case FB_BLANK_HSYNC_SUSPEND:
  779. if (!vinfo->pipe_disabled) {
  780. vmlfb_disable_pipe(vinfo);
  781. }
  782. break;
  783. case FB_BLANK_POWERDOWN:
  784. if (!vinfo->pipe_disabled) {
  785. vmlfb_disable_pipe(vinfo);
  786. }
  787. break;
  788. default:
  789. return -EINVAL;
  790. }
  791. return 0;
  792. }
  793. static int vmlfb_blank(int blank_mode, struct fb_info *info)
  794. {
  795. struct vml_info *vinfo = container_of(info, struct vml_info, info);
  796. int ret;
  797. mutex_lock(&vml_mutex);
  798. vinfo->cur_blank_mode = blank_mode;
  799. ret = vmlfb_blank_locked(vinfo);
  800. mutex_unlock(&vml_mutex);
  801. return ret;
  802. }
  803. static int vmlfb_pan_display(struct fb_var_screeninfo *var,
  804. struct fb_info *info)
  805. {
  806. struct vml_info *vinfo = container_of(info, struct vml_info, info);
  807. struct vml_par *par = vinfo->par;
  808. mutex_lock(&vml_mutex);
  809. VML_WRITE32(par, VML_DSPCADDR, (u32) vinfo->vram_start +
  810. var->yoffset * vinfo->stride +
  811. var->xoffset * vinfo->bytes_per_pixel);
  812. (void)VML_READ32(par, VML_DSPCADDR);
  813. mutex_unlock(&vml_mutex);
  814. return 0;
  815. }
  816. static int vmlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
  817. u_int transp, struct fb_info *info)
  818. {
  819. u32 v;
  820. if (regno >= 16)
  821. return -EINVAL;
  822. if (info->var.grayscale) {
  823. red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
  824. }
  825. if (info->fix.visual != FB_VISUAL_TRUECOLOR)
  826. return -EINVAL;
  827. red = VML_TOHW(red, info->var.red.length);
  828. blue = VML_TOHW(blue, info->var.blue.length);
  829. green = VML_TOHW(green, info->var.green.length);
  830. transp = VML_TOHW(transp, info->var.transp.length);
  831. v = (red << info->var.red.offset) |
  832. (green << info->var.green.offset) |
  833. (blue << info->var.blue.offset) |
  834. (transp << info->var.transp.offset);
  835. switch (info->var.bits_per_pixel) {
  836. case 16:
  837. ((u32 *) info->pseudo_palette)[regno] = v;
  838. break;
  839. case 24:
  840. case 32:
  841. ((u32 *) info->pseudo_palette)[regno] = v;
  842. break;
  843. }
  844. return 0;
  845. }
  846. static int vmlfb_mmap(struct fb_info *info, struct vm_area_struct *vma)
  847. {
  848. struct vml_info *vinfo = container_of(info, struct vml_info, info);
  849. unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
  850. int ret;
  851. unsigned long prot;
  852. ret = vmlfb_vram_offset(vinfo, offset);
  853. if (ret)
  854. return -EINVAL;
  855. prot = pgprot_val(vma->vm_page_prot) & ~_PAGE_CACHE_MASK;
  856. pgprot_val(vma->vm_page_prot) =
  857. prot | cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS);
  858. return vm_iomap_memory(vma, vinfo->vram_start,
  859. vinfo->vram_contig_size);
  860. }
  861. static int vmlfb_sync(struct fb_info *info)
  862. {
  863. return 0;
  864. }
  865. static int vmlfb_cursor(struct fb_info *info, struct fb_cursor *cursor)
  866. {
  867. return -EINVAL; /* just to force soft_cursor() call */
  868. }
  869. static struct fb_ops vmlfb_ops = {
  870. .owner = THIS_MODULE,
  871. .fb_open = vmlfb_open,
  872. .fb_release = vmlfb_release,
  873. .fb_check_var = vmlfb_check_var,
  874. .fb_set_par = vmlfb_set_par,
  875. .fb_blank = vmlfb_blank,
  876. .fb_pan_display = vmlfb_pan_display,
  877. .fb_fillrect = cfb_fillrect,
  878. .fb_copyarea = cfb_copyarea,
  879. .fb_imageblit = cfb_imageblit,
  880. .fb_cursor = vmlfb_cursor,
  881. .fb_sync = vmlfb_sync,
  882. .fb_mmap = vmlfb_mmap,
  883. .fb_setcolreg = vmlfb_setcolreg
  884. };
  885. static struct pci_device_id vml_ids[] = {
  886. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, VML_DEVICE_VDC)},
  887. {0}
  888. };
  889. static struct pci_driver vmlfb_pci_driver = {
  890. .name = "vmlfb",
  891. .id_table = vml_ids,
  892. .probe = vml_pci_probe,
  893. .remove = vml_pci_remove,
  894. };
  895. static void __exit vmlfb_cleanup(void)
  896. {
  897. pci_unregister_driver(&vmlfb_pci_driver);
  898. }
  899. static int __init vmlfb_init(void)
  900. {
  901. #ifndef MODULE
  902. char *option = NULL;
  903. if (fb_get_options(MODULE_NAME, &option))
  904. return -ENODEV;
  905. #endif
  906. printk(KERN_DEBUG MODULE_NAME ": initializing\n");
  907. mutex_init(&vml_mutex);
  908. INIT_LIST_HEAD(&global_no_mode);
  909. INIT_LIST_HEAD(&global_has_mode);
  910. return pci_register_driver(&vmlfb_pci_driver);
  911. }
  912. int vmlfb_register_subsys(struct vml_sys *sys)
  913. {
  914. struct vml_info *entry;
  915. struct list_head *list;
  916. u32 save_activate;
  917. mutex_lock(&vml_mutex);
  918. if (subsys != NULL) {
  919. subsys->restore(subsys);
  920. }
  921. subsys = sys;
  922. subsys->save(subsys);
  923. /*
  924. * We need to restart list traversal for each item, since we
  925. * release the list mutex in the loop.
  926. */
  927. list = global_no_mode.next;
  928. while (list != &global_no_mode) {
  929. list_del_init(list);
  930. entry = list_entry(list, struct vml_info, head);
  931. /*
  932. * First, try the current mode which might not be
  933. * completely validated with respect to the pixel clock.
  934. */
  935. if (!vmlfb_check_var_locked(&entry->info.var, entry)) {
  936. vmlfb_set_par_locked(entry);
  937. list_add_tail(list, &global_has_mode);
  938. } else {
  939. /*
  940. * Didn't work. Try to find another mode,
  941. * that matches this subsys.
  942. */
  943. mutex_unlock(&vml_mutex);
  944. save_activate = entry->info.var.activate;
  945. entry->info.var.bits_per_pixel = 16;
  946. vmlfb_set_pref_pixel_format(&entry->info.var);
  947. if (fb_find_mode(&entry->info.var,
  948. &entry->info,
  949. vml_default_mode, NULL, 0, NULL, 16)) {
  950. entry->info.var.activate |=
  951. FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
  952. fb_set_var(&entry->info, &entry->info.var);
  953. } else {
  954. printk(KERN_ERR MODULE_NAME
  955. ": Sorry. no mode found for this subsys.\n");
  956. }
  957. entry->info.var.activate = save_activate;
  958. mutex_lock(&vml_mutex);
  959. }
  960. vmlfb_blank_locked(entry);
  961. list = global_no_mode.next;
  962. }
  963. mutex_unlock(&vml_mutex);
  964. printk(KERN_DEBUG MODULE_NAME ": Registered %s subsystem.\n",
  965. subsys->name ? subsys->name : "unknown");
  966. return 0;
  967. }
  968. EXPORT_SYMBOL_GPL(vmlfb_register_subsys);
  969. void vmlfb_unregister_subsys(struct vml_sys *sys)
  970. {
  971. struct vml_info *entry, *next;
  972. mutex_lock(&vml_mutex);
  973. if (subsys != sys) {
  974. mutex_unlock(&vml_mutex);
  975. return;
  976. }
  977. subsys->restore(subsys);
  978. subsys = NULL;
  979. list_for_each_entry_safe(entry, next, &global_has_mode, head) {
  980. printk(KERN_DEBUG MODULE_NAME ": subsys disable pipe\n");
  981. vmlfb_disable_pipe(entry);
  982. list_move_tail(&entry->head, &global_no_mode);
  983. }
  984. mutex_unlock(&vml_mutex);
  985. }
  986. EXPORT_SYMBOL_GPL(vmlfb_unregister_subsys);
  987. module_init(vmlfb_init);
  988. module_exit(vmlfb_cleanup);
  989. MODULE_AUTHOR("Tungsten Graphics");
  990. MODULE_DESCRIPTION("Initialization of the Vermilion display devices");
  991. MODULE_VERSION("1.0.0");
  992. MODULE_LICENSE("GPL");