aic79xx_osm_pci.c 10 KB

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  1. /*
  2. * Linux driver attachment glue for PCI based U320 controllers.
  3. *
  4. * Copyright (c) 2000-2001 Adaptec Inc.
  5. * All rights reserved.
  6. *
  7. * Redistribution and use in source and binary forms, with or without
  8. * modification, are permitted provided that the following conditions
  9. * are met:
  10. * 1. Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions, and the following disclaimer,
  12. * without modification.
  13. * 2. Redistributions in binary form must reproduce at minimum a disclaimer
  14. * substantially similar to the "NO WARRANTY" disclaimer below
  15. * ("Disclaimer") and any redistribution must be conditioned upon
  16. * including a substantially similar Disclaimer requirement for further
  17. * binary redistribution.
  18. * 3. Neither the names of the above-listed copyright holders nor the names
  19. * of any contributors may be used to endorse or promote products derived
  20. * from this software without specific prior written permission.
  21. *
  22. * Alternatively, this software may be distributed under the terms of the
  23. * GNU General Public License ("GPL") version 2 as published by the Free
  24. * Software Foundation.
  25. *
  26. * NO WARRANTY
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
  30. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  31. * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  33. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  34. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  35. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  36. * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  37. * POSSIBILITY OF SUCH DAMAGES.
  38. *
  39. * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic79xx_osm_pci.c#25 $
  40. */
  41. #include "aic79xx_osm.h"
  42. #include "aic79xx_inline.h"
  43. #include "aic79xx_pci.h"
  44. /* Define the macro locally since it's different for different class of chips.
  45. */
  46. #define ID(x) \
  47. ID2C(x), \
  48. ID2C(IDIROC(x))
  49. static const struct pci_device_id ahd_linux_pci_id_table[] = {
  50. /* aic7901 based controllers */
  51. ID(ID_AHA_29320A),
  52. ID(ID_AHA_29320ALP),
  53. ID(ID_AHA_29320LPE),
  54. /* aic7902 based controllers */
  55. ID(ID_AHA_29320),
  56. ID(ID_AHA_29320B),
  57. ID(ID_AHA_29320LP),
  58. ID(ID_AHA_39320),
  59. ID(ID_AHA_39320_B),
  60. ID(ID_AHA_39320A),
  61. ID(ID_AHA_39320D),
  62. ID(ID_AHA_39320D_HP),
  63. ID(ID_AHA_39320D_B),
  64. ID(ID_AHA_39320D_B_HP),
  65. /* Generic chip probes for devices we don't know exactly. */
  66. ID16(ID_AIC7901 & ID_9005_GENERIC_MASK),
  67. ID(ID_AIC7901A & ID_DEV_VENDOR_MASK),
  68. ID16(ID_AIC7902 & ID_9005_GENERIC_MASK),
  69. { 0 }
  70. };
  71. MODULE_DEVICE_TABLE(pci, ahd_linux_pci_id_table);
  72. #ifdef CONFIG_PM
  73. static int
  74. ahd_linux_pci_dev_suspend(struct pci_dev *pdev, pm_message_t mesg)
  75. {
  76. struct ahd_softc *ahd = pci_get_drvdata(pdev);
  77. int rc;
  78. if ((rc = ahd_suspend(ahd)))
  79. return rc;
  80. ahd_pci_suspend(ahd);
  81. pci_save_state(pdev);
  82. pci_disable_device(pdev);
  83. if (mesg.event & PM_EVENT_SLEEP)
  84. pci_set_power_state(pdev, PCI_D3hot);
  85. return rc;
  86. }
  87. static int
  88. ahd_linux_pci_dev_resume(struct pci_dev *pdev)
  89. {
  90. struct ahd_softc *ahd = pci_get_drvdata(pdev);
  91. int rc;
  92. pci_set_power_state(pdev, PCI_D0);
  93. pci_restore_state(pdev);
  94. if ((rc = pci_enable_device(pdev))) {
  95. dev_printk(KERN_ERR, &pdev->dev,
  96. "failed to enable device after resume (%d)\n", rc);
  97. return rc;
  98. }
  99. pci_set_master(pdev);
  100. ahd_pci_resume(ahd);
  101. ahd_resume(ahd);
  102. return rc;
  103. }
  104. #endif
  105. static void
  106. ahd_linux_pci_dev_remove(struct pci_dev *pdev)
  107. {
  108. struct ahd_softc *ahd = pci_get_drvdata(pdev);
  109. u_long s;
  110. if (ahd->platform_data && ahd->platform_data->host)
  111. scsi_remove_host(ahd->platform_data->host);
  112. ahd_lock(ahd, &s);
  113. ahd_intr_enable(ahd, FALSE);
  114. ahd_unlock(ahd, &s);
  115. ahd_free(ahd);
  116. }
  117. static void
  118. ahd_linux_pci_inherit_flags(struct ahd_softc *ahd)
  119. {
  120. struct pci_dev *pdev = ahd->dev_softc, *master_pdev;
  121. unsigned int master_devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0);
  122. master_pdev = pci_get_slot(pdev->bus, master_devfn);
  123. if (master_pdev) {
  124. struct ahd_softc *master = pci_get_drvdata(master_pdev);
  125. if (master) {
  126. ahd->flags &= ~AHD_BIOS_ENABLED;
  127. ahd->flags |= master->flags & AHD_BIOS_ENABLED;
  128. } else
  129. printk(KERN_ERR "aic79xx: no multichannel peer found!\n");
  130. pci_dev_put(master_pdev);
  131. }
  132. }
  133. static int
  134. ahd_linux_pci_dev_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  135. {
  136. char buf[80];
  137. struct ahd_softc *ahd;
  138. ahd_dev_softc_t pci;
  139. const struct ahd_pci_identity *entry;
  140. char *name;
  141. int error;
  142. struct device *dev = &pdev->dev;
  143. pci = pdev;
  144. entry = ahd_find_pci_device(pci);
  145. if (entry == NULL)
  146. return (-ENODEV);
  147. /*
  148. * Allocate a softc for this card and
  149. * set it up for attachment by our
  150. * common detect routine.
  151. */
  152. sprintf(buf, "ahd_pci:%d:%d:%d",
  153. ahd_get_pci_bus(pci),
  154. ahd_get_pci_slot(pci),
  155. ahd_get_pci_function(pci));
  156. name = kstrdup(buf, GFP_ATOMIC);
  157. if (name == NULL)
  158. return (-ENOMEM);
  159. ahd = ahd_alloc(NULL, name);
  160. if (ahd == NULL)
  161. return (-ENOMEM);
  162. if (pci_enable_device(pdev)) {
  163. ahd_free(ahd);
  164. return (-ENODEV);
  165. }
  166. pci_set_master(pdev);
  167. if (sizeof(dma_addr_t) > 4) {
  168. const u64 required_mask = dma_get_required_mask(dev);
  169. if (required_mask > DMA_BIT_MASK(39) &&
  170. dma_set_mask(dev, DMA_BIT_MASK(64)) == 0)
  171. ahd->flags |= AHD_64BIT_ADDRESSING;
  172. else if (required_mask > DMA_BIT_MASK(32) &&
  173. dma_set_mask(dev, DMA_BIT_MASK(39)) == 0)
  174. ahd->flags |= AHD_39BIT_ADDRESSING;
  175. else
  176. dma_set_mask(dev, DMA_BIT_MASK(32));
  177. } else {
  178. dma_set_mask(dev, DMA_BIT_MASK(32));
  179. }
  180. ahd->dev_softc = pci;
  181. error = ahd_pci_config(ahd, entry);
  182. if (error != 0) {
  183. ahd_free(ahd);
  184. return (-error);
  185. }
  186. /*
  187. * Second Function PCI devices need to inherit some
  188. * * settings from function 0.
  189. */
  190. if ((ahd->features & AHD_MULTI_FUNC) && PCI_FUNC(pdev->devfn) != 0)
  191. ahd_linux_pci_inherit_flags(ahd);
  192. pci_set_drvdata(pdev, ahd);
  193. ahd_linux_register_host(ahd, &aic79xx_driver_template);
  194. return (0);
  195. }
  196. static struct pci_driver aic79xx_pci_driver = {
  197. .name = "aic79xx",
  198. .probe = ahd_linux_pci_dev_probe,
  199. #ifdef CONFIG_PM
  200. .suspend = ahd_linux_pci_dev_suspend,
  201. .resume = ahd_linux_pci_dev_resume,
  202. #endif
  203. .remove = ahd_linux_pci_dev_remove,
  204. .id_table = ahd_linux_pci_id_table
  205. };
  206. int
  207. ahd_linux_pci_init(void)
  208. {
  209. return pci_register_driver(&aic79xx_pci_driver);
  210. }
  211. void
  212. ahd_linux_pci_exit(void)
  213. {
  214. pci_unregister_driver(&aic79xx_pci_driver);
  215. }
  216. static int
  217. ahd_linux_pci_reserve_io_regions(struct ahd_softc *ahd, resource_size_t *base,
  218. resource_size_t *base2)
  219. {
  220. *base = pci_resource_start(ahd->dev_softc, 0);
  221. /*
  222. * This is really the 3rd bar and should be at index 2,
  223. * but the Linux PCI code doesn't know how to "count" 64bit
  224. * bars.
  225. */
  226. *base2 = pci_resource_start(ahd->dev_softc, 3);
  227. if (*base == 0 || *base2 == 0)
  228. return (ENOMEM);
  229. if (!request_region(*base, 256, "aic79xx"))
  230. return (ENOMEM);
  231. if (!request_region(*base2, 256, "aic79xx")) {
  232. release_region(*base, 256);
  233. return (ENOMEM);
  234. }
  235. return (0);
  236. }
  237. static int
  238. ahd_linux_pci_reserve_mem_region(struct ahd_softc *ahd,
  239. resource_size_t *bus_addr,
  240. uint8_t __iomem **maddr)
  241. {
  242. resource_size_t start;
  243. resource_size_t base_page;
  244. u_long base_offset;
  245. int error = 0;
  246. if (aic79xx_allow_memio == 0)
  247. return (ENOMEM);
  248. if ((ahd->bugs & AHD_PCIX_MMAPIO_BUG) != 0)
  249. return (ENOMEM);
  250. start = pci_resource_start(ahd->dev_softc, 1);
  251. base_page = start & PAGE_MASK;
  252. base_offset = start - base_page;
  253. if (start != 0) {
  254. *bus_addr = start;
  255. if (!request_mem_region(start, 0x1000, "aic79xx"))
  256. error = ENOMEM;
  257. if (!error) {
  258. *maddr = ioremap_nocache(base_page, base_offset + 512);
  259. if (*maddr == NULL) {
  260. error = ENOMEM;
  261. release_mem_region(start, 0x1000);
  262. } else
  263. *maddr += base_offset;
  264. }
  265. } else
  266. error = ENOMEM;
  267. return (error);
  268. }
  269. int
  270. ahd_pci_map_registers(struct ahd_softc *ahd)
  271. {
  272. uint32_t command;
  273. resource_size_t base;
  274. uint8_t __iomem *maddr;
  275. int error;
  276. /*
  277. * If its allowed, we prefer memory mapped access.
  278. */
  279. command = ahd_pci_read_config(ahd->dev_softc, PCIR_COMMAND, 4);
  280. command &= ~(PCIM_CMD_PORTEN|PCIM_CMD_MEMEN);
  281. base = 0;
  282. maddr = NULL;
  283. error = ahd_linux_pci_reserve_mem_region(ahd, &base, &maddr);
  284. if (error == 0) {
  285. ahd->platform_data->mem_busaddr = base;
  286. ahd->tags[0] = BUS_SPACE_MEMIO;
  287. ahd->bshs[0].maddr = maddr;
  288. ahd->tags[1] = BUS_SPACE_MEMIO;
  289. ahd->bshs[1].maddr = maddr + 0x100;
  290. ahd_pci_write_config(ahd->dev_softc, PCIR_COMMAND,
  291. command | PCIM_CMD_MEMEN, 4);
  292. if (ahd_pci_test_register_access(ahd) != 0) {
  293. printk("aic79xx: PCI Device %d:%d:%d "
  294. "failed memory mapped test. Using PIO.\n",
  295. ahd_get_pci_bus(ahd->dev_softc),
  296. ahd_get_pci_slot(ahd->dev_softc),
  297. ahd_get_pci_function(ahd->dev_softc));
  298. iounmap(maddr);
  299. release_mem_region(ahd->platform_data->mem_busaddr,
  300. 0x1000);
  301. ahd->bshs[0].maddr = NULL;
  302. maddr = NULL;
  303. } else
  304. command |= PCIM_CMD_MEMEN;
  305. } else if (bootverbose) {
  306. printk("aic79xx: PCI%d:%d:%d MEM region 0x%llx "
  307. "unavailable. Cannot memory map device.\n",
  308. ahd_get_pci_bus(ahd->dev_softc),
  309. ahd_get_pci_slot(ahd->dev_softc),
  310. ahd_get_pci_function(ahd->dev_softc),
  311. (unsigned long long)base);
  312. }
  313. if (maddr == NULL) {
  314. resource_size_t base2;
  315. error = ahd_linux_pci_reserve_io_regions(ahd, &base, &base2);
  316. if (error == 0) {
  317. ahd->tags[0] = BUS_SPACE_PIO;
  318. ahd->tags[1] = BUS_SPACE_PIO;
  319. ahd->bshs[0].ioport = (u_long)base;
  320. ahd->bshs[1].ioport = (u_long)base2;
  321. command |= PCIM_CMD_PORTEN;
  322. } else {
  323. printk("aic79xx: PCI%d:%d:%d IO regions 0x%llx and "
  324. "0x%llx unavailable. Cannot map device.\n",
  325. ahd_get_pci_bus(ahd->dev_softc),
  326. ahd_get_pci_slot(ahd->dev_softc),
  327. ahd_get_pci_function(ahd->dev_softc),
  328. (unsigned long long)base,
  329. (unsigned long long)base2);
  330. }
  331. }
  332. ahd_pci_write_config(ahd->dev_softc, PCIR_COMMAND, command, 4);
  333. return (error);
  334. }
  335. int
  336. ahd_pci_map_int(struct ahd_softc *ahd)
  337. {
  338. int error;
  339. error = request_irq(ahd->dev_softc->irq, ahd_linux_isr,
  340. IRQF_SHARED, "aic79xx", ahd);
  341. if (!error)
  342. ahd->platform_data->irq = ahd->dev_softc->irq;
  343. return (-error);
  344. }
  345. void
  346. ahd_power_state_change(struct ahd_softc *ahd, ahd_power_state new_state)
  347. {
  348. pci_set_power_state(ahd->dev_softc, new_state);
  349. }