rtc-ds1343.c 17 KB

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  1. /* rtc-ds1343.c
  2. *
  3. * Driver for Dallas Semiconductor DS1343 Low Current, SPI Compatible
  4. * Real Time Clock
  5. *
  6. * Author : Raghavendra Chandra Ganiga <ravi23ganiga@gmail.com>
  7. * Ankur Srivastava <sankurece@gmail.com> : DS1343 Nvram Support
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. */
  14. #include <linux/init.h>
  15. #include <linux/module.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/device.h>
  18. #include <linux/spi/spi.h>
  19. #include <linux/regmap.h>
  20. #include <linux/rtc.h>
  21. #include <linux/bcd.h>
  22. #include <linux/pm.h>
  23. #include <linux/slab.h>
  24. #define DS1343_DRV_VERSION "01.00"
  25. #define DALLAS_MAXIM_DS1343 0
  26. #define DALLAS_MAXIM_DS1344 1
  27. /* RTC DS1343 Registers */
  28. #define DS1343_SECONDS_REG 0x00
  29. #define DS1343_MINUTES_REG 0x01
  30. #define DS1343_HOURS_REG 0x02
  31. #define DS1343_DAY_REG 0x03
  32. #define DS1343_DATE_REG 0x04
  33. #define DS1343_MONTH_REG 0x05
  34. #define DS1343_YEAR_REG 0x06
  35. #define DS1343_ALM0_SEC_REG 0x07
  36. #define DS1343_ALM0_MIN_REG 0x08
  37. #define DS1343_ALM0_HOUR_REG 0x09
  38. #define DS1343_ALM0_DAY_REG 0x0A
  39. #define DS1343_ALM1_SEC_REG 0x0B
  40. #define DS1343_ALM1_MIN_REG 0x0C
  41. #define DS1343_ALM1_HOUR_REG 0x0D
  42. #define DS1343_ALM1_DAY_REG 0x0E
  43. #define DS1343_CONTROL_REG 0x0F
  44. #define DS1343_STATUS_REG 0x10
  45. #define DS1343_TRICKLE_REG 0x11
  46. #define DS1343_NVRAM 0x20
  47. #define DS1343_NVRAM_LEN 96
  48. /* DS1343 Control Registers bits */
  49. #define DS1343_EOSC 0x80
  50. #define DS1343_DOSF 0x20
  51. #define DS1343_EGFIL 0x10
  52. #define DS1343_SQW 0x08
  53. #define DS1343_INTCN 0x04
  54. #define DS1343_A1IE 0x02
  55. #define DS1343_A0IE 0x01
  56. /* DS1343 Status Registers bits */
  57. #define DS1343_OSF 0x80
  58. #define DS1343_IRQF1 0x02
  59. #define DS1343_IRQF0 0x01
  60. /* DS1343 Trickle Charger Registers bits */
  61. #define DS1343_TRICKLE_MAGIC 0xa0
  62. #define DS1343_TRICKLE_DS1 0x08
  63. #define DS1343_TRICKLE_1K 0x01
  64. #define DS1343_TRICKLE_2K 0x02
  65. #define DS1343_TRICKLE_4K 0x03
  66. static const struct spi_device_id ds1343_id[] = {
  67. { "ds1343", DALLAS_MAXIM_DS1343 },
  68. { "ds1344", DALLAS_MAXIM_DS1344 },
  69. { }
  70. };
  71. MODULE_DEVICE_TABLE(spi, ds1343_id);
  72. struct ds1343_priv {
  73. struct spi_device *spi;
  74. struct rtc_device *rtc;
  75. struct regmap *map;
  76. struct mutex mutex;
  77. unsigned int irqen;
  78. int irq;
  79. int alarm_sec;
  80. int alarm_min;
  81. int alarm_hour;
  82. int alarm_mday;
  83. };
  84. static int ds1343_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  85. {
  86. switch (cmd) {
  87. #ifdef RTC_SET_CHARGE
  88. case RTC_SET_CHARGE:
  89. {
  90. int val;
  91. if (copy_from_user(&val, (int __user *)arg, sizeof(int)))
  92. return -EFAULT;
  93. return regmap_write(priv->map, DS1343_TRICKLE_REG, val);
  94. }
  95. break;
  96. #endif
  97. }
  98. return -ENOIOCTLCMD;
  99. }
  100. static ssize_t ds1343_show_glitchfilter(struct device *dev,
  101. struct device_attribute *attr, char *buf)
  102. {
  103. struct ds1343_priv *priv = dev_get_drvdata(dev);
  104. int glitch_filt_status, data;
  105. regmap_read(priv->map, DS1343_CONTROL_REG, &data);
  106. glitch_filt_status = !!(data & DS1343_EGFIL);
  107. if (glitch_filt_status)
  108. return sprintf(buf, "enabled\n");
  109. else
  110. return sprintf(buf, "disabled\n");
  111. }
  112. static ssize_t ds1343_store_glitchfilter(struct device *dev,
  113. struct device_attribute *attr,
  114. const char *buf, size_t count)
  115. {
  116. struct ds1343_priv *priv = dev_get_drvdata(dev);
  117. int data;
  118. regmap_read(priv->map, DS1343_CONTROL_REG, &data);
  119. if (strncmp(buf, "enabled", 7) == 0)
  120. data |= DS1343_EGFIL;
  121. else if (strncmp(buf, "disabled", 8) == 0)
  122. data &= ~(DS1343_EGFIL);
  123. else
  124. return -EINVAL;
  125. regmap_write(priv->map, DS1343_CONTROL_REG, data);
  126. return count;
  127. }
  128. static DEVICE_ATTR(glitch_filter, S_IRUGO | S_IWUSR, ds1343_show_glitchfilter,
  129. ds1343_store_glitchfilter);
  130. static ssize_t ds1343_nvram_write(struct file *filp, struct kobject *kobj,
  131. struct bin_attribute *attr,
  132. char *buf, loff_t off, size_t count)
  133. {
  134. int ret;
  135. unsigned char address;
  136. struct device *dev = kobj_to_dev(kobj);
  137. struct ds1343_priv *priv = dev_get_drvdata(dev);
  138. if (unlikely(!count))
  139. return count;
  140. if ((count + off) > DS1343_NVRAM_LEN)
  141. count = DS1343_NVRAM_LEN - off;
  142. address = DS1343_NVRAM + off;
  143. ret = regmap_bulk_write(priv->map, address, buf, count);
  144. if (ret < 0)
  145. dev_err(&priv->spi->dev, "Error in nvram write %d", ret);
  146. return (ret < 0) ? ret : count;
  147. }
  148. static ssize_t ds1343_nvram_read(struct file *filp, struct kobject *kobj,
  149. struct bin_attribute *attr,
  150. char *buf, loff_t off, size_t count)
  151. {
  152. int ret;
  153. unsigned char address;
  154. struct device *dev = kobj_to_dev(kobj);
  155. struct ds1343_priv *priv = dev_get_drvdata(dev);
  156. if (unlikely(!count))
  157. return count;
  158. if ((count + off) > DS1343_NVRAM_LEN)
  159. count = DS1343_NVRAM_LEN - off;
  160. address = DS1343_NVRAM + off;
  161. ret = regmap_bulk_read(priv->map, address, buf, count);
  162. if (ret < 0)
  163. dev_err(&priv->spi->dev, "Error in nvram read %d\n", ret);
  164. return (ret < 0) ? ret : count;
  165. }
  166. static struct bin_attribute nvram_attr = {
  167. .attr.name = "nvram",
  168. .attr.mode = S_IRUGO | S_IWUSR,
  169. .read = ds1343_nvram_read,
  170. .write = ds1343_nvram_write,
  171. .size = DS1343_NVRAM_LEN,
  172. };
  173. static ssize_t ds1343_show_alarmstatus(struct device *dev,
  174. struct device_attribute *attr, char *buf)
  175. {
  176. struct ds1343_priv *priv = dev_get_drvdata(dev);
  177. int alarmstatus, data;
  178. regmap_read(priv->map, DS1343_CONTROL_REG, &data);
  179. alarmstatus = !!(data & DS1343_A0IE);
  180. if (alarmstatus)
  181. return sprintf(buf, "enabled\n");
  182. else
  183. return sprintf(buf, "disabled\n");
  184. }
  185. static DEVICE_ATTR(alarm_status, S_IRUGO, ds1343_show_alarmstatus, NULL);
  186. static ssize_t ds1343_show_alarmmode(struct device *dev,
  187. struct device_attribute *attr, char *buf)
  188. {
  189. struct ds1343_priv *priv = dev_get_drvdata(dev);
  190. int alarm_mode, data;
  191. char *alarm_str;
  192. regmap_read(priv->map, DS1343_ALM0_SEC_REG, &data);
  193. alarm_mode = (data & 0x80) >> 4;
  194. regmap_read(priv->map, DS1343_ALM0_MIN_REG, &data);
  195. alarm_mode |= (data & 0x80) >> 5;
  196. regmap_read(priv->map, DS1343_ALM0_HOUR_REG, &data);
  197. alarm_mode |= (data & 0x80) >> 6;
  198. regmap_read(priv->map, DS1343_ALM0_DAY_REG, &data);
  199. alarm_mode |= (data & 0x80) >> 7;
  200. switch (alarm_mode) {
  201. case 15:
  202. alarm_str = "each second";
  203. break;
  204. case 7:
  205. alarm_str = "seconds match";
  206. break;
  207. case 3:
  208. alarm_str = "minutes and seconds match";
  209. break;
  210. case 1:
  211. alarm_str = "hours, minutes and seconds match";
  212. break;
  213. case 0:
  214. alarm_str = "day, hours, minutes and seconds match";
  215. break;
  216. default:
  217. alarm_str = "invalid";
  218. break;
  219. }
  220. return sprintf(buf, "%s\n", alarm_str);
  221. }
  222. static DEVICE_ATTR(alarm_mode, S_IRUGO, ds1343_show_alarmmode, NULL);
  223. static ssize_t ds1343_show_tricklecharger(struct device *dev,
  224. struct device_attribute *attr, char *buf)
  225. {
  226. struct ds1343_priv *priv = dev_get_drvdata(dev);
  227. int data;
  228. char *diodes = "disabled", *resistors = " ";
  229. regmap_read(priv->map, DS1343_TRICKLE_REG, &data);
  230. if ((data & 0xf0) == DS1343_TRICKLE_MAGIC) {
  231. switch (data & 0x0c) {
  232. case DS1343_TRICKLE_DS1:
  233. diodes = "one diode,";
  234. break;
  235. default:
  236. diodes = "no diode,";
  237. break;
  238. }
  239. switch (data & 0x03) {
  240. case DS1343_TRICKLE_1K:
  241. resistors = "1k Ohm";
  242. break;
  243. case DS1343_TRICKLE_2K:
  244. resistors = "2k Ohm";
  245. break;
  246. case DS1343_TRICKLE_4K:
  247. resistors = "4k Ohm";
  248. break;
  249. default:
  250. diodes = "disabled";
  251. break;
  252. }
  253. }
  254. return sprintf(buf, "%s %s\n", diodes, resistors);
  255. }
  256. static DEVICE_ATTR(trickle_charger, S_IRUGO, ds1343_show_tricklecharger, NULL);
  257. static int ds1343_sysfs_register(struct device *dev)
  258. {
  259. struct ds1343_priv *priv = dev_get_drvdata(dev);
  260. int err;
  261. err = device_create_file(dev, &dev_attr_glitch_filter);
  262. if (err)
  263. return err;
  264. err = device_create_file(dev, &dev_attr_trickle_charger);
  265. if (err)
  266. goto error1;
  267. err = device_create_bin_file(dev, &nvram_attr);
  268. if (err)
  269. goto error2;
  270. if (priv->irq <= 0)
  271. return err;
  272. err = device_create_file(dev, &dev_attr_alarm_mode);
  273. if (err)
  274. goto error3;
  275. err = device_create_file(dev, &dev_attr_alarm_status);
  276. if (!err)
  277. return err;
  278. device_remove_file(dev, &dev_attr_alarm_mode);
  279. error3:
  280. device_remove_bin_file(dev, &nvram_attr);
  281. error2:
  282. device_remove_file(dev, &dev_attr_trickle_charger);
  283. error1:
  284. device_remove_file(dev, &dev_attr_glitch_filter);
  285. return err;
  286. }
  287. static void ds1343_sysfs_unregister(struct device *dev)
  288. {
  289. struct ds1343_priv *priv = dev_get_drvdata(dev);
  290. device_remove_file(dev, &dev_attr_glitch_filter);
  291. device_remove_file(dev, &dev_attr_trickle_charger);
  292. device_remove_bin_file(dev, &nvram_attr);
  293. if (priv->irq <= 0)
  294. return;
  295. device_remove_file(dev, &dev_attr_alarm_status);
  296. device_remove_file(dev, &dev_attr_alarm_mode);
  297. }
  298. static int ds1343_read_time(struct device *dev, struct rtc_time *dt)
  299. {
  300. struct ds1343_priv *priv = dev_get_drvdata(dev);
  301. unsigned char buf[7];
  302. int res;
  303. res = regmap_bulk_read(priv->map, DS1343_SECONDS_REG, buf, 7);
  304. if (res)
  305. return res;
  306. dt->tm_sec = bcd2bin(buf[0]);
  307. dt->tm_min = bcd2bin(buf[1]);
  308. dt->tm_hour = bcd2bin(buf[2] & 0x3F);
  309. dt->tm_wday = bcd2bin(buf[3]) - 1;
  310. dt->tm_mday = bcd2bin(buf[4]);
  311. dt->tm_mon = bcd2bin(buf[5] & 0x1F) - 1;
  312. dt->tm_year = bcd2bin(buf[6]) + 100; /* year offset from 1900 */
  313. return rtc_valid_tm(dt);
  314. }
  315. static int ds1343_set_time(struct device *dev, struct rtc_time *dt)
  316. {
  317. struct ds1343_priv *priv = dev_get_drvdata(dev);
  318. int res;
  319. res = regmap_write(priv->map, DS1343_SECONDS_REG,
  320. bin2bcd(dt->tm_sec));
  321. if (res)
  322. return res;
  323. res = regmap_write(priv->map, DS1343_MINUTES_REG,
  324. bin2bcd(dt->tm_min));
  325. if (res)
  326. return res;
  327. res = regmap_write(priv->map, DS1343_HOURS_REG,
  328. bin2bcd(dt->tm_hour) & 0x3F);
  329. if (res)
  330. return res;
  331. res = regmap_write(priv->map, DS1343_DAY_REG,
  332. bin2bcd(dt->tm_wday + 1));
  333. if (res)
  334. return res;
  335. res = regmap_write(priv->map, DS1343_DATE_REG,
  336. bin2bcd(dt->tm_mday));
  337. if (res)
  338. return res;
  339. res = regmap_write(priv->map, DS1343_MONTH_REG,
  340. bin2bcd(dt->tm_mon + 1));
  341. if (res)
  342. return res;
  343. dt->tm_year %= 100;
  344. res = regmap_write(priv->map, DS1343_YEAR_REG,
  345. bin2bcd(dt->tm_year));
  346. if (res)
  347. return res;
  348. return 0;
  349. }
  350. static int ds1343_update_alarm(struct device *dev)
  351. {
  352. struct ds1343_priv *priv = dev_get_drvdata(dev);
  353. unsigned int control, stat;
  354. unsigned char buf[4];
  355. int res = 0;
  356. res = regmap_read(priv->map, DS1343_CONTROL_REG, &control);
  357. if (res)
  358. return res;
  359. res = regmap_read(priv->map, DS1343_STATUS_REG, &stat);
  360. if (res)
  361. return res;
  362. control &= ~(DS1343_A0IE);
  363. stat &= ~(DS1343_IRQF0);
  364. res = regmap_write(priv->map, DS1343_CONTROL_REG, control);
  365. if (res)
  366. return res;
  367. res = regmap_write(priv->map, DS1343_STATUS_REG, stat);
  368. if (res)
  369. return res;
  370. buf[0] = priv->alarm_sec < 0 || (priv->irqen & RTC_UF) ?
  371. 0x80 : bin2bcd(priv->alarm_sec) & 0x7F;
  372. buf[1] = priv->alarm_min < 0 || (priv->irqen & RTC_UF) ?
  373. 0x80 : bin2bcd(priv->alarm_min) & 0x7F;
  374. buf[2] = priv->alarm_hour < 0 || (priv->irqen & RTC_UF) ?
  375. 0x80 : bin2bcd(priv->alarm_hour) & 0x3F;
  376. buf[3] = priv->alarm_mday < 0 || (priv->irqen & RTC_UF) ?
  377. 0x80 : bin2bcd(priv->alarm_mday) & 0x7F;
  378. res = regmap_bulk_write(priv->map, DS1343_ALM0_SEC_REG, buf, 4);
  379. if (res)
  380. return res;
  381. if (priv->irqen) {
  382. control |= DS1343_A0IE;
  383. res = regmap_write(priv->map, DS1343_CONTROL_REG, control);
  384. }
  385. return res;
  386. }
  387. static int ds1343_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
  388. {
  389. struct ds1343_priv *priv = dev_get_drvdata(dev);
  390. int res = 0;
  391. unsigned int stat;
  392. if (priv->irq <= 0)
  393. return -EINVAL;
  394. mutex_lock(&priv->mutex);
  395. res = regmap_read(priv->map, DS1343_STATUS_REG, &stat);
  396. if (res)
  397. goto out;
  398. alarm->enabled = !!(priv->irqen & RTC_AF);
  399. alarm->pending = !!(stat & DS1343_IRQF0);
  400. alarm->time.tm_sec = priv->alarm_sec < 0 ? 0 : priv->alarm_sec;
  401. alarm->time.tm_min = priv->alarm_min < 0 ? 0 : priv->alarm_min;
  402. alarm->time.tm_hour = priv->alarm_hour < 0 ? 0 : priv->alarm_hour;
  403. alarm->time.tm_mday = priv->alarm_mday < 0 ? 0 : priv->alarm_mday;
  404. alarm->time.tm_mon = -1;
  405. alarm->time.tm_year = -1;
  406. alarm->time.tm_wday = -1;
  407. alarm->time.tm_yday = -1;
  408. alarm->time.tm_isdst = -1;
  409. out:
  410. mutex_unlock(&priv->mutex);
  411. return res;
  412. }
  413. static int ds1343_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
  414. {
  415. struct ds1343_priv *priv = dev_get_drvdata(dev);
  416. int res = 0;
  417. if (priv->irq <= 0)
  418. return -EINVAL;
  419. mutex_lock(&priv->mutex);
  420. priv->alarm_sec = alarm->time.tm_sec;
  421. priv->alarm_min = alarm->time.tm_min;
  422. priv->alarm_hour = alarm->time.tm_hour;
  423. priv->alarm_mday = alarm->time.tm_mday;
  424. if (alarm->enabled)
  425. priv->irqen |= RTC_AF;
  426. res = ds1343_update_alarm(dev);
  427. mutex_unlock(&priv->mutex);
  428. return res;
  429. }
  430. static int ds1343_alarm_irq_enable(struct device *dev, unsigned int enabled)
  431. {
  432. struct ds1343_priv *priv = dev_get_drvdata(dev);
  433. int res = 0;
  434. if (priv->irq <= 0)
  435. return -EINVAL;
  436. mutex_lock(&priv->mutex);
  437. if (enabled)
  438. priv->irqen |= RTC_AF;
  439. else
  440. priv->irqen &= ~RTC_AF;
  441. res = ds1343_update_alarm(dev);
  442. mutex_unlock(&priv->mutex);
  443. return res;
  444. }
  445. static irqreturn_t ds1343_thread(int irq, void *dev_id)
  446. {
  447. struct ds1343_priv *priv = dev_id;
  448. unsigned int stat, control;
  449. int res = 0;
  450. mutex_lock(&priv->mutex);
  451. res = regmap_read(priv->map, DS1343_STATUS_REG, &stat);
  452. if (res)
  453. goto out;
  454. if (stat & DS1343_IRQF0) {
  455. stat &= ~DS1343_IRQF0;
  456. regmap_write(priv->map, DS1343_STATUS_REG, stat);
  457. res = regmap_read(priv->map, DS1343_CONTROL_REG, &control);
  458. if (res)
  459. goto out;
  460. control &= ~DS1343_A0IE;
  461. regmap_write(priv->map, DS1343_CONTROL_REG, control);
  462. rtc_update_irq(priv->rtc, 1, RTC_AF | RTC_IRQF);
  463. }
  464. out:
  465. mutex_unlock(&priv->mutex);
  466. return IRQ_HANDLED;
  467. }
  468. static const struct rtc_class_ops ds1343_rtc_ops = {
  469. .ioctl = ds1343_ioctl,
  470. .read_time = ds1343_read_time,
  471. .set_time = ds1343_set_time,
  472. .read_alarm = ds1343_read_alarm,
  473. .set_alarm = ds1343_set_alarm,
  474. .alarm_irq_enable = ds1343_alarm_irq_enable,
  475. };
  476. static int ds1343_probe(struct spi_device *spi)
  477. {
  478. struct ds1343_priv *priv;
  479. struct regmap_config config;
  480. unsigned int data;
  481. int res;
  482. memset(&config, 0, sizeof(config));
  483. config.reg_bits = 8;
  484. config.val_bits = 8;
  485. config.write_flag_mask = 0x80;
  486. priv = devm_kzalloc(&spi->dev, sizeof(struct ds1343_priv), GFP_KERNEL);
  487. if (!priv)
  488. return -ENOMEM;
  489. priv->spi = spi;
  490. mutex_init(&priv->mutex);
  491. /* RTC DS1347 works in spi mode 3 and
  492. * its chip select is active high
  493. */
  494. spi->mode = SPI_MODE_3 | SPI_CS_HIGH;
  495. spi->bits_per_word = 8;
  496. res = spi_setup(spi);
  497. if (res)
  498. return res;
  499. spi_set_drvdata(spi, priv);
  500. priv->map = devm_regmap_init_spi(spi, &config);
  501. if (IS_ERR(priv->map)) {
  502. dev_err(&spi->dev, "spi regmap init failed for rtc ds1343\n");
  503. return PTR_ERR(priv->map);
  504. }
  505. res = regmap_read(priv->map, DS1343_SECONDS_REG, &data);
  506. if (res)
  507. return res;
  508. regmap_read(priv->map, DS1343_CONTROL_REG, &data);
  509. data |= DS1343_INTCN;
  510. data &= ~(DS1343_EOSC | DS1343_A1IE | DS1343_A0IE);
  511. regmap_write(priv->map, DS1343_CONTROL_REG, data);
  512. regmap_read(priv->map, DS1343_STATUS_REG, &data);
  513. data &= ~(DS1343_OSF | DS1343_IRQF1 | DS1343_IRQF0);
  514. regmap_write(priv->map, DS1343_STATUS_REG, data);
  515. priv->rtc = devm_rtc_device_register(&spi->dev, "ds1343",
  516. &ds1343_rtc_ops, THIS_MODULE);
  517. if (IS_ERR(priv->rtc)) {
  518. dev_err(&spi->dev, "unable to register rtc ds1343\n");
  519. return PTR_ERR(priv->rtc);
  520. }
  521. priv->irq = spi->irq;
  522. if (priv->irq >= 0) {
  523. res = devm_request_threaded_irq(&spi->dev, spi->irq, NULL,
  524. ds1343_thread,
  525. IRQF_NO_SUSPEND | IRQF_ONESHOT,
  526. "ds1343", priv);
  527. if (res) {
  528. priv->irq = -1;
  529. dev_err(&spi->dev,
  530. "unable to request irq for rtc ds1343\n");
  531. } else {
  532. device_set_wakeup_capable(&spi->dev, 1);
  533. }
  534. }
  535. res = ds1343_sysfs_register(&spi->dev);
  536. if (res)
  537. dev_err(&spi->dev,
  538. "unable to create sysfs entries for rtc ds1343\n");
  539. return 0;
  540. }
  541. static int ds1343_remove(struct spi_device *spi)
  542. {
  543. struct ds1343_priv *priv = spi_get_drvdata(spi);
  544. if (spi->irq) {
  545. mutex_lock(&priv->mutex);
  546. priv->irqen &= ~RTC_AF;
  547. mutex_unlock(&priv->mutex);
  548. devm_free_irq(&spi->dev, spi->irq, priv);
  549. }
  550. spi_set_drvdata(spi, NULL);
  551. ds1343_sysfs_unregister(&spi->dev);
  552. return 0;
  553. }
  554. #ifdef CONFIG_PM_SLEEP
  555. static int ds1343_suspend(struct device *dev)
  556. {
  557. struct spi_device *spi = to_spi_device(dev);
  558. if (spi->irq >= 0 && device_may_wakeup(dev))
  559. enable_irq_wake(spi->irq);
  560. return 0;
  561. }
  562. static int ds1343_resume(struct device *dev)
  563. {
  564. struct spi_device *spi = to_spi_device(dev);
  565. if (spi->irq >= 0 && device_may_wakeup(dev))
  566. disable_irq_wake(spi->irq);
  567. return 0;
  568. }
  569. #endif
  570. static SIMPLE_DEV_PM_OPS(ds1343_pm, ds1343_suspend, ds1343_resume);
  571. static struct spi_driver ds1343_driver = {
  572. .driver = {
  573. .name = "ds1343",
  574. .owner = THIS_MODULE,
  575. .pm = &ds1343_pm,
  576. },
  577. .probe = ds1343_probe,
  578. .remove = ds1343_remove,
  579. .id_table = ds1343_id,
  580. };
  581. module_spi_driver(ds1343_driver);
  582. MODULE_DESCRIPTION("DS1343 RTC SPI Driver");
  583. MODULE_AUTHOR("Raghavendra Chandra Ganiga <ravi23ganiga@gmail.com>,"
  584. "Ankur Srivastava <sankurece@gmail.com>");
  585. MODULE_LICENSE("GPL v2");
  586. MODULE_VERSION(DS1343_DRV_VERSION);